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NSQA6V8AW5T2 Series
Transient Voltage Suppressor
ESD Protection Diode with Low Clamping
Voltage
This integrated transient voltage suppressor device (TVS) is
designed for applications requiring transient overvoltage protection. It
is intended for use in sensitive equipment such as computers, printers,
business machines, communication systems, medical equipment, and
other applications. Its integrated design provides very effective and
reliable protection for four separate lines using only one package.
These devices are ideal for situations where board space is at a premium.
Features
• Low Clamping Voltage
• Small SC−88A SMT Package
• Stand Off Voltage: 5 V
• Low Leakage Current < 1 mA
• Four Separate Unidirectional Configurations for Protection
• ESD Protection: IEC61000−4−2: Level 4
MILSTD 883C − Method 3015−6: Class 3
• Pb−Free Packages are Available
Benefits
• Provides Protection for ESD Industry Standards: IEC 61000, HBM
• Minimize Power Consumption of the System
• Minimize PCB Board Space
Typical Applications
• Instrumentation Equipment
• Serial and Parallel Ports
• Microprocessor Based Equipment
• Notebooks, Desktops, Servers
• Cellular and Portable Equipment
MAXIMUM RATINGS (T
Rating Symbol Value Unit
Peak Power Dissipation
8 20 msec Double Exponential
Waveform (Note 1)
Steady State Power − 1 Diode (Note
2)
Thermal Resistance −
Junction−to−Ambient
Above 25°C, Derate
Operating Junction Temperature
Range
Storage Temperature Range T
Lead Solder Temperature − Maximum
10 Seconds Duration
IEC ^1000−4−2 (ESD) Contact $8.0 kV
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Non−repetitive current pulse per Figure 6.
2. Only 1 diode under power. For all 4 diodes under power, PD will be 25%.
Mounted on FR4 board with min pad.
See Application Note AND8308/D for further description of survivability specs.
= 25°C unless otherwise noted)
A
P
PK
P
D
R
q
JA
T
−40 to +125 °C
J
−55 to +150 °C
stg
T
L
20 W
380 mW
327
3.05
260 °C
°C/W
mW/°C
NSQA6V8AW5T2 SC−88A 3000/Tape & Reel
NSQA6V8AW5T2G SC−88A
NSQA12VAW5T2 3000/Tape & ReelSC−88A
NSQA12VAW5T2G 3000/Tape & ReelSC−88A
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
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1
2
3
SC−88A/SOT−323
CASE 419A
5
4
MARKING DIAGRAM
45
6x MG
G
132
x = H for NSQA6V8AW5T2
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
X for NSQA12VAW5T2
ORDERING INFORMATION
Device Package Shipping
(Pb−Free)
(Pb−Free)
3000/Tape & Reel
†
© Semiconductor Components Industries, LLC, 2009
September, 2009 − Rev. 5
1 Publication Order Number:
NSQA6V8AW5T2/D
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NSQA6V8AW5T2 Series
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol Parameter
I
V
V
RWM
V
P
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (T
NSQA6V8AW5T2
Breakdown Voltage (IT = 1 mA) (Note 3) V
Leakage Current (V
Clamping Voltage 1 (IPP = 1.6 A) (Note 4) V
Maximum Peak Pulse Current (Note 4) I
Junction Capacitance − (VR = 0 V, f = 1 MHz)
Clamping Voltage − Per IEC61000−4−2 V
NSQA12VAW5T2
Breakdown Voltage (IT = 5 mA) (Note 3) V
Leakage Current (V
Zener Impedence (IT = 5 mA) Z
Clamping Voltage 1 (IPP = 0.9 A) (Note 4) V
Maximum Peak Pulse Current (Note 4) I
Junction Capacitance − (VR = 0 V, f = 1 MHz) C
Clamping Voltage − Per IEC61000−4−2 (Note 5) V
3. VBR is measured at pulse test current IT.
4. Surge current waveform per Figure 5.
5. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Maximum Reverse Peak Pulse Current
PP
Clamping Voltage @ I
C
PP
Working Peak Reverse Voltage
I
I
I
V
Maximum Reverse Leakage Current @ V
R
Breakdown Voltage @ I
BR
Test Current
T
Forward Current
F
Forward Voltage @ I
F
Peak Power Dissipation
pk
F
T
C Capacitance @ VR = 0 and f = 1.0 MHz
= 25°C unless otherwise noted)
A
Characteristic Symbol Min Typ Max Unit
= 5.0 V) I
RWM
− (VR = 3.0 V, f = 1 MHz)
= 9.0 V) I
RWM
RWM
VCV
BR
R
C
PP
C
J
C
BR
R
Z
C
PP
J
C
I
I
F
V
RWM
BR
I
V
R
F
I
T
I
PP
Uni−Directional
6.4 6.8 7.1 V
− − 1.0
− − 13 V
− − 1.6 A
−
−
11.4 12.0 12.7 V
− − 0.05
− − 30
− − 23 V
− − 0.9 A
− − 15 pF
12
6.7
Figures 1 and 2 V
Figures 1 and 2 V
15
9.5
V
mA
pF
mA
W
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NSQA6V8AW5T2 Series
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
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NSQA6V8AW5T2 Series
IEC 61000−4−2 Spec.
Test
Voltage
Level
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
(kV)
ESD Gun
First Peak
Current
(A)
Current at
30 ns (A)
TVS
50 W
Cable
IEC61000−4−2 Waveform
I
peak
Current at
60 ns (A)
100%
90%
I @ 30 ns
I @ 60 ns
10%
Figure 3. IEC61000−4−2 Spec
Oscilloscope
50 W
tP = 0.7 ns to 1 ns
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
t
r
90
80
70
60
50
40
30
20
% OF PEAK PULSE CURRENT
10
0
020406080
PEAK VALUE I
t
P
Figure 5. 8 X 20 ms Pulse Waveform
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
@ 8 ms
RSM
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I
t, TIME (ms)
/2 @ 20 ms
RSM
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NSQA6V8AW5T2 Series
100
10
, PEAK SURGE POWER (W)
pk
P
1
1 10 100 1000
t, TIME (ms)
Figure 6. Pulse Width
0.16
0.14
0.12
0.10
0.08
0.06
0.04
, REVERSE LEAKAGE (mA)
R
I
0.02
0
−60 0 80 100
−40 −20 604020
T, TEMPERATURE (°C)
Figure 8. Reverse Leakage versus
Temperature
110
100
PP
90
80
70
60
50
40
30
20
% OF RATED POWER OR I
10
0
TA, AMBIENT TEMPERATURE (°C)
Figure 7. Power Derating Curve
14
12
10
8
(pF)
6
4
1 MHz FREQUENCY
TYPICAL CAPACITANCE
2
0
01 2 3 6
BIAS VOLTAGE (V)
TA = 25°C
45
Figure 9. Capacitance
1501251007550250
6 V
12 V
1
0.1
0.01
, FORWARD CURRENT (A)
F
I
0.001
TA = 25°C
1.81.61.41.21.00.80.6
VF, FORWARD VOLTAGE (V)
Figure 10. Forward Voltage
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NSQA6V8AW5T2 Series
PACKAGE DIMENSIONS
SC−88A/SOT−323/SC−70
5−LEAD PACKAGE
CASE 419A−02
A
G
45
S
12 3
−B−
D
5 PL
MM
B0.2 (0.008)
N
C
ISSUE J
J
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
INCHES
DIMAMIN MAX MIN MAX
B 1.15 1.350.045 0.053
C 0.80 1.100.031 0.043
D 0.10 0.300.004 0.012
G 0.65 BSC0.026 BSC
H --- 0.10---0.004
J 0.10 0.250.004 0.010
K 0.10 0.300.004 0.012
N 0.20 REF0.008 REF
S 2.00 2.200.079 0.087
MILLIMETERS
1.80 2.200.071 0.087
H
K
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.40
0.0157
1.9
0.0748
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury
or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an
Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
0.025
mm
ǒ
inches
Ǔ
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For additional information, please contact your local
Sales Representative
NSQA6V8AW5T2/D
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