Page 1
NSBC114EDP6T5G Series
Preferred Devices
Dual Digital Transistors
(BRT)
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The digital transistor
contains a single transistor with a monolithic bias network consisting
of two resistors; a series base resistor and a base−emitter resistor. The
digital transistor eliminates these individual components by
integrating them into a single device. The use of a digital transistor can
reduce both system cost and board space. The device is housed in the
SOT−963 package which is designed for low power surface mount
applications.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• The SOT−963 Package can be Soldered using Wave or Reflow.
• Available in 4 mm, 8000 Unit Tape & Reel
• These are Pb−Free Devices
• These are Halide−Free Devices
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NPN SILICON DIGITAL
TRANSISTORS
(1)(2)(3)
R
1
R
R
1
2
Q
2
MARKING
DIAGRAM
Q
1
R
2
(4) (5) (6)
MAXIMUM RATINGS (T
Rating
Collector-Base Voltage V
Collector-Emitter Voltage V
Collector Current I
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
= 25°C unless otherwise noted)
A
Symbol Value Unit
CBO
CEO
C
50 Vdc
50 Vdc
100 mAdc
SOT−963
CASE 527AD
X = Specific Device Code
M = Date Code
G = Pb−Free Package
XM
1
ORDERING INFORMATION
Device Package Shipping
NSBC114EDP6T5G SOT−963
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
(Pb−Free)
Tape & Reel
†
8000 /
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2008
October, 2008 − Rev. 3
1 Publication Order Number:
NSBC114EDP6/D
Page 2
NSBC114EDP6T5G Series
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
SINGLE HEATED
Total Device Dissipation
= 25°C (Note 1)
T
A
Derate above 25°C
Thermal Resistance (Note 1)
Junction-to-Ambient
Total Device Dissipation
T
= 25°C (Note 2)
A
Derate above 25°C
Thermal Resistance (Note 2) Junction-to-Ambient
DUAL HEATED (Note 3)
Total Device Dissipation
= 25°C (Note 1)
T
A
Derate above 25°C
Thermal Resistance (Note 1)
Junction-to-Ambient
Total Device Dissipation
TA = 25°C (Note 2)
Derate above 25°C
Thermal Resistance (Note 2) Junction-to-Ambient
Junction and Storage Temperature TJ, T
1. FR−4 @ 100 mm2, 1 oz. copper traces, still air.
2. FR−4 @ 500 mm
2
, 1 oz. copper traces, still air.
3. Dual heated values assume total power is sum of two equally powered channels.
P
D
R
q
JA
P
D
R
q
JA
P
D
R
q
JA
P
D
R
q
JA
stg
231
1.9
mW
mW/°C
540 °C/W
269
2.2
mW
mW/°C
464 °C/W
339
2.7
mW
mW/°C
369 °C/W
408
3.3
mW
mW/°C
306 °C/W
−55 to +150 °C
DEVICE MARKING AND RESISTOR VALUES
Device Marking* R1 (k) R2 (k) Package Shipping
NSBC114EDP6T5G A (270°) 10 10
NSBC124EDP6T5G R (0°) 22 22
NSBC144EDP6T5G D (0°) 47 47
NSBC114YDP6T5G P (0°) 10 47
NSBC123TDP6T5G A (90°) 2.2 ∞
NSBC143EDP6T5G T (0°) 4.7 4.7
SOT−963
(Pb−Free)
8000/Tape & Reel
NSBC143ZDP6T5G Y (0°) 4.7 47
NSBC123JDP6T5G D (90°) 2.2 47
NSBC144WDP6T5G V (0°) 47 22
NSBC114TDP6T5G R (180°) 10 ∞
NSBC115TDP6T5G F (0°) 100 ∞
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*(XX°) = Degree rotation in the clockwise direction.
†
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2
Page 3
NSBC114EDP6T5G Series
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
A
Characteristic
OFF CHARACTERISTICS
Collector−Base Cutoff Current (V
= 50 V, IE = 0) I
CB
Collector−Emitter Cutoff Current (VCE = 50 V, IB = 0) I
Emitter−Base Cutoff Current NSBC114EDP6T5G
(V
= 6.0 V, IC = 0) NSBC124EDP6T5G
EB
NSBC144EDP6T5G
NSBC114YDP6T5G
NSBC114TDP6T5G
NSBC123TDP6T5G
NSBC115TDP6T5G
NSBC143EDP6T5G
NSBC143ZDP6T5G
NSBC123JDP6T5G
NSBC144WDP6T5G
Collector−Base Breakdown Voltage (IC = 10 mA, IE = 0)
Collector−Emitter Breakdown Voltage (Note 4)
(I
= 2.0 mA, IB = 0)
C
ON CHARACTERISTICS (Note 4)
DC Current Gain NSBC114EDP6T5G
(V
= 10 V, IC = 5.0 mA) NSBC124EDP6T5G
CE
NSBC144EDP6T5G
NSBC114YDP6T5G
NSBC114TDP6T5G/NSBC115TDP6T5G/NSBC123TDP6T5G
NSBC143EDP6T5G
NSBC143ZDP6T5G
NSBC123JDP6T5G
NSBC144WDP6T5G
Collector−Emitter Saturation Voltage
(I
= 10 mA, IB = 0.3 mA)
C
NSBC114EDP6T5G/NSBC124EDP6T5G
NSBC144EDP6T5G/NSBC114YDP6T5G
NSBC123JDP6T5G/NSBC144WDP6T5G
(I
= 10 mA, IB = 1 mA)
C
NSBC143EDP6T5G/NSBC143ZDP6T5G
NSBC114TDP6T5G/NSBC123TDP6T5G
(I
= 10 mA, IB = 5.0 mA)
C
NSBC115TDP6T5G
Output Voltage (on)
(V
= 5.0 V, VB = 2.5 V, RL = 1.0 kW) NSBC114TDP6T5G
CC
NSBC114EDP6T5G
NSBC124EDP6T5G
NSBC114YDP6T5G
NSBC123TDP6T5G
NSBC143EDP6T5G
NSBC143ZDP6T5G
NSBC123JDP6T5G
(V
= 5.0 V, VB = 3.5 V, RL = 1.0 kW) NSBC144EDP6T5G
CC
(V
= 5.0 V, VB = 4.0 V, RL = 1.0 kW) NSBC144WDP6T5G
CC
(V
= 5.0 V, VB = 5.0 V, RL = 1.0 kW) NSBC115TDP6T5G
CC
4. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
Symbol Min Typ Max Unit
CBO
CEO
I
EBO
V
(BR)CBO
V
(BR)CEO
h
V
CE(sat)
V
FE
OL
− − 100 nAdc
− − 500 nAdc
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.5
0.2
0.1
0.2
0.9
4.0
0.1
1.5
0.18
0.2
0.13
mAdc
50 − − Vdc
50 − − Vdc
35
60
80
80
160
15
80
80
80
60
100
140
140
350
30
200
150
140
−
−
−
−
−
−
−
−
−
− − 0.25 Vdc
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
Vdc
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3
Page 4
NSBC114EDP6T5G Series
ELECTRICAL CHARACTERISTICS (T
Characteristic Symbol Min Typ Max Unit
ON CHARACTERISTICS (Note 5)
Characteristic
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
NSBC114EDP6T5G/NSBC124EDP6T5G
NSBC144EDP6T5G/NSBC114YDP6T5G
NSBC143EDP6T5G/NSBC123JDP6T5G
NSBC144WDP6T5G
(V
= 5.0 V, VB = 0.25 V, RL = 1.0 kW)
CC
NSBC123TDP6T5G/NSBC143ZDP6T5G/NSBC114TDP6T5G/
NSBC115TDP6T5G
Input Resistor NSBC114TDP6T5G
Resistor Ratio
NSBC114TDP6T5G/NSBC115TDP6T5G//NSBC123TDP6T5G
5. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
NSBC114EDP6T5G/NSBC124EDP6T5G/
NSBC144EDP6T5G/NSBC123EDP6T5G
= 25°C unless otherwise noted)
A
NSBC114EDP6T5G
NSBC124EDP6T5G
NSBC144EDP6T5G
NSBC114YDP6T5G
NSBC114YDP6T5G
NSBC123TDP6T5G
NSBC143EDP6T5G
NSBC143ZDP6T5G
NSBC123JDP6T5G
NSBC144WDP6TG
NSBC115TDP6T5G
NSBC114YDP6T5G
NSBC143ZDP6T5G
NSBC123JDP6T5G
NSBC144WDP6T5G
Symbol Min Typ Max Unit
V
OH
R1 7.0
R1/R
2
4.9 − − Vdc
7.0
15.4
32.9
7.0
7.0
1.5
3.3
3.3
1.54
32.9
70
0.8
0.17
−
0.055
0.038
1.7
10
10
22
47
10
10
2.2
4.7
4.7
2.2
47
100
1.0
0.21
−
0.1
0.047
2.1
13
13
28.6
61.1
13
13
2.9
6.1
6.1
2.86
61.1
130
1.2
0.25
−
0.185
0.056
2.6
kW
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4
Page 5
NSBC114EDP6T5G Series
TYPICAL ELECTRICAL CHARACTERISTICS − NSBC114EDP6T5G
VOLTAGE (V)
, COLLECTOR−TO−EMITTER SATURATION
CE(SAT)
V
1.0
IC/IB = 10
TA=25°C
0.10
0.01
0 5 10 15 20 25 30 35 40 45 50
IC, COLLECTOR CURRENT (mA)
Figure 1. V
2.40
2.20
2.00
1.80
1.60
1.40
TA= 150°C
TA= −55°C
CE(sat)
vs. I
C
1000
VCE = 10 V
25°C
100
150°C
10
, DC CURRENT GAIN
FE
h
1.0
0.1 1 10 100
IC, COLLECTOR CURRENT (mA)
−55°C
Figure 2. DC Current Gain
100
150°C
10
1
−55°C
1.20
, OUTPUT CAPACITANCE (pF)
1.00
OBO
C
0.80
0 5 10 15 20 25 30 35 40 45 50
VCB, COLLECTOR BASE VOLTAGE (V)
Figure 3. Output Capacitance
10
−55°C
25°C
1.0
150°C
, INPUT VOLTAGE (V)
in
V
0.10
0 5 10 15 20 25 30 35 40 45 50
IC, COLLECTOR CURRENT (mA)
Figure 5. Input Voltage vs. Output Current
0.1
25°C
, COLLECTOR CURRENT (mA)
C
I
0.01
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Vin, INPUT VOLTAGE (V)
Figure 4. Output Current vs. Input Voltage
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5
Page 6
NSBC114EDP6T5G Series
TYPICAL APPLICATIONS FOR NPN BRTs
+12 V
FROM mP OR
OTHER LOGIC
Figure 6. Level Shifter: Connects 12 or 24 Volt Circuits to Logic
ISOLATED
LOAD
V
CC
OUT
IN
Figure 7. Open Collector Inverter:
Inverts the Input Signal
+12 V
LOAD
Figure 8. Inexpensive, Unregulated Current Source
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Page 7
NSBC114EDP6T5G Series
PACKAGE DIMENSIONS
SOT−963
CASE 527AD−01
ISSUE D
D
456
12 3
e
A
B
A
E
C
L
H
E
C
6X
b
B
C0.08
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
MILLIMETERS
DIM MIN NOM MAX
A 0.34 0.37 0.40
b 0.10 0.15 0.20
C 0.07 0.12 0.17
D 0.95 1.00 1.05
E 0.75 0.80 0.85
e 0.35 BSC
L 0.05 0.10 0.15
H
E
0.95 1.00 1.05
INCHES
MIN NOM MAX
0.004 0.006 0.008
0.003 0.005 0.007
0.037 0.039 0.041
0.03 0.032 0.034
0.014 BSC
0.002 0.004 0.006
0.037 0.039 0.041
SOLDERING FOOTPRINT*
0.35
0.35
0.014
0.014
0.90
0.0354
0.20
0.008
0.20
0.008
SCALE 20:1
ǒ
inches
mm
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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Sales Representative
NSBC114EDP6/D
7
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