nRF402 is a true single chip UHF transmitter designed to operate in the 433MHz ISM
(Industrial, Scientific and Medical) frequency band. It features Frequency Shift
Keying (FSK) modulation capability. nRF402 operates at data rates up to 20kbits/s.
Transmit power can be adjusted to a maximum of +10dBm. Antenna interface is
differential and suited for low cost PCB antennas. nRF402 operates from a single 3V
DC supply and has a standby mode which makes power saving easy and efficient.
As a primary application, nRF402 is intended for UHF radio equipment in compliance
with the European Telecommunication Standard Institute (ETSI) specification
EN 300 220-1 V1.2.1.
QUICK REFERENCE DATA
ParameterValueUnit
Frequency, Channel#1/Channel#2433.92 / 434.33MHz
ModulationFSK
Frequency deviation
Max. RF output power @ 400Ω, 3V
Maximum bit rate20kbit/s
Supply voltage2.7 – 3.6V
Transmit supply current @ -10 dBm RF output power8mA
Standby supply current8
The timing information for the different operations is summarised in Table 5.
(TX is transmit mode, Std.by is standby mode.)
Change of ModeNameMax DelayCondition
Std.byè TXt
VDD=0 è TXt
ST
VT
Table 5 Switching times for nRF402
Switching between standby and TX-mode.
The maximum time from the PWR_UP input is set to “1”, until the synthesised
frequency is stable is tST, see Table 5 and Figure 4.
Std.by to TX
VDD
2msOperational
mode
4msStart-up
PWR_UP
DIN
2ms
ms
024
Figure 4 Timing diagram for nRF402 when going from standby to TX-mode
Powering up to transmit-mode (start-up).
Due to spurious emission when the power supply is switched on, the PWR_UP-input
must be kept low for 2ms after VDD > 2.7 V. Data (DIN) is valid within 2ms after
PWR_UP is high.
VDD=0 to TX
VDD
PWR_UP
DIN
2ms2ms
ms
0
24
Figure 5. Timing diagram for nRF402, when powering up to TX-mode
The ANT1 and ANT2 pins provide RF output from the output stage (PA) for nRF402.
The antenna connection to nRF402 is differential and the recommended load
impedance at the antenna port is 400Ω.
Figure 11 shows a typical application schematic with a differential loop antenna on a
Printed Circuit Board (PCB). The output stage (PA) consists of two open collector
transistors in a differential pair configuration. VDD to the PA must be supplied
through the collector load. When connecting a differential loop antenna to the
ANT1/ANT2 pins, VDD should be supplied through the centre of the loop antenna as
shown in Figure 11.
A single ended antenna or 50Ω test instrument may be connected to nRF402 by using
a differential to single ended matching network (BALUN) as shown in Figure 6.
VDD
180nH
22nH
ANT1
470pF
nRF402
ANT2
1.8pF
22nH
VDD
1nF
1.5pF
22nH
Figure 6. Connection of nRF402 to single ended antenna by using
a differential to single ended matching network
The 180nH inductor to VDD in Figure 6, need to have a Self-Resonance Frequency
(SRF) above 433 MHz to be effective. Suitable inductors are listed in Table 6.
Table 6. Vendors and part. no. for suitable 180nH inductors.
A single ended antenna may also be connected to nRF402 using an 8:1 impedance RF
transformer. The RF transformer must have a centre tap at the primary side for VDD
supply.
The external bias resistor R3 connected between the RF_PWR pin and VSS sets the
output power. The RF output power may be set to levels up to +10dBm. In Figure 7
the output power is plotted for power levels down to, but not limited to, –8.5dBm for
a differential load of 400Ω. DC power supply current versus external bias resistor
value is shown in Figure 8.
10
8
6
4
2
0
-2
-4
-6
-8
-10
020406080100120140160180200
22
27
33
39
47
56
68
82
100
120
150
180
Resistor Value [kΩΩ]
Figure 7. RF Output power vs. external power setting resistor (R3) for nRF402
30,0
25,0
20,0
15,0
10,0
5,0
22
27
33
39
47
56
68
82
100
120
150
180
0,0
020406080100120140160180200
Resistor Value [kΩΩ]
Figure 8. Total chip current consumption vs. external power setting resistor (R3) for
An external 22nH inductor connected between the VCO1 and VCO2 pins is required
for the on-chip voltage controlled oscillator (VCO). This inductor should be a high
quality chip inductor, Q > 45 @ 433 MHz, with a maximum tolerance of ± 2%. The
following 22 nH inductors (0603) are suitable for use with nRF402, see Table 7.
Figure 9. Crystal oscillator and crystal equivalent
Sharing a reference crystal with a micro-controller
Figure 10 shows circuit diagram of a typical application where nRF402 and a micro
controller share the reference crystal.
XC1
micro
controller
X1X2
4.0 MHz
C1
22pF
R
C
5.6pF
C2
22pF
1.0M
nRF402
XC2
Figure 10. nRF402 and a micro-controller sharing the reference crystal
The crystal reference line from the micro-controller should not be routed close to full
swing digital data or control signals.
Channel#1 / Channel#2 selection
CS is a digital input for selection of either channel#1 (f1=433.92MHz)
or channel#2 (f2=434.33MHz).
CS = “0” selects channel#1.
CS = “1” selects channel#2.
DIN (data input)
The DIN pin is the input to the digital modulator of the transmitter. The input signal
to this pin should be standard CMOS logic level at data rates up to 20 kbit/s.
PWR_UP is a digital input for selection of normal operating mode or standby mode.
PWR_UP = “1” selects normal operating mode.
PWR_UP = “0” selects standby mode.
LPF pin
LPF is the loop filter test pin. This may be used for measurement of the loop filter
voltage. In a normal application this pin should only be connected to a solder pad. No
PCB lines should be connected to this pin.
Frequency difference between transmitter and receiver
Assuming the nRF401 transceiver chip is used for demodulation, the total frequency
difference between transmitter and receiver should not exceed 70 ppm (30 kHz). This
yields a crystal stability requirement of ±35 ppm for the transmitter and receiver.
Frequency difference exceeding this will result in a 12dB/octave drop in receiver
sensitivity. The functional window of the transmission link is typically 450 ppm (200
kHz).
Example: A crystal with ±20 ppm frequency tolerance and ±25 ppm frequency
stability over temperature has a worst case frequency difference of ±45 ppm. If the
transmitter and receiver operate in different temperature environments, the resulting
worst-case frequency difference may be as high as 90 ppm. Resulting drop in
sensitivity due to the extra 20 ppm, is then approx. 5dB.
PCB layout and decoupling guidelines
A well-designed PCB is necessary to achieve good RF performance. A PCB with a
minimum of two layers including a ground plane is recommended for optimum
performance.
The nRF402 DC supply voltage should be decoupled as close as possible to the VDD
pins with high performance RF capacitors, see Table 8. It is preferable to mount a
large surface mount capacitor (e.g. 2.2 µF ceramic) in parallel with the smaller value
capacitors. The nRF402 supply voltage should be filtered and routed separately from
the supply voltages of any digital circuitry.
Long power supply lines on the PCB should be avoided. All device grounds, VDD
connections and VDD bypass capacitors must be connected as close as possible to the
nRF402 IC. For a PCB with a topside RF ground plane, the VSS pins should be
connected directly to the ground plane. For a PCB with a bottom ground plane, the
best technique is to have via holes in or close to the VSS pads.
Full swing digital data or control signals should not be routed close to the external
VCO inductor or the LPF pin.
The VCO inductor placement is important. The optimum placement of the VCO
inductor gives a PLL loop filter voltage of 1.1 ±0.2 V, which can be measured at LPF
(pin 6). For a 22nH, 0603 size inductor the length between the centre of the
VCO1/VCO2 pad and the centre of the inductor pad should be 5.4 mm, see Figure 12
(c) (layout, top view), for a 2 layer, 1.6 mm thick FR4 PCB.
PCB layout example
Figure 12 shows a PCB layout example for the application schematic in Figure 11.
A double-sided FR-4 board of 1.6mm thickness is used. This PCB has a continuous
ground plane on the bottom layer. Additionally, there are ground areas on the
component side of the board to ensure sufficient grounding of critical components. A
large number of via holes connect the top layer ground areas to the bottom layer
ground plane. There is no ground plane beneath the antenna.
For more layout information, please refer to application note nAN400-06,
“nRF402 RF and antenna layout”.
Stress above one or more of the limiting values may cause permanent damage to the device. These are stress
ratings only and operation of the device at these or at any other conditions above those given in the
Specifications sections of the specification is not implied. Exposure to limiting values for extended periods may
affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Nordic VLSI ASA reserves the right to make changes without further notice to the
product to improve reliability, function or design. Nordic VLSI does not assume any
liability arising out of the application or use of any product or circuits described
herein.
This datasheet contains preliminary data; supplementary data may be
published from Nordic VLSI ASA later.
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Table 9. Definitions
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems
where malfunction of these products can reasonably be expected to result in personal
injury. Nordic VLSI ASA customers using or selling these products for use in such
applications do so at their own risk and agree to fully indemnify Nordic VLSI ASA
for any damages resulting from such improper use or sale.
Product specification: Revision Date: 29.02.2000.
Datasheet order code: 290200nRF402.
All rights reserved ®. Reproduction in whole or in part is prohibited without the prior
written permission of the copyright holder.