Datasheet NDT456P Datasheet (Fairchild)

December 1998

NDT456P

P-Channel Enhancement Mode Field Effect Transistor

General Description Features

Power SOT P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management, battery powered circuits, and DC motor control.

______________________________________________________________________________

-7.5 A, -30 V. R R

High density cell design for extremely low R

= 0.030 Ω @ VGS = -10 V

DS(ON)

= 0.045 Ω @ VGS = -4.5 V.

DS(ON)

.

High power and current handling capability in a widely used surface mount package.

D

D S

G

D

G

S

Absolute Maximum Ratings T

Symbol Parameter NDT456P Units

V

DSS

V

GSS

I

D

P

D

TJ,T

THERMAL CHARACTERISTICS

R

θ

R

θ

Drain-Source Voltage -30 V Gate-Source Voltage ±20 V Drain Current - Continuous (Note 1a) ±7.5 A

- Pulsed ±20

Maximum Power Dissipation (Note 1a) 3 W

(Note 1b) 1.3 (Note 1c)

Operating and Storage Temperature Range -65 to 150 °C

STG

Thermal Resistance, Junction-to-Ambient (Note 1a) 42 °C/W

JA

Thermal Resistance, Junction-to-Case (Note 1) 12 °C/W

JC

= 25°C unless otherwise noted

A

1.1

NDT456P Rev. F

Electrical Characteristics (T

= 25°C unless otherwise noted)

A

Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS

BV I

DSS

Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA -30 V Zero Gate Voltage Drain Current VDS = -24 V, V

= 0 V -1 µA

GS

TJ = 55°C -10 µA

I

GSSF

I

GSSR

Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA

ON CHARACTERISTICS (Note 2)

V

GS(th)

Gate Threshold Voltage VDS = VGS, ID = - 250 µA -1 -1.5 -3 V

TJ = 125°C -0.5 -1.1 -2.6

R

DS(ON)

Static Drain-Source On-Resistance VGS = -10 V, ID = -7.5 A 0.026 0.03

Ω

TJ = 125°C 0.035 0.054

VGS = - 4.5 V, ID = -6 A 0.041 0.045

I

D(on)

On-State Drain Current VGS = -10 V , VDS = - 5 V -20 A

VGS = -4.5 V, VDS = - 5 V -10

G

fs

Forward Transconductance VGS = -10 V, ID = -7.5 A 13 S

DYNAMIC CHARACTERISTICS

C

iss

C

oss

C

rss

Input Capacitance VDS = -15 V, V Output Capacitance 905 pF

f = 1.0 MHz

GS

= 0 V,

1440 pF

Reverse Transfer Capacitance 355 pF

SWITCHING CHARACTERISTICS (Note 2)

t t t t Q Q Q

D(on)

r

D(off)

f

g

gs

gd

Turn - On Delay Time VDD = -15 V, ID = -7 A,

V

= -10 V, R

Turn - On Rise Time 65 120 ns

GEN

= 12 Ω

10 20 ns

Turn - Off Delay Time 70 130 ns Turn - Off Fall Time 70 130 ns Total Gate Charge VDS = -10 V, Gate-Source Charge 5 nC

ID = -7.5 A, VGS = -10 V

47 67 nC

Gate-Drain Charge 12 nC

NDT456P Rev. F

Electrical Characteristics (T

(t)

T

−

T

θJA

T

−

T

θJC+RθCA

(t)

= 25°C unless otherwise noted)

A

Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

I

S

V

SD

t

rr

Notes:

P

1. R

D

solder mounting surface of the drain pins. R typical R

Maximum Continuous Drain-Source Diode Forward Current -2.5 A Drain-Source Diode Forward Voltage VGS = 0 V, IS = - 2.5 A (Note 2) - 0.85 -1.2 V Reverse Recovery Time VGS = 0 V, IF = - 2.5 A dIF/dt = 100 A/µs 140 ns

J

A

=

R

is found to be:

JA

θ

a. 42oC when mounted on a 1 in2 pad of 2oz copper. b. 95oC when mounted on a 0.066in2 pad of 2oz copper. c. 110oC/W when mounted on a 0.00123in2 pad of 2oz copper.

J

=

(t)

R

2

A

= I

(t)

is guaranteed by design while R

JC

θ

×R

DS(ON)@T

D

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the

JA

θ

J

is defined by users. For general reference: Applications on 4.5"x5" FR-4 PCB under still air environment,

CA

θ

1a

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

1b

1c

NDT456P Rev. F

Typical Electrical Characteristics

-20

V = -10V

GS

-6.0

-16

-5.0

-12

-8

-4

D

I , DRAIN-SOURCE CURRENT (A)

0

-4.5

-4.0

-3.5

-3.0

V , DRAIN-SOURCE VOLTAGE (V)

DS

Figure 1. On-Region Characteristics.

1.5

I =-7.5A

D

V = -10V

GS

1.25

1

DS(ON)

R , NORMALIZED

0.75

DRAIN-SOURCE ON-RESISTANCE

0.5

-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)

J

-2.5

-3-2-10

2.5

V =-3.5V

GS

2

-4.0

-4.5

1.5

DS(on)

1

R , NORMALIZED

DRAIN-SOURCE ON-RESISTANCE

0.5

I , DRAIN CURRENT (A)

D

-5.0

Figure 2. On-Resistance Variation with Gate

Voltage and Drain Current.

2.5

V = -10V

GS

2

T = 125°C

1.5

1

DS(on)

R , NORMALIZED

0.5

DRAIN-SOURCE ON-RESISTANCE

0

J

I , DRAIN CURRENT (A)

D

25°C

-7.0

-10

-20-16-12-8-40

-55°C

-20-16-12-8-40

Figure 3. On-Resistance Variation with

Temperature.

-20

V =- 10V

DS

-16

-12

-8

D

I , DRAIN CURRENT (A)

-4

0

V , GATE TO SOURCE VOLTAGE (V)

GS

T = -55°C

J

25

125

-4-3.2-2.4-1.6-0.8

Figure 4. On-Resistance Variation with Drain

Current and Temperature.

1.2

1.1

1

0.9

0.8

GS(th)

V , NORMALIZED

0.7

GATE-SOURCE THRESHOLD VOLTAGE

0.6

-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)

J

Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with

Temperature.

V = V

DS

GS

I =- 250µA

D

NDT456P Rev. F

Typical Electrical Characteristics

1.1

I =- 250µA

D

1.08

1.06

1.04

1.02

1

DSS

0.98

BV , NORMALIZED

0.96

DRAIN-SOURCE BREAKDOWN VOLTAGE

0.94

-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)

J

Figure 7. Breakdown Voltage Variation with

Temperature.

4000 3000

2000

1000

500

CAPACITANCE (pF)

400 300

200

f = 1 MHz V = 0V

GS

0.1 0.2 0.5 1 2 5 10 20 30 V , DRAIN TO SOURCE VOLTAGE (V)

DS

C C

C

iss oss

rss

20

V = 0V

GS

5

1

0.1

0.01

0.001

S

-I , REVERSE DRAIN CURRENT (A)

0.0001 0 0.2 0.4 0.6 0.8 1 1.2

-V , BODY DIODE FORWARD VOLTAGE (V)

T = 125°C

J

25°C

-55°C

SD

Figure 8. Body Diode Forward Voltage Variation

with Current and Temperature.

10

I = -7.5A

D

8

6

4

2

GS

-V , GATE-SOURCE VOLTAGE (V) 0

0 10 20 30 40 50 60

Q , GATE CHARGE (nC)

g

V =- 5V

DS

-10V

-20V

Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics.

-V

V

IN

V

GS

R

GEN

G

Figure 11. Switching Test Circuit.

DD

t

V

d(on)

OUT

R

L

D

V

OUT

DUT

S

V

IN

10%

t t

on off

t

r

t

d(off)

90%

10%

50%

PULSE WIDTH

Figure 12. Switching Waveforms.

50%

90%

10%

t

f

INVERTED

NDT456P Rev. F

Typical Thermal Characteristics

18

V = -5V

DS

15

12

T = -55°C

J

25°C

125°C

9

6

3

FS

g , TRANSCONDUCTANCE (SIEMENS)

0

I , DRAIN CURRENT (A)

D

Figure 13. Transconductance Variation with Drain

Current and Temperature.

10

8

6

1b

1c

4

4.5"x5" FR-4 Board

2

D

-I , STEADY-STATE DRAIN CURRENT (A)

0

0 0.2 0.4 0.6 0.8 1

2oz COPPER MOUNTING PAD AREA (in )

T = 25 C

A

Still Air V = -10V

GS

2

o

3.5

3

2.5

2

1.5

1b

1c

1

STEADY-STATE POWER DISSIPATION (W)

0.5

-10-8-6-4-20

0 0.2 0.4 0.6 0.8 1

2oz COPPER MOUNTING PAD AREA (in )

4.5"x5" FR-4 Board

o

T = 25 C

A

Still Air

2

1a

Figure 14. SOT-223 Maximum Steady-State Power

Dissipation versus Copper Mounting Pad Area.

40 20

1a

10

RDS(ON) LIMIT

3

1

0.3

V = -10V

GS

SINGLE PULSE

0.1

D

-I , DRAIN CURRENT (A)

R = See Note 1c

JA

θ

A

T = 25°C

0.03

0.01

0.1 0.2 0.5 1 2 5 10 30 50

- V , DRAIN-SOURCE VOLTAGE (V)

DS

10s

DC

100us

1ms

10ms

100ms

1s

Figure 15. Maximum Steady-State Drain

Figure 16. Maximum Safe Operating Area. Current versus Copper Mounting Pad Area.

1

0.5

D = 0.5

0.2

0.1

0.05

0.02

0.01

0.005

r(t), NORMALIZED EFFECTIVE

0.002

TRANSIENT THERMAL RESISTANCE

0.001

0.05

0.02

0.01

Single Pulse

0.0001 0.001 0.01 0.1 1 10 100 300

Figure 17. Transient Thermal Response Curve.

Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design.

t , TIME (sec)

1

R (t) = r(t) * R

JA

θ

R = See Note 1 c

JA

θ

P(pk)

t

1

t

2

T - T = P * R (t)

J

Duty Cycle, D = t / t

θ

JA

θ

JAA

2

1

NDT456P Rev. F

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ CoolFET™ CROSSVOLT™

2

E

CMOS

TM

FACT™ FACT Quiet Series™

®

FAST FASTr™ GTO™ HiSeC™

ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™

Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8

TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.