Datasheet NDT3055 Datasheet (Fairchild)

Page 1
May 1998
NDT3055 N-Channel Enhancement Mode Field Effect Transistor
General Description Features
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed.
SuperSOTTM-3
D
SuperSOTTM-6
SuperSOTTM-8
D
S
D
SOT-223
G
G
D S
4 A, 60 V. R High density cell design for extremely low R
= 0.100 Ω @ VGS = 10 V.
DS(ON)
DS(ON)
High power and current handling capability in a widely used surface mount package.
SO-8
SOT-223
D
S
G
G
SOT-223*
(J23Z)
.
SOIC-16
D
S
= 25oC unless otherwise noted
A
Symbol Parameter NDT3055 Units
V
DSS
V
GSS
I
D
Drain-Source Voltage 60 V Gate-Source Voltage - Continuous ±20 V Maximum Drain Current - Continuous (Note 1a) 4 A
- Pulsed 25
P
D
TJ,T
Maximum Power Dissipation (Note 1a) 3 W
(Note 1b)
(Note 1c)
Operating and Storage Temperature Range -65 to 150 °C
STG
1.3
1.1
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
Thermal Resistance, Junction-to-Ambient (Note 1a) 42 °C/W Thermal Resistance, Junction-to-Case (Note 1) 12 °C/W
* Order option J23Z for cropped center drain lead.
© 1998 Fairchild Semiconductor Corporation
NDT3055 Rev.B
Page 2
Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS
BV
∆BV
I
DSS
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 60 V Breakdown Voltage Temp. Coefficient
/∆T
J
Zero Gate Voltage Drain Current
ID = 250 µA, Referenced to 25 o C VDS = 48 V, V
GS
= 0 V
63
10 µA
mV/o C
TJ =125°C 100 µA
I
GSSF
I
GSSR
Gate - Body Leakage, Forward
VGS = 20 V, VDS = 0 V
Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA
100 nA
ON CHARACTERISTICS (Note 2)
V
GS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
2 3 4 V
TJ =125°C 1.5 2.4 3
R
DS(ON)
Static Drain-Source On-Resistance
VGS = 10 V, ID = 4 A
0.084 0.1
Ω
TJ =125°C 0.14 0.18
I
D(ON)
g
On-State Drain Current
FS
Forward Transconductance VDS = 15 V, ID = 4 A 6 S
VGS = 10 V, VDS = 10 V
15 A
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance 100 pF
VDS = 30 V, VGS = 0 V, f = 1.0 MHz
Reverse Transfer Capacitance 30 pF
250 pF
SWITCHING CHARACTERISTICS (Note 2)
t t t t Q Q Q
D(on)
r
D(off)
f
g
gs
gd
Turn - On Delay Time VDD = 25 V, ID = 1.2 A, Turn - On Rise Time 18 50 ns
VGS = 10 V, R
GEN
= 50 Ω
10 25 ns
Turn - Off Delay Time 37 65 ns Turn - Off Fall Time 30 60 ns Total Gate Charge VDS = 40 V, ID = 4 A, Gate-Source Charge 2.3 nC
VGS = 10 V
9 15 nC
Gate-Drain Charge 2.6 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
guaranteed by design while R Typical R
Maximum Continuous Drain-Source Diode Forward Current 2.5 A Drain-Source Diode Forward Voltage
is determined by the user's board design.
CA
using the board layouts shown below on FR-4 PCB in a still air environment:
JA
θ
θ
VGS = 0 V, IS = 2.5 A
(Note 2)
0.85 1.2 V
is
JC
θ
a. 42oC/W when mounted on a 1 in2 pad of
2oz Cu.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
b. 95oC/W when mounted on a 0.066 in
pad of 2oz Cu.
2
c. 110oC/W when mounted on a 0.00123
2
in
pad of 2oz Cu.
NDT3055 Rev.B
Page 3
Typical Electrical Characteristics
15
12
V =10V
GS
8.0V
7.0V
9
6.0V
6
3
D
I , DRAIN-SOURCE CURRENT (A)
0
0 1 2 3 4 5
V , DRAIN-SOURCE VOLTAGE (V)
DS
5.5V
5.0V
Figure 1. On-Region Characteristics.
2
I = 4A
D
V =10V
GS
1.6
1.2
DS(ON)
0.8
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.4
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
4.5V
3
V = 5.5V
GS
2.5
2
1.5
DS(ON)
R , NORMALIZED
1
DRAIN-SOURCE ON-RESISTANCE
0.5 0 4 8 12 16 20
6.0V
6.5V
7.0V
I , DRAIN CURRENT (A)
D
8.0V 10V
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.4
0.3
0.2
0.1
DS(ON)
R , ON-RESISTANCE (OHM)
0
4 6 8 10
V , GATE TO SOURCE VOLTAGE (V)
GS
T = 125°C
A
T = 25°C
A
I = 2A
D
Figure 3. On-Resistance Variation
with Temperature.
10
V = 10V
DS
8
6
4
D
I , DRAIN CURRENT (A)
2
0
2 4 6 8
V , GATE TO SOURCE VOLTAGE (V)
GS
T = -55°C
J
25°C
125°C
Figure 5. Transfer Characteristics.
Figure 4. On-Resistance Variation with
Gate-to- Source Voltage.
10
V = 0V
GS
1
0.1
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2
V , BODY DIODE FORWARD VOLTAGE (V)
SD
T = 125°C
A
25°C
-55°C
Figure 6. Body Diode Forward Voltage
Variation with Current and Temperature.
NDT3055 Rev.B
Page 4
Typical Electrical Characteristics (continued)
15
I = 4A
D
12
9
6
3
GS
V , GATE-SOURCE VOLTAGE (V)
0
0 3 6 9 12 15
V = 10V
DS
Q , GATE CHARGE (nC)
g
20V
40V
Figure 7. Gate Charge Characteristics.
50
DC
10s
100us
1ms
10ms
100ms
1s
10
0.3
0.1
D
I , DRAIN CURRENT (A)
0.03
0.01
RDS(ON) LIMIT
3 1
V = 10V
GS
SINGLE PULSE
o
R = 110 C/W
JA
θ
T = 25°C
A
0.1 0.2 0.5 1 2 5 10 30 60 100 V , DRAIN-SOURCE VOLTAGE (V)
DS
1000
500
C
200
100
50
CAPACITANCE (pF)
f = 1 MHz
20
V = 0V
GS
10
0.1 0.3 1 4 10 30 60 V , DRAIN TO SOURCE VOLTAGE (V)
DS
C
C
iss
oss
rss
Figure 8. Capacitance Characteristics.
80
SINGLE PULSE
R =110°C/W
JA
60
40
POWER (W)
20
0
0.001 0.01 0.1 1 10 100 300 SINGLE PULSE TIME (SEC)
θ
T = 25°C
A
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
1
D = 0.5
0.5
0.2
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
0.01
0.005
r(t), NORMALIZED EFFECTIVE
0.002
TRANSIENT THERMAL RESISTANCE
0.001
Single Pulse
0.0001 0.001 0.01 0.1 1 10 100 300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1c.
Transient thermal response will change depending on the circuit board design.
t , TIME (sec)
1
R (t) = r(t) * R
JA
θ
R = 110 °C/W
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
θ
JA
1 2
JA
θ
NDT3055 Rev.B
Page 5
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™
2
CMOS
E
TM
FACT™ FACT Quiet Series™
®
FAST FASTr™ GTO™ HiSeC™
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™
Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8
TinyLogic™ UHC™ VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
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