Datasheet NDT014L Datasheet (Fairchild Semiconductor)

Page 1
August 1996
NDT014L N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes.Thesedevices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed.
_________________________________________________________________________________
2.8 A, 60 V. R R
High density cell design for extremely low R
= 0.2 Ω @ VGS = 4.5 V
DS(ON)
= 0.16 Ω @ VGS = 10 V.
DS(ON)
DS(ON)
.
High power and current handling capability in a widely used surface mount package.
D
G
S
Absolute Maximum Ratings T
D
G
D S
= 25°C unless otherwise noted
Symbol Parameter NDT014L Units
V
DSS
V
GSS
I
D
Drain-Source Voltage 60 V Gate-Source Voltage ± 20 V Drain Current - Continuous (Note 1a) ± 2.8 A
- Pulsed ± 10
P
D
TJ,T
Maximum Power Dissipation (Note 1a) 3 W
(Note 1b) 1.3 (Note 1c)
Operating and Storage Temperature Range -65 to 150 °C
STG
1.1
THERMAL CHARACTERISTICS
R
θ
R
θ
Thermal Resistance, Junction-to-Ambient (Note 1a) 42 °C/W
JA
Thermal Resistance, Junction-to-Case (Note 1) 12 °C/W
JC
© 1997 Fairchild Semiconductor Corporation
NDT014L Rev.D
Page 2
Electrical Characteristics (T
= 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS
BV I
DSS
I
GSSF
I
GSSR
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 60 V Zero Gate Voltage Drain Current
VDS = 60 V, V
GS
= 0 V
TJ = 55°C
25 µA
250 µA Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA Gate - Body Leakage, Reverse
VGS = -20 V, VDS= 0 V
-100 nA
ON CHARACTERISTICS (Note 2)
V
R
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 1.5 3 V
0.8 1.1 2
0.17 0.2
Static Drain-Source On-Resistance
TJ = 125°C
VGS= 4.5 V, ID = 2.8 A
Ω
TJ = 125°C 0.22 0.36
0.12 0.16
10
I
G
D(on)
VGS = 10 V, ID = 3.4 A
On-State Drain Current VGS = 4.5 V , VDS = 5 V 5 A
VGS = 10 V, VDS = 5 V
FS
Forward Transconductance VGS = 5 V, ID = 2.8 A 4.2 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance 70 pF
VDS = 30 V, V f = 1.0 MHz
= 0 V,
GS
Reverse Transfer Capacitance 27 pF
214 pF
SWITCHING CHARACTERISTICS (Note 2)
t t t t Q Q Q
D(on)
r
D(off)
f
Turn - On Delay Time Turn - On Rise Time 14 25 ns
VDD = 30 V, ID = 3 A, V
= 10 V, R
GEN
GEN
= 12 Ω
Turn - Off Delay Time 15 28 ns Turn - Off Fall Time 10 18 ns
g
gs
gd
Total Gate Charge Gate-Source Charge 0.8 nC Gate-Drain Charge 1.4 nC
VDS = 10 V, ID = 2.8 A, VGS = 4.5 V
6 12 ns
3.6 5 nC
NDT014L Rev.D
Page 3
Electrical Characteristics (T
TJ−
T
θJA
TJ−
T
θJC+RθCA
= 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
t
rr
Notes:
1. R
D
solder mounting surface of the drain pins. R R
Maximum Continuous Drain-Source Diode Forward Current 2.3 A Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 2.3 A (Note 2)
0.85 1.3 V
Reverse Recovery Time VGS = 0 V, IF = 2.3 A dIF/dt = 100 A/µs 140 ns
A
(t)
=
(t)
R
is found to be:
JA
θ
a. 42oC/W with 1 in2 of 2 oz copper mounting pad. b. 95oC/W with 0.066 in2 of 2 oz copper mounting pad. c. 110oC/W with 0.0123 in2 of 2 oz copper mounting pad.
A
2
=
R
(t)
= I
× R
DS(ON)@T
D
(t)
is guaranteed by design while R
JC
θ
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as theP
JA
θ
J
is defined by users. For general reference: Applications on 4.5"x5" FR-4 PCB under still air environment, typical
CA
θ
1a
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
1b
1c
NDT014L Rev.D
Page 4
R , NORMALIZED
R , NORMALIZED
Typical Electrical Characteristics
R , NORMALIZED
V , NORMALIZED
10
V = 10V
GS
6.0
8
6
4
2
D
I , DRAIN-SOURCE CURRENT (A)
0
0 1 2 3 4 5
5.0
4.5
4.0
3.5
V , DRAIN-SOURCE VOLTAGE (V)
DS
3.0
Figure 1. On-Region Characteristics.
1.75
I = 2.8A
D
V = 4.5V
GS
1.5
1.25
1
DS(ON)
0.75
DRAIN-SOURCE ON-RESISTANCE
2.5
2
1.75
V =3.0V
GS
1.5
1.25
1
DS(on)
DRAIN-SOURCE ON-RESISTANCE
0.75
0.5 0 2 4 6 8 10
3.5
4.0
4.5
I , DRAIN CURRENT (A)
D
5.0
Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current.
2
V = 4.5V
GS
1.75
1.5
1.25
1
DS(on)
DRAIN-SOURCE ON-RESISTANCE
0.75
T = 125°C
J
25°C
6.0 10
-55°C
0.5
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
Figure 3. On-Resistance Variation with
Temperature.
10
V = 5V
DS
8
6
4
D
I , DRAIN CURRENT (A)
2
0
0 1 2 3 4 5 6
V , GATE TO SOURCE VOLTAGE (V)
GS
T = -55°C
J
25°C
125°C
Figure 5. Transfer Characteristics.
0.5 0 2 4 6 8 10
I , DRAIN CURRENT (A)
D
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
1.2
V = V
DS
I = 250µA
1.1
D
1
0.9
GS(th)
0.8
GATE-SOURCE THRESHOLD VOLTAGE
0.7
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
Figure 6. Gate Threshold Variation with
Temperature.
GS
NDT014L Rev.D
Page 5
BV , NORMALIZED
Typical Electrical Characteristics
1.12
I = 250µA
D
1.08
1.04
1
DSS
0.96
DRAIN-SOURCE BREAKDOWN VOLTAGE
0.92
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation with
Temperature.
700 500
C
iss
200
C
100
50
CAPACITANCE (pF)
f = 1 MHz V = 0V
20
GS
oss
C
rss
10
V = 0V
GS
1
T = 125°C
0.1
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001
0.2 0.4 0.6 0.8 1 1.2
J
25°C
-55°C
V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
10
I = 2.8A
D
8
6
4
2
GS
V , GATE-SOURCE VOLTAGE (V)
V = 5V
DS
10V
20V
10
0.1 0.2 0.5 1 2 5 10 20 40 60 V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 9. Capacitance Characteristics.
V
DD
V
IN
V
GS
R
GEN
G
R
L
D
S
DUT
V
OUT
Figure 11. Switching Test Circuit.
0
0 2 4 6 8 10
Q , GATE CHARGE (nC)
g
Figure 10. Gate Charge Characteristics.
t t
on off
t
d(off)
90%
10%
V
t
d(on)
OUT
r
90%
10%
90%
V
IN
50%
50%
10%
PULSE WIDTH
Figure 12. Switching Waveforms.
tt
f
INVERTED
NDT014L Rev.D
Page 6
Typical Thermal Characteristics
8
V = 5V
DS
T = -55°C
6
J
25°C
4
2
FS
g , TRANSCONDUCTANCE (SIEMENS)
0
0 2 4 6 8 10
I , DRAIN CURRENT (A)
D
125°C
Figure 13. Transconductance Variation with Drain
Current and Temperature.
4
3
1b
2
1c
1
D
I , STEADY-STATE DRAIN CURRENT (A)
0
0 0.1 0.2 0.3 0.4 0.5
2oz COPPER MOUNTING PAD AREA (in )
4.5"x5" FR-4 Board
o
T = 25 C
A
Still Air V = 4.5V
GS
2
3.5
3
2.5
2
1.5
1b
1c
1
STEADY-STATE POWER DISSIPATION (W)
0.5 0 0.2 0.4 0.6 0.8 1
2oz COPPER MOUNTING PAD AREA (in )
4.5"x5" FR-4 Board
o
T = 25 C
A
Still Air
2
1a
Figure 14. SOT-223 Maximum Steady- State
Power Dissipation versus Copper Mounting Pad Area.
20 10
1a
5
RDS(ON) LIMIT
1
0.5
V = 4.5V
GS
SINGLE PULSE
0.1
D
I , DRAIN CURRENT (A)
R =See Note1c
JA
θ
0.05
0.01
T = 25°C
A
0.1 0.5 1 2 5 10 30 50 80 V , DRAIN-SOURCE VOLTAGE (V)
DS
DC
10s
10us
100us
10ms
100ms
1s
Figure 15. Maximum Steady- State Drain
Figure 16. Maximum Safe Operating Area.
Current versus Copper Mounting Pad Area.
1
0.5
D = 0.5
0.2
0.2
0.1
0.1
0.05
0.02
0.01
0.005
r(t), NORMALIZED EFFECTIVE
0.002
TRANSIENT THERMAL RESISTANCE
0.001
0.05
0.02
0.01
Single Pulse
0.0001 0.001 0.01 0.1 1 10 100 300
Figure 17. Typical Transient Thermal Impedance Curve.
Remark: Thermal characterization performed under the conditions of Note 1c. Should better thermal design employs, R lower and reach thermal equivalent sooner.
t , TIME (sec)
1
R (t) = r(t) * R
JA
θ
R = See Note 1 c
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
JA
θ
θ
will be
JA
θ
JA
2
1
NDT014L Rev.D
Page 7
SOT-223 Tape and Reel Data and Package Dimensions
SOT-223 Packaging Configuration: Figure 1.0
Customized Label
F63TNR Label
Antistatic Cover Tape
Static Dissipativ e
Embossed Car rier Tape
Packaging Description:
SOT-223 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 uni t s pe r 13" o r 33 0c m d ia met er reel . Th e reel s ar e dark blue in color and is made of polystyrene plastic (anti­static coated). Other option comes in 500 units per 7" or 177cm di ameter reel. This and some o ther options are further described in the Packaging Information table.
These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in di ff ere nt siz es depe nd in g on th e num be r of pa rts shippe d.
SOT-223 Packaging Information
Packaging Option Packaging type
Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)
Note/Comments
Standard
(no flow code)
13" Dia
343x64x343 184x187x47
0.1246 0.1246
0.7250 0.1532
D84Z
TNR
TNR
2,500 500
7" Dia
5,000 1,000
F63TNR Label
184mm x 184mm x 47mm
Pizza Box for D84Z Option
SOT-223 Tape Leader and Trailer Configuration: Figure 2.0
F
014
852
F
014
852
SOT-223 Unit Orientation
343mm x 342mm x 64mm
Intermediate box for Standard
F
014
852
F
014
852
F63TNR Label sample
LOT: CBVK741B019
FSID: PN2222A
D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:
F63TNR Label
QTY: 3000
SPEC:
N/F: F (F63TNR)3
Carrier Tape
Cover Tape
Trailer Tape 300mm minimum or 38 empty pockets
Components
Leader Tape 500mm minimum or 62 empty pockets
September 1999, Rev. B
Page 8
SOT-223 Tape and Reel Data and Package Dimensions, continued
SOT-223 Embossed Carrier Tape Configuration: Figure 3.0
T
K0
Wc
B0
P0
D0
E1
F
W
E2
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg type
SOT-223
(12mm)
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
SOT-223 Reel Configuration: Figure 4.0
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
6.83
7.42
12.0
1.55
1.50
1.75
10.25
+/-0.10
+/-0.10
+/-0.3
+/-0.05
+/-0.10
+/-0.10
rotational and lateral movement requirements (see sketches A, B, and C).
B0
20 deg maximum component rotation
Sketch A (Side or Front Sectional View)
Component Rotation
5.50
min
+/-0.05
20 deg maximum
A0
Sketch B (Top View)
Component Rotation
W1 Measured at Hub
8.0 +/-0.1
Typical component cavity center line
Typical component center line
Dim A
Max
4.0 +/-0.1
0.292
1.88 +/-0.10
0.5mm maximum
Sketch C (Top View)
Component lateral movement
+/-
0.0130
9.5 +/-0.025
0.5mm maximum
0.06 +/-0.02
Dim A
max
Tape Size
12mm 7" Dia
12mm 13" Dia
Reel
Option
Dim N
Diameter Option
7"
See detail AA
B Min
Dim C
13" Diameter Option
See detail AA
W2 max Measured at Hub
Dim D
W3
min
DETAIL AA
Dimensions are in inches and millimeters
Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
7.00
0.059
177.8
13.00 330
1.5
0.059
1.5
512 +0.020/-0.008 13 +0.5/-0.2
512 +0.020/-0.008 13 +0.5/-0.2
0.795
20.2
0.795
20.2
5.906 150
7.00 178
0.488 +0.078/-0.000
12.4 +2/0
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.724
18.4
0.469 – 0.606
11.9 – 15.4
0.469 – 0.606
11.9 – 15.4
July 1999, Rev. B
Page 9
SOT-223 Tape and Reel Data and Package Dimensions, continued
SOT-223 (FS PKG Code 47)
1 : 1
Scale 1:1 on letter size paper
Part Weight per unit (gram): 0.1246
September 1999, Rev. C
Page 10
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™
2
E
CMOS
TM
FACT™ FACT Quiet Series™
®
FAST FASTr™ GTO™ HiSeC™
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™
Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8
TinyLogic™ UHC™ VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
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