Datasheet ndc7001c Datasheet

May 2002

NDC7001C

Dual N & P-Channel Enhancement Mode Field Effect Transistor

NDC7001C

General Description

These dual N & P-Channel Enhancement Mode Field Effect Transistors are produced using Fairchild’s proprietary, high cell densit y, DMOS technology. This very high density process has been designed to minimize on-state resistance, provide rugged and reliable performance and fast switching. These device is particularly suited for low voltage, low current, switching, and power supply appli cations.

Features

• Q1 0.51 A, 60V. R R

• Q2 –0.34 A, 60V. R R

• High saturation current

• High density cell design for low R

• Proprietary SuperSOT

= 2 Ω @ VGS = 10 V

DS(ON)

= 4 Ω @ VGS = 4.5 V

DS(ON)

= 5 Ω @ VGS = –10 V

DS(ON)

= 7.5Ω @ VGS = –4.5 V

DS(ON)

TM

–6 package: design using copper

lead frame for superior thermal and elect rical capabilities

D2

S1

D1

Q2(P)

4 5

3 2

G2

SuperSOT -6

TM

S2

G1

Absolute Maximum Ratings T

o

=25

C unless otherwise noted

A

6

1

Q1(N)

Symbol Parameter Q1 Q2 Units

V

Drain-Source Voltage 60 –60 V

DSS

V

Gate-Source Voltage

GSS

±20 ±20 ID Drain Current – Continuous (Note 1a) 0.51 –0.34 A – Pulsed 1.5 –1

PD

TJ, T

STG

Power Dissipation for Single Operation (Note 1a) 0.96 (Note 1b)

(Note 1c)

0.9

0.7

Operating and Storage Junction Temperature Range –55 to +150

W

°C

Thermal Characteristics

R

θJA

R

θJC

Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case

(Note 1a) 130

(Note 1) 60

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

2002 Fairchild Semiconductor Corporation

.01C NDC7001C 7’’ 8mm 3000

°C/W

NDC7001C Rev B (W )

NDC7001C

Electrical Characteristics T

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics

BV

DSS

Drain–Source Breakdown Voltage V

∆BVDSS ∆T

I

DSS

I

GSSF

I

GSSR

Breakdown Voltage Temperature Coefficient

J

Zero Gate Voltage Drain Current

Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V

Gate–Body Leakage, Reverse VGS = –20 V, VDS = 0 V

= 0 V, ID = 250 µA

GS

= 0 V, ID = –250 µA

V

GS

I

= 250 µA,Ref. to 25°C

D

= –250 µA,Ref. to 25°C

I

D

= 48 V, VGS = 0 V

V

DS

= –48 V, VGS = 0 V Q1Q2

V

DS

Q1 Q2

All All

60

–60

67

–57

1

–1 100 nA –100 nA

V

mV/°C

µA

On Characteristics (Note 2)

V

GS(th)

∆VGS(th) ∆T

J

R

DS(on)

I

D(on)

gFS

Gate Threshold Voltage

Gate Threshold Voltage Temperature Coefficient

Static Drain–Source On–Resistance

On-State Drain Current

Forward Transconductance

Q1 Q2 Q1 Q2 Q1

Q2

Q1 Q2 Q1 Q2

= VGS, ID = 250 µA

DS

V

= VGS, ID = –250 µA

DS

I

= 250 µA,Referenced. to 25°C

D

= –250 µA,Ref. to 25°C

I

D

= 10 V, ID = 0.51 A

V

GS

= 4.5 V, ID = 0.35 A

V

GS

= 10 V, ID = 0.51 A,TJ=125°C

V

GS

= –10 V, ID = –0.34 A

V

GS

= – 4.5 V,ID = –0.25 A

V

GS

= –10V,ID= –0.34A,TJ=125°C

V

GS

= 10 V VDS = 10 V

V

GS

V

= –10 V VDS = –10 V

GS

= 10 V ID = 0.51 A

V

DS

V

= –10 V ID = –0.34A

DS

1 2.1 2.5

–1 –1.9 –3.5

–3.8

3.2 1

1.7

1.2

1.5

1.9

2

4

3.5 5

7.5

10

1.5 –1

380 700

V

mV/°C

Ω

A

mS

Dynamic Characteristics

C

iss

Input Capacitance

C

oss

Output Capacitance

C

rss

Reverse Transfer Capacitance

RG Gate Resistance

Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2

For Q1:

= 25 V, VGS = 0 V

V

DS

f = 1.0MHz For Q2:

= –25 V, VGS = 0 V

V

DS

f = 1.0MHz

= 15 mV, f = 1.0 MHz

V

GS

20 66 11 13

4.3 6

11.2

pF

Ω

Switching Characteristics (Note 2)

t

d(on)

tr

t

d(off)

tf

Qg

Qgs

Qgd

Turn–On Delay Time

Turn–On Rise Time

Turn–Off Delay Time

Turn–Off Fall Time

Q1 Q2 Q1 Q2 Q1 Q2 Q1

For Q1: V

=25 V, I

DS

= 10 V, R

V

GS

For Q2:

=–25 V, I

V

DS

= –10 V, R

V

GS

= 1 A

DS

GEN

= –1 A

DS

GEN

= 6 Ω

Q2

Total Gate Charge

Gate–Source Charge

Gate–Drain Charge

Q1 Q2 Q1 Q2 Q1 Q2

For Q1:

=25 V, I

V

DS

= 10 V, R

V

GS

For Q2: V

=–25 V, I

DS

= –10 V, R

V

GS

= 0.51 A

DS

= 6 Ω

GEN

= –0.35 A

DS

= 6 Ω

GEN

2.8 5.6

3.2 6.4 8 16 10 20 14 26 8 16 4 8 1 2

1.1 1.5

1.6 2.2

0.2

0.3

0.4

0.3

NDC7001C Rev B (W )

ns

nC

NDC7001C

Electrical Characteristics T

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units Drain–Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain–Source Diode Forward Current

VSD

trr

Qrr

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

Drain–Source Diode Forward Voltage

Diode Reverse Recovery Time

Diode Reverse Recovery Charge

is guaranteed by design while R

θJC

a) 130 °C/W when

mounted on a 0.125 in2 pad of 2 oz. copper.

θCA

= 0 V, IS = 0.51 A (Note 2)

V

GS

Q1

VGS = 0 V, IS = –0.34 A (Note 2)

Q2

= 0.51 A, diF/dt = 100 A/µs

I

F

Q1

IF = –0.34 A, diF/dt = 100 A/µs

Q2

= 0.51 A, diF/dt = 100 A/µs

I

F

Q1

IF = –0.34 A, diF/dt = 100 A/µs

Q2

is determined by the user's board design.

b) 140°C/W when mounted

on a .005 in2 pad of 2 oz copper

Q1 Q2

0.51 –0.34

0.8 1.2 –0.8 –1.4 18 16 16 11

c) 180°C/W when mounted on a

minimum pad.

A

V

nS

nC

NDC7001C Rev B (W )

Typical Characteristics: N-Channel

NDC7001C

1.5 VGS = 10V

1.2

0.9

0.6

, DRAIN CURRENT (A)

D

I

0.3

0

02468

8.0V

6.0V

, DRAIN-SOURCE VOLTAGE (V)

V

DS

5.0V

4.5V

4.0V

2.4

2.2

VGS = 4.5V

2

1.8

1.6

, NORMALIZED

1.4

DS(ON)

R

1.2

DRAIN-SOURCE ON-RESISTANCE

1

0.8 0 0.3 0.6 0.9 1.2 1.5

5.0V

I

, DRAIN CURRENT (A)

D

6.0V

7.0V

8.0V

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

2

ID = 0.51A

1.8

V

= 10V

GS

1.6

1.4

1.2

, NORMALIZED

1

DS(ON)

R

0.8

0.6

DRAIN-SOURCE ON-RESISTANCE

0.4

-50 -25 0 25 50 75 100 125 150

T

, JUNCTION TEMPERATURE (oC)

J

6

5

4

3

2

, ON-RESISTANCE (OHM)

TA = 25oC

DS(ON)

R

1

0

246810

V

, GATE TO SOURCE VOLTAGE (V)

GS

TA = 125oC

10V

ID = 0.26A

Figure 3. On-Resistance Variation

withTemperature.

1.5

VDS = 5V

1.2

0.9

0.6

, DRAIN CURRENT (A)

D

I

0.3

0

13579

T

=-55oC

, GATE TO SOURCE VOLTAGE (V)

V

GS

25oC

125oC

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

10

VGS = 0V

1

0.1

0.01

0.001

, REVERSE DRAIN CURRENT (A)

S

I

0.0001

0.2 0.4 0.6 0.8 1 1.2

TA = 125oC

25oC

-55oC

, BODY DIODE FORWARD VOLTAGE (V)

V

SD

with Source Current and Temperature.

NDC7001C Rev B (W )

)

T

Typical Characteristics: N-Channel (continued)

NDC7001C

10

ID = 0.51A

8

6

4

2

, GATE-SOURCE VOLTAGE (V)

GS

V

0

0 0.2 0.4 0.6 0.8 1 1.2 1.4

Q

VDS = 25V

, GATE CHARGE (nC)

g

48V

30V

60

50

40

30

20

CAPACITANCE (pF)

10

C

0

0 102030405060

C

RSS

V

C

ISS

OSS

, DRAIN TO SOURCE VOLTAGE (V)

DS

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

10

R

LIMIT

DS(ON)

1

0.1

, DRAIN CURRENT (A

D

I

0.01

0.1 1 10 100

VGS = 10V

SINGLE PULSE

R

= 180oC/W

θ

JA

T

= 25oC

A

, DRAIN-SOURCE VOLTAGE (V)

V

DS

DC

1ms

10ms

100ms

1s

10µs

100µs

10

SINGLE PULSE

8

6

4

2

P(pk), PEAK TRANSIENT POWER (W)

0

0.001 0.01 0.1 1 10 100

t

, TIME (sec)

1

R

= 180°C/W

θ

JA

T

= 25°C

A

f = 1MHz

= 0 V

V

GS

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

1

D = 0.5

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

r(t), NORMALIZED EFFECTIVE TRANSIEN

0.1

0.01

THERMAL RESISTANCE

0.001

0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

R

(t) = r(t) * R

JA

θ

R

= 180 °C/W

θJA

P(pk)

t

1

t

2

T

- TA = P * R

J

Duty Cycle, D = t

JA

θ

(t)

θJA

/ t

1

2

Figure 21. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.

NDC7001C Rev B (W )

)

Typical Characteristics: P-Channel

NDC7001C

1

VGS = -10V

0.8

0.6

0.4

, DRAIN CURRENT (A)

D

-I

0.2

0

012345

-V

DS

-4.5V

-4.0V -6.0V

, DRAIN TO SOURCE VOLTAGE (V)

-3.5V

-3.0V

2.2

2

VGS= -3.0V

1.8

1.6

1.4

, NORMALIZED

DS(ON)

1.2

R

1

DRAIN-SOURCE ON-RESISTANCE

0.8

00.20.40.60.81

-3.5V

-4.0V

-I

, DRAIN CURRENT (A)

D

-4.5V

-6.0V

Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with

Drain Current and Gate Voltage.

1.8 ID = -0.34A

1.6

= -10V

V

GS

1.4

1.2

1

, NORMALIZED

DS(ON)

0.8

R

0.6

DRAIN-SOURCE ON-RESISTANCE

0.4

-50 -25 0 25 50 75 100 125 150

T

, JUNCTION TEMPERATURE (oC)

J

5

4

3

2

, ON-RESISTANCE (OHM)

TA = 25oC

1

DS(ON)

R

0

246810

TA = 125oC

-V

, GATE TO SOURCE VOLTAGE (V)

GS

-10V

ID = -0.17A

Figure 13. On-Resistance Variation

withTemperature.

1

VDS = -5V

0.8

0.6

0.4

, DRAIN CURRENT (A

D

-I

0.2

0

12345

-V

GS

TA = -55oC

125oC

, GATE T O SOURCE VOLTAGE (V)

25oC

Figure 14. On-Resistance Variation with

Gate-to-Source Voltage.

10

VGS = 0V

1

0.1

0.01

0.001

, REVERSE DRAIN CURRENT (A)

S

-I

0.0001

0.2 0.4 0.6 0.8 1 1.2

TA = 125oC

25oC

BODY DIODE FORWARD VOLTAGE (V)

-V

SD,

-55oC

Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation

with Source Current and Temperature.

NDC7001C Rev B (W )

T

Typical Characteristics: P-Channel (continued)

NDC7001C

10

ID = -0.34A

8

6

4

, GATE-SOURCE VOLTAGE (V)

2

GS

-V

0

00.40.81.21.62

Q

VDS = -25V

, GATE CHARGE (nC)

g

-30V

-48V

100

80

60

40

CAPACITANCE (pF)

20

C

RSS

0

0 102030405060

C

ISS

C

OSS

, DRAIN TO SOURCE VOLTAGE (V)

-V

DS

f = 1 MHz V

= 0 V

GS

Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics.

10

R

LIMIT

DS(ON)

1

10ms

0.1

, DRAIN CURRENT (A)

D

-I

VGS = -10V

SINGLE PULSE

= 180oC/W

R

θ

JA

T

= 25oC

A

0.01 110100

, DRAIN-SOURCE VOLTAGE (V)

-V

DS

100ms

1s

DC

10µs

1ms

10

8

6

4

2

P(pk), PEAK TRANSIENT POWER (W)

0

0.001 0.01 0.1 1 10 100

t1, TIME (sec)

SINGLE PULSE R

= 180°C/W

θJA

= 25°C

T

A

Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum

Power Dissipation.

1

D = 0.5

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

r(t), NORMALIZED EFFECTIVE TRANSIEN

0.1

0.01

THERMAL RESISTANCE

0.001

0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

R

(t) = r(t) * R

JA

θ

R

= 180 °C/W

θJA

P(pk)

t

1

t

2

T

- TA = P * R

J

Duty Cycle, D = t

JA

θ

(t)

θJA

/ t

1

2

Figure 21. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.

NDC7001C Rev B (W )

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx Bottomless CoolFET CROSSVOL T DenseTrench DOME EcoSPARK E2CMOS EnSigna

TM

FACT FACT Quiet Series

STAR*POWER is used under license

FAST FASTr FRFET GlobalOptoisolator GTO HiSeC

2

I

C ISOPLANAR LittleFET MicroFET MicroPak

MICROWIRE OPTOLOGIC

â

OPTOPLANAR PACMAN POP Power247 PowerTrench

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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

â

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or In Design

First Production

Full Production

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. H5