Datasheet ncv8406 Datasheet

NCV8406

Self-Protected Low Side Driver with Temperature and Current Limit

65 V, 7.0 A, Single N−Channel

NCV8406 is a three terminal protected Low-Side Smart Discrete device. The protection features include overcurrent, overtemperature, ESD and integrated Drain-to-Gate clamping for overvoltage protection. This device offers protection and is suitable for harsh automotive environments.

V

DSS

(Clamped)

65 V

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TYP

R

DS(on)

210 mW

TYP

I

D

(Limited)

7.0 A

Features

• Short Circuit Protection

• Thermal Shutdown with Automatic Restart

• Over Voltage Protection

• Integrated Clamp for Inductive Switching

• ESD Protection

• dV/dt Robustness

• Analog Drive Capability (Logic Level Input)

• RoHS Compliant

• AEC-Q101 Qualified

• These Devices are Faster than the Rest of the NCV Devices

• NCV Prefix for Automotive and Other Applications Requiring Site

and Change Control

• These are Pb−Free Devices

Typical Applications

• Switch a Variety of Resistive, Inductive and Capacitive Loads

• Can Replace Electromechanical Relays and Discrete Circuits

• Automotive / Industrial

Gate Input

CASE 318E

ESD Protection

Temperature

Limit

4

1

2

3

SOT−223

STYLE 3

4

Overvoltage

Protection

Current

1 GATE

Limit

MARKING DIAGRAM

DRAIN

4

AYW

8406G

23

DRAIN

Drain

Current

Sense

Source

G

SOURCE

November, 2010 − Rev. 1

2

1

3

DPAK

CASE 369C

A = Assembly Location Y = Year W, WW = Work Week G or G = Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.

1 Publication Order Number:

YWW V8406G

NCV8406/D

NCV8406

MAXIMUM RATINGS (T

Drain−to−Source Voltage Internally Clamped V

Gate−to−Source Voltage V

Drain Current Continuous I

Total Power Dissipation − SOT−223 Version

@ T

= 25°C (Note 1)

A

@ TA = 25°C (Note 2)

Total Power Dissipation − DPAK Version

@ T

= 25°C (Note 1)

A

@ TA = 25°C (Note 2)

Thermal Resistance − SOT−223 Version

Junction−to−Case Junction−to−Ambient (Note 1) Junction−to−Ambient (Note 2)

Thermal Resistance − DPAK Version

Junction−to−Case Junction−to−Ambient (Note 1) Junction−to−Ambient (Note 2)

Single Pulse Inductive Load Switching Energy

(Starting T

= 2.1 Apk, L = 50 mH, RG = 25 W)

I

L

Load Dump Voltage (VGS = 0 and 10 V, RI = 2 W, RL = 7 W, td = 400 ms)

Operating Junction Temperature Range T

Storage Temperature Range T

= 25°C, VDD = 50 Vdc, VGS = 5.0 Vdc,

J

= 25°C unless otherwise noted)

J

Rating

Symbol Value Unit

DSS

GS

D

P

D

70 Vdc

"14 Vdc

Internally Limited

W

1.25

1.81

P

D

1.31

W

2.31

°C/W

R

q

JC

R

q

JA

R

q

JA

7.0

100

69

°C/W

R

q

JC

R

q

JA

R

q

JA

E

AS

V

LD

J

stg

1.0 95 54

110 mJ

75 V

−40 to 150 °C

−55 to 150 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface mounted onto minimum pad size (100 sq/mm) FR4 PCB, 1 oz cu.

2. Mounted onto 1″ square pad size (700 sq/mm) FR4 PCB, 1 oz cu.

+

VGS

−

I

D

DRAIN

I

G

GATE

SOURCE

Figure 1. Voltage and Current Convention

+

VDS

−

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2

NCV8406

MOSFET ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

J

Characteristic

OFF CHARACTERISTICS

Drain−to−Source Clamped Breakdown Voltage

= 0 V, ID = 2 mA)

(V

GS

Zero Gate Voltage Drain Current (V

= 52 V, VGS = 0 V)

DS

Gate Input Current (V

= 5.0 V, VDS = 0 V)

GS

ON CHARACTERISTICS

Gate Threshold Voltage

= VGS, ID = 150 mA)

(V

DS

Threshold Temperature Coefficient

Static Drain−to−Source On−Resistance (Note 3) (V

= 10 V, ID = 2.0 A, TJ @ 25°C)

GS

Static Drain−to−Source On−Resistance (Note 3) (V

= 5.0 V, ID = 2.0 A, TJ @ 25°C)

GS

(VGS = 5.0 V, ID = 2.0 A, TJ @ 150°C)

Source−Drain Forward On Voltage (I

= 7.0 A, VGS = 0 V)

S

SWITCHING CHARACTERISTICS (Note 6)

Turn−on Delay Time

Turn−on Rise Time

Turn−off Delay Time

Turn−off Fall Time

Slew Rate ON

Slew Rate OFF

V

DD

VDD = 13.8 V, ID = 2.0 A, 10% ID to 90% I

V

DD

V

DD

V

DD

V

DD

R

= 6.6 W, Vin = 0 to 10 V,

L

= 13.8 V, ID = 2.0 A, 10% Vin to 10% I

R

= 6.6 W, Vin = 0 to 10 V,

L

R

= 6.6 W, Vin = 0 to 10 V,

L

= 13.8 V, ID = 2.0 A, 90% Vin to 90% I

R

= 6.6 W, Vin = 0 to 10 V,

L

= 13.8 V, ID = 2.0 A, 90% ID to 10% I

R

= 6.6 W, Vin = 0 to 10 V,

L

= 13.8 V, ID = 2.0 A, 70% to 50% V

R

= 6.6 W, Vin = 0 to 10 V,

L

= 13.8 V, ID = 2.0 A, 50% to 70% V

D

DD

SELF PROTECTION CHARACTERISTICS (Note 4)

Current Limit

VDS = 10 V, VGS = 5.0 V, TJ = 25°C (Note 5)

VDS = 10 V, VGS = 5.0 V, TJ = 150°C (Notes 5, 6)

VDS = 10 V, VGS = 10 V, TJ = 25°C (Notes 5)

Temperature Limit (Turn−off) VGS = 5.0 V (Note 6) T

Thermal Hysteresis VGS = 5.0 V

Temperature Limit (Turn−off) VGS = 10 V (Note 6) T

Thermal Hysteresis VGS = 10 V

Input Current during Thermal Fault

VDS = 0 V, VGS = 5.0 V, TJ = TJ > T

V

= 0 V, VGS = 10 V, TJ = TJ > T

DS

(fault)

(Note 6)

ESD ELECTRICAL CHARACTERISTICS

Electro−Static Discharge Capability

Human Body Model (HBM) Machine Model (MM)

3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.

4. Fault conditions are viewed as beyond the normal operating range of the part.

5. Current limit measured at 380 ms after gate pulse.

6. Not subject to production test.

Symbol Min Typ Max Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

R

DS(on)

V

SD

td

(on)

t

rise

td

(off)

t

fall

dVDS/dT

I

LIM

LIM(off)

DT

LIM(on)

LIM(off)

DT

LIM(on)

I

g(fault)

60 65 70 V

− 22 100

− 30 100

1.2

1.66

−

4.0

− 185 210

−

210 445

− 0.9 1.1

− 127 − ns

− 486 − ns

− 1600 − ns

− 692 − ns

on

off

− 79 −

− 27 −

5.0

3.5

6.5

7.0

4.5

8.5

150 180 200 °C

− 10 − °C

150 180 200 °C

− 20 − °C

−

5.9

12.3

2.0

−V−mV/°C

240 520

9.5

6.0

10.5

− mA

ESD

6000

500

−

mA

mW

V

V/ms

A

V

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3

NCV8406

TYPICAL PERFORMANCE CURVES

10

ILmax (A)

1

10

1

ILmax (A)

T

= 25°C

Jstart

T

= 150°C

Jstart

L (mH) L (mH)

Figure 2. Single Pulse Maximum Switch−off

Current vs. Load Inductance

T

= 25°C

Jstart

T

= 150°C

Jstart

10010

1000

100

Emax (mJ)

10

1000

100

Emax (mJ)

T

= 25°C

Jstart

T

= 150°C

Jstart

Figure 3. Single−Pulse Maximum Switching

Energy vs. Load Inductance

T

= 25°C

Jstart

T

= 150°C

Jstart

10010

(A)

D

I

0.1

10

101

TIME IN CLAMP (ms) TIME IN CLAMP (ms)

Figure 4. Single Pulse Maximum Inductive

Switch−off Current vs. Time in Clamp

12

10

8

6

6 V 7 V 8 V 9 V

Ta = 25°C

10 V

5 V

4 V

(A)

D

I

Figure 5. Single−Pulse Maximum Inductive

Switching Energy vs. Time in Clamp

12

VDS = 10 V

9

6

3.3 V

4

3 V

3

2

VGS = 2.5 V

0

151050

(V) VGS (V)

V

DS

Figure 6. On−state Output Characteristics Figure 7. Transfer Characteristics

101

−40°C

25°C

100°C

150°C

543210

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4

NCV8406

TYPICAL PERFORMANCE CURVES

600

550

500

450

400

(mW)

350

DS(on)

300

R

250

200

150 100

345678910

Figure 8. R

2.5

ID = 2 A

2.0

DS(on)

1.5

1.0

NORMALIZED R

0.5

Figure 10. Normalized R

150°C

100°C

25°C

−40°C

VGS (V) ID (A)

vs. Gate−Source Voltage Figure 9. R

DS(on)

60

T (°C) VGS (V)

DS(on)

ID = 2 A ID = 0.5 A

VGS = 10 V

VGS = 5 V

1201008040200−20−40

vs. Temperature Figure 11. Current Limit vs. Gate−Source

140

500

450

400

350

300

(mW)

250

DS(on)

25°C, VGS = 5 V

R

200

25°C, VGS = 10 V

150

100

50

0.5 1 1.5 2 2.75

0.75 1.25 1.75 2.25 3

DS(on)

15

13

11

(A)

9

LIM

I

7

5

3

45 6 8 910

−40°C

25°C

100°C

150°C

150°C, VGS = 5 V

150°C, VGS = 10 V

100°C, VGS = 5 V

100°C, VGS = 10 V

−40°C, VGS = 5 V

−40°C, VGS = 10 V

2.5

vs. Drain Current

VDS = 10 V

7

Voltage

15

VGS = 10 V

13

11

(A)

LIM

I

9

7

5

−40 −20 0 20 40 60 80 100 120 140

VGS = 5 V

TJ (°C) VDS (V)

VDS = 10 V

Figure 12. Current Limit vs. Junction

Temperature

1000

100

10

1

(mA)

0.1

DSS

I

0.01

0.001

0.0001

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5

150°C

100°C

25°C

VGS = 0 V

−40°C

70605040302010

Figure 13. Drain−to−Source Leakage Current

NCV8406

TYPICAL PERFORMANCE CURVES

1.2

1.1

(V)

1.0

GS(th)

0.9

0.8

NORMALIZED V

0.7

0.6

Figure 14. Normalized Threshold Voltage vs.

1600

1400

1200

1000

800

TIME (ns)

600

400

200

0

Figure 16. Resistive Load Switching Time vs.

T (°C) IS (A)

Temperature

VDD = 13.8 V I

= 2 A

D

R

= 0 W

G

VGS (V)

Gate−Source Voltage

1100

ID = 150 mA V

= V

DS

GS

1000

−40°C

900

25°C

(mV)

800

SD

V

100°C

700

150°C

600

VGS = 0 V

500

80 120 9 10

1401006040200−20−40

87654321

Figure 15. Source−Drain Diode Forward

Characteristics

t

d(off)

t

d(on)

3400

3000

2600

2200

1800

f

r

1400

TIME (ns)

1000

600

200

−200

109876543

t

d(off)

RG (W)

t

, VGS = 10 V

d(off)

, VGS = 5 V

tr, VGS = 5 V

tf, VGS = 10 V

tf, VGS = 5 V

tr, VGS = 10 V

t

, VGS = 5 V

d(on)

t

, VGS = 10 V

d(on)

2000150010005000

Figure 17. Resistive Load Switching Time vs.

Gate Resistance

35

30

25

dVDS/d

, VGS = 5 V

t(off)

20

15

dVDS/d

, VGS = 10 V

t(off)

10

5

DRAIN−SOURCE VOLTAGE SLOPE (V/ms)

RG (W)

Figure 18. Drain−Source Voltage Slope during

Turn On and Turn Off vs. Gate Resistance

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6

2000150010005000

NCV8406

TYPICAL PERFORMANCE CURVES

110

100

(°C/W)

JA

q

R

1000

R(t) (°C/W)

90

80

70

60

50

40

100

100 200

COPPER HEAT SPREADER AREA (mm

Figure 19. R

50% Duty Cycle

20%

10%

10

5%

2%

1

1%

PCB Cu thickness, 1.0 oz

PCB Cu thickness, 2.0 oz

300 400 500 600

vs. Copper Area − SOT−223

q

JA

110

100

90

80

(°C/W)

JA

70

q

R

60

50

40

100 200

2

)

COPPER HEAT SPREADER AREA (mm

Figure 20. R

PCB Cu thickness, 1.0 oz

PCB Cu thickness, 2.0 oz

300 400 500 600

2

)

vs. Copper Area − DPAK

q

JA

R(t) (°C/W)

0.1 Single Pulse

0.01

0.000001

100

50% Duty Cycle

20%

10

10%

5%

2%

1

1%

0.1

Single Pulse

0.01

0.000001

0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

PULSE TIME (sec)

Figure 21. Transient Thermal Resistance − SOT−223 Version

0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

PULSE TIME (sec)

Figure 22. Transient Thermal Resistance − DPAK Version

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7

NCV8406

TEST CIRCUITS AND WAVEFORMS

RL

VIN

RG

Figure 23. Resistive Load Switching Test Circuit

D

DUT

G

S

IDS

VDD

+

−

VIN

IDS

td(ON)

tr

td(OFF)

tf

Figure 24. Resistive Load Switching Waveforms

90%

10%

90%

10%

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8

NCV8406

TEST CIRCUITS AND WAVEFORMS

L

VDS

VIN

RG

tp

D

DUT

G

S

Figure 25. Inductive Load Switching Test Circuit

T

av

T

p

V

(BR)DSS

IDS

VDD

+

−

5 V

0 V

VDS

IDS

I

pk

VDD

V

DS(on)

Figure 26. Inductive Load Switching Waveforms

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9

0

NCV8406

ORDERING INFORMATION

Device Package Shipping

NCV8406STT3G SOT−223

(Pb−Free)

NCV8406DTRKG DPAK

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

4000 / Tape & Reel

2500 / Tape & Reel

†

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10

D

b1

NCV8406

PACKAGE DIMENSIONS

SOT−223 (TO−261)

CASE 318E−04

ISSUE M

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

0.08 (0003)

H

e1

E

A1

4

123

e

E

b

q

A

SOLDERING FOOTPRINT*

3.8

0.15

2.0

0.079

2.3

0.091

L1

2.3

0.091

DIMAMIN NOM MAX MIN

A1 0.02 0.06 0.10 0.001

b 0.60 0.75 0.89 0.024

b1 2.90 3.06 3.20 0.115

c 0.24 0.29 0.35 0.009

D 6.30 6.50 6.70 0.249

E 3.30 3.50 3.70 0.130

e 2.20 2.30 2.40 0.087 e1 L1 1.50 1.75 2.00 0.060

H

C

E

q

STYLE 3:

PIN 1. GATE

MILLIMETERS

1.50 1.63 1.75 0.060

0.85 0.94 1.05 0.033

6.70 7.00 7.30 0.264 0° 10° 0° 10°

− −

2. DRAIN

3. SOURCE

4. DRAIN

INCHES

NOM MAX

0.064 0.068

0.002 0.004

0.030 0.035

0.121 0.126

0.012 0.014

0.256 0.263

0.138 0.145

0.091 0.094

0.037 0.041

0.069 0.078

0.276 0.287

6.3

0.248

2.0

0.079

1.5

0.059

SCALE 6:1

ǒ

inches

mm

Ǔ

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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11

L3

L4

b2

e

E

b3

4

12 3

A

B

D

b

0.005 (0.13) C

DETAIL A

M

NCV8406

PACKAGE DIMENSIONS

DPAK (SINGLE GAUGE)

CASE 369C−01

ISSUE D

C

A

c2

H

c

GAUGE

L2

PLANE

L

L1

DETAIL A

ROTATED 90 CW5

SOLDERING FOOTPRINT*

6.20

0.244

2.58

0.102

A1

3.00

0.118

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE.

Z

H

SEATING

C

PLANE

5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY.

6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.

DIM MIN MAX MIN MAX

A 0.086 0.094 2.18 2.38

A1 0.000 0.005 0.00 0.13

b 0.025 0.035 0.63 0.89 b2 0.030 0.045 0.76 1.14 b3 0.180 0.215 4.57 5.46

c 0.018 0.024 0.46 0.61 c2 0.018 0.024 0.46 0.61

D 0.235 0.245 5.97 6.22

E 0.250 0.265 6.35 6.73

e 0.090 BSC 2.29 BSC

H 0.370 0.410 9.40 10.41

L 0.055 0.070 1.40 1.78 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC L3 0.035 0.050 0.89 1.27 L4 −−− 0.040 −−− 1.01

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

5.80

0.228

1.60

0.063

SCALE 3:1

6.17

0.243

ǒ

inches

mm

Ǔ

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NCV8406/D

12