Datasheet ncv8402d Datasheet

Page 1
NCV8402D
Dual Self-Protected Low-Side Driver with Temperature and Current Limit
NCV8402D is a dual protected Low−Side Smart Discrete device. The protection features include overcurrent, overtemperature, ESD and integrated Drain−to−Gate clamping for overvoltage protection. This device offers protection and is suitable for harsh automotive environments.
Features
• Short−Circuit Protection
• Thermal Shutdown with Automatic Restart
• Overvoltage Protection
• Integrated Clamp for Inductive Switching
• ESD Protection
• dV/dt Robustness
• Analog Drive Capability (Logic Level Input)
• AEC−Q101 Qualified
• NCV Prefix for Automotive and Other Applications Requiring Site
and Change Control
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Switch a Variety of Resistive, Inductive and Capacitive Loads
• Can Replace Electromechanical Relays and Discrete Circuits
• Automotive / Industrial
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V
(BR)DSS
(Clamped)
42 V
*Max current limit value is dependent on input
condition.
Gate Input
ESD Protection
8
1
V8402D = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package
Source 1 Drain 1
Gate 1 Drain 1
Source 2 Drain 2
Gate 2 Drain 2
R
TYP
DS(ON)
165 mW @ 10 V
Overvoltage
Protection
Temperature
Limit
MARKING DIAGRAM
SO−8 CASE 751 STYLE 11
PIN ASSIGNMENT
1
Current
Limit
8
ID MAX
2.0 A*
Drain
Current
Sense
Source
8
V8402D
ALYWX
G
1
© Semiconductor Components Industries, LLC, 2009
Octtober, 2009 − Rev. 0
ORDERING INFORMATION
Device Package Shipping
NCV8402DDR2G SOIC−8
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
1 Publication Order Number:
2500/Tape & Reel
†
NCV8402D/D
Page 2
NCV8402D
MAXIMUM RATINGS (T
= 25°C unless otherwise noted)
J
Rating Symbol Value Unit
Drain−to−Source Voltage Internally Clamped V
Drain−to−Gate Voltage Internally Clamped (RG = 1.0 MW)
V
DSS
DGR
Gate−to−Source Voltage V
Continuous Drain Current I
Power Dissipation @ TA = 25°C (Note 1)
P
@ TA = 25°C (Note 2)
Thermal Resistance Junction−to−Ambient Steady State (Note 1)
Junction−to−Ambient Steady State (Note 2)
Single Pulse Drain−to−Source Avalanche Energy (VDD = 32 V, VG = 5.0 V, IPK = 1.0 A, L = 300 mH, R
G(ext)
= 25 W)
Load Dump Voltage (VGS = 0 and 10 V, RI = 2.0 W, RL = 9.0 W, td = 400 ms)
R R
E
V
Operating Junction and Storage Temperature TJ, T
q q
GS
D
D
JA JA
AS
LD
stg
42 V
42 V
"14 V
Internally Limited
0.8
W
1.62
157
°C/W
77
150 mJ
87 V
−55 to 150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. Surface−mounted onto min pad FR4 PCB, (Cu area = 40 sq. mm, 1 oz.).
2. Surface−mounted onto 1″ sq. FR4 board (Cu area = 625 sq. mm, 2 oz.).
+
I
D
+
VGS
−
DRAIN
I
G
GATE
SOURCE
Figure 1. Voltage and Current Convention
VDS
−
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Page 3
NCV8402D
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
J
Parameter Test Condition Symbol Min Ty p Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3)
VGS = 0 V, ID = 10 mA, TJ = 25°C
VGS = 0 V, ID = 10 mA, TJ = 150°C
V
(Note 5)
Zero Gate Voltage Drain Current
VGS = 0 V, VDS = 32 V, TJ = 25°C
VGS = 0 V, VDS = 32 V, TJ = 150°C
(Note 5)
Gate Input Current VDS = 0 V, VGS = 5.0 V I
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
VGS = VDS, ID = 150 mA
Gate Threshold Temperature Coefficient V
Static Drain−to−Source On−Resistance
VGS = 10 V, ID = 1.7 A, TJ = 25°C
V
GS(th)/TJ
R
VGS = 10 V, ID = 1.7 A, TJ = 150°C
(Note 5)
VGS = 5.0 V, ID = 1.7 A, TJ = 25°C
VGS = 5.0 V, ID = 1.7 A, TJ = 150°C
(Note 5)
VGS = 5.0 V, ID = 0.5 A, TJ = 25°C
VGS = 5.0 V, ID = 0.5 A, TJ = 150°C
(Note 5)
Source−Drain Forward On Voltage VGS = 0 V, IS = 7.0 A V
SWITCHING CHARACTERISTICS (Note 5)
Turn−ON Time (10% VIN to 90% ID)
Turn−OFF Time (90% VIN to 10% ID) t
Slew−Rate ON (70% VDS to 50% VDS)
Slew−Rate OFF (50% VDS to 70% VDS) dVDS/dt
VGS = 10 V, VDD = 12 V
ID = 2.5 A, RL = 4.7 W
VGS = 10 V, VDD = 12 V,
RL = 4.7 W
−dVDS/dt
SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 4)
Current Limit
VDS = 10 V, VGS = 5.0 V, TJ = 25°C
VDS = 10 V, VGS = 5.0 V, TJ = 150°C
(Note 5)
VDS = 10 V, VGS = 10 V, TJ = 25°C
VDS = 10 V, VGS = 10 V, TJ = 150°C
(Note 5)
Temperature Limit (Turn−off)
Thermal Hysteresis
Temperature Limit (Turn−off)
Thermal Hysteresis
VGS = 5.0 V (Note 5)
VGS = 5.0 V
VGS = 10 V (Note 5)
VGS = 10 V
T
DT
T
DT
GATE INPUT CHARACTERISTICS (Note 5)
Device ON Gate Input Current
VGS = 5 V ID = 1.0 A
VGS = 10 V ID = 1.0 A
Current Limit Gate Input Current
VGS = 5 V, VDS = 10 V
VGS = 10 V, VDS = 10 V
Thermal Limit Fault Gate Input Current
VGS = 5 V, VDS = 10 V
VGS = 10 V, VDS = 10 V
ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 5)
Electro−Static Discharge Capability
Human Body Model (HBM)
Machine Model (MM) 400
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
4. Fault conditions are viewed as beyond the normal operating range of the part.
5. Not subject to production testing.
(BR)DSS
I
DSS
GSSF
GS(th)
DS(on)
SD
t
ON
OFF
OFF
I
LIM
LIM(off)
LIM(on)
LIM(off)
LIM(on)
I
GON
I
GCL
I
GTL
ESD
42 46 55
40 45 55
1.3 1.8 2.2 V
ON
3.7 4.3 5.0
2.3 3.0 3.7
4.2 4.8 5.4
2.7 3.6 4.5
150 175 200
150 165 185
4000
V
0.25 4.0
mA
1.1 20
50 100
mA
4.0 6.0 −mV/°C
165 200
mW
305 400
195 230
360 460
190 230
350 460
1.0 V
25
ms
120
0.8
V/ms
0.3
A
°C
15
15
50
mA
400
0.05
mA
0.4
0.15
mA
0.7
V
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NCV8402D
0
TYPICAL PERFORMANCE CURVES
10
(A)
T
= 25°C
T
Jstart
Jstart
= 150°C
L (mH)
L(max)
I
1
10 100
Figure 2. Single Pulse Maximum Switch−off
Current vs. Load Inductance
10
T
= 25°C
Jstart
(A)
1
L(max)
I
T
Jstart
= 150°C
1000
(mJ)
100
max
E
10
10 10
T
T
Jstart
Jstart
= 25°C
= 150°C
L (mH)
Figure 3. Single Pulse Maximum Switching
Energy vs. Load Inductance
1000
T
= 25°C
Jstart
(mJ)
100
max
E
T
Jstart
= 150°C
0.1 110
TIME IN CLAMP (ms)
Figure 4. Single Pulse Maximum Inductive
Switch−off Current vs. Time in Clamp
8
TA = 25°C
8 V
10 V
7
6
6 V
(A)
D
I
5
5 V
4
4 V
3.5 V
3
2
1
3 V
VGS = 2.5 V
0
012345
VDS (V)
Figure 6. On−state Output Characteristics
10
110
TIME IN CLAMP (ms)
Figure 5. Single Pulse Maximum Inductive
Switching Energy vs. Time in Clamp
5
VDS = 10 V
4
3
(A)
D
I
2
1
0
12345
VGS (V)
Figure 7. Transfer Characteristics
−40°C
25°C
100°C
150°C
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Page 5
NCV8402D
TYPICAL PERFORMANCE CURVES
400
300
(mW)
200
DS(on)
R
100
0
45678910
2
1.75
1.5
1.25
(NORMALIZED)
1
DS(on)
R
0.75
0.5
−40 −20 0 20 40 60 80 100 120 140
150°C, ID = 0.5 A
150°C, ID = 1.7 A
100°C, ID = 0.5 A
25°C, ID = 1.7 A
−40°C, ID = 1.7 A
VGS (V)
Figure 8. R
ID = 1.7 A
vs. Gate−Source Voltage
DS(on)
T (°C)
Figure 10. Normalized R
100°C, ID = 1.7 A
25°C, ID = 0.5 A
−40°C, ID = 0.5 A
VGS = 5 V
VGS = 10 V
vs. Temperature
DS(on)
350
150°C, VGS = 5 V
300
150°C, VGS = 10 V
250
(mW)
DS(on)
R
(A)
LIM
I
200
150
100
100°C, VGS = 5 V
25°C, VGS = 5 V
−40°C, VGS = 5 V
−40°C, VGS = 10 V
50
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Figure 9. R
8
7
6
5
4
3
2
5678 910
DS(on)
−40°C
25°C
100°C
150°C
100°C, VGS = 10 V
25°C, VGS = 10 V
ID (A)
vs. Drain Current
VDS = 10 V
VGS (V)
Figure 11. Current Limit vs. Gate−Source
Voltage
8
7
6
(A)
5
LIM
I
4
3
VDS = 10 V
2
−40 −20 0 20 40 60 80 100 120 140
VGS = 10 V
VGS = 5 V
TJ (°C)
Figure 12. Current Limit vs. Junction
Temperature
10
1
0.1
(mA)
DSS
0.01
I
0.001
0.0001 10 15 20 25 30 35 40
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5
VGS = 0 V
150°C
100°C
25°C
−40°C
VDS (V)
Figure 13. Drain−to−Source Leakage Current
Page 6
NCV8402D
TYPICAL PERFORMANCE CURVES
1.2
ID = 150 mA
= V
V
GS
1.1
DS
(V)
1
GS(th)
0.9
0.8
NORMALIZED V
0.7
0.6
−40 −20 0 20 40 60 80 100 120 140
T (°C)
Figure 14. Normalized Threshold Voltage vs.
Temperature
200
150
100
TIME (ms)
t
t
50
0
345678910
f
t
d(on)
d(off)
VGS (V)
ID = 2.5 A
VDD = 12 V
RG = 0 W
t
r
Figure 16. Resistive Load Switching Time vs.
Gate−Source Voltage
1.1
(V)
SD
V
1
0.9
0.8
−40°C
25°C
100°C
0.7 150°C
0.6
VGS = 0 V
0.5
12345678910
IS (A)
Figure 15. Source−Drain Diode Forward
Characteristics
1
ID = 2.5 A
VDD = 12 V
0.8
RG = 0 W
0.6
0.4
−dVDS/d
t(on)
dVDS/d
t(off)
0.2
0
345678910
DRAIN−SOURCE VOLTAGE SLOPE (V/ms)
VGS (V)
Figure 17. Resistive Load Switching
Drain−Source Voltage Slope vs. Gate−Source
Voltage
100
ID = 2.5 A
VDD = 12 V
t
, (VGS = 10 V)
75
tr, (VGS = 5 V)
50
TIME (ms)
tf, (VGS = 10 V) tf, (VGS = 5 V)
t
, (VGS = 5 V)
d(off)
25
t
, (VGS = 5 V)
d(on)
0
d(off)
tr, (VGS = 10 V)
t
, (VGS = 10 V)
d(on)
0 400 800 1200 1600 2000
RG (W)
Figure 18. Resistive Load Switching Time vs.
Gate Resistance
1
0.8
0.6
0.4
0.2
0
DRAIN−SOURCE VOLTAGE SLOPE (V/ms)
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6
dVDS/d
−dVDS/d
, VGS = 5 V
t(off)
t(on)
−dVDS/d
, VGS = 5 V
, VGS = 10 V
t(on)
dVDS/d
, VGS = 10 V
t(off)
ID = 2.5 A
VDD = 12 V
0 500 1000 1500 2000
RG (W)
Figure 19. Drain−Source Voltage Slope during
Turn On and Turn Off vs. Gate Resistance
Page 7
1000
100
R(t) (°C/W)
0.1
10
1
NCV8402D
TYPICAL PERFORMANCE CURVES
Duty Cycle = 50%
20% 10%
5% 2%
1%
0.01
0.0000001
Single Pulse
0.010.0010.00010.000010.000001
PULSE WIDTH (sec)
0.1 1 10 100 1000
Figure 20. Transient Thermal Resistance
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NCV8402D
TEST CIRCUITS AND WAVEFORMS
RL
VIN
RG
Figure 21. Resistive Load Switching Test Circuit
D
DUT
G
S
IDS
VDD
+
−
VIN
IDS
td(ON)
tr
td(OFF)
tf
Figure 22. Resistive Load Switching Waveforms
90%
10%
90%
10%
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NCV8402D
TEST CIRCUITS AND WAVEFORMS
L
VDS
VIN
VIN
RG
tp
D
DUT
G
S
Figure 23. Inductive Load Switching Test Circuit
T
av
T
p
V
(BR)DSS
IDS
VDD
+
−
5 V
0 V
VDS
IDS
I
pk
VDD
V
DS(on)
Figure 24. Inductive Load Switching Waveforms
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0
Page 10
−Y−
−Z−
NCV8402D
PACKAGE DIMENSIONS
SOIC−8
CASE 751−07
ISSUE AJ
NOTES:
−X− A
58
B
1
S
0.25 (0.010)
4
M
M
Y
K
G
N
C
SEATING PLANE
0.10 (0.004)
H
D
0.25 (0.010) Z
M
Y
SXS
X 45
_
M
J
SOLDERING FOOTPRINT*
1.52
0.060
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.
MILLIMETERS
DIMAMIN MAX MIN MAX
4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8
____
N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
INCHES
7.0
0.275
0.6
0.024
4.0
0.155
1.270
0.050
SCALE 6:1
mm
ǒ
inches
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NCV8402D/D
10
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