NCP1532
Dual Output Step-Down
Converter 2.25 MHz
High-Efficiency, Out of
Phase Operation, Low
Quiescent Current, Source
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up to 1.6 A
The NCP1532 dual step down DCDC converter is a monolithic
integrated circuit dedicated to supply core and I/O voltages of new
multimedia design in portable applications powered from 1−cell
Li−ion or 3 cell Alkaline / NiCd / NiMH batteries.
Both channels are externally adjustable from 0.9 V to 3.3 V and can
source totally up to 1.6 A, 1.0 A maximum per channel. Converters are
running at 2.25 MHz switching frequency which reduces component
size by allowing the use of small inductor (down to 1 mH) and
capacitors and operates 180° out of phase to reduce large amount of
current demand on the battery. Automatic switching PWM/PFM mode
and synchronous rectification offer improved system efficiency. The
device can also operate into fixed frequency PWM mode for low noise
applications where low ripple and good load transients are required.
Additional features include integrated soft−start, cycle−by−cycle
current limit and thermal shutdown protection. The device can also be
synchronized to an external clock signal in the range of 2.25 MHz.
The NCP1532 is available in a space saving, ultra low profile
3x3 x 0.55 mm 10 pin mDFN package.
Features
• Up to 97% Efficiency
• 50 mA Quiescent Current
• Synchronous Rectification for Higher Efficiency
• 2.25 MHz Switching Frequency, 180° Out of Phase
• Sources up to 1.6 A, 1.0 A Maximum per Channel
• Adjustable Output Voltage from 0.9 V to 3.3 V
• Mode Selection Pin: Eco Mode or Low Noise Mode
• 2.7 V to 5.5 V Input Voltage Range
• Thermal Limit Protection
• Short Circuit Protection
• All pins are fully ESD Protected
• This is a Pb−Free Device
Typical Applications
• Cellular Phones, Smart Phones and PDAs
• Digital Still Cameras
• MP3 Players and Portable Audio Systems
• Wireless and DSL Modems
• Portable Equipment
MARKING
DIAGRAM
UDFN10
MU SUFFIX
CASE 506AT
Aa = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
Device Package Shipping
NCP1532MUAATXG UDFN10
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
(may be 1 or 2 characters)
PIN CONNECTION
FB1
110
EN1
2
VIN
3
4
SW1
GND
5
(Top View)
UDFN10
ORDERING INFORMATION
(Pb−Free)
9
8
7
6
1532
AA
AaLYWG
G
FB2
EN2
POR
SW2
MODE/
SYNC
3000 /
Tape & Reel
†
© Semiconductor Components Industries, LLC, 2011
October, 2011 − Rev. 6
1 Publication Order Number:
NCP1532/D
NCP1532
VIN
ONOFF
2.25 MHz Range
ONOFF
ONOFF
NOTE: Exposed pad of UDFN10 package − named pin11 − must be connected to system ground.
3
VIN
5
GND
2
EN1
6
MODE/SYNC
9
EN2
FB1
FB2
10
4
18pF
1
8
7
18pF
SW1
11
POR
SW2
2.2mH
2.2mH
VOUT1
10mF
POR
VOUT2
10mF
Figure 1. NCP1532 Typical Application
PIN FUNCTION DESCRIPTION
Pin Pin Name Type Description
1 FB1 Analog Input Feedback voltage from the output 1. This is the input to the error amplifier.
2 EN1 Digital Input Enable for converter 1. This pin is active HIGH (higher than 1.2 V) and is turned off by
3 VIN Analog / Power
Input
4 SW1 Analog Output Connection from power MOSFETs of output 1 to the Inductor.
5 GND Analog Ground This pin is the GROUND reference for the analog section of the IC. The pin must be
6 MODE/SYNC Digital Input Combination Mode Selection and Oscillator Synchronization. If this pin is LOW, the
7 SW2 Analog Output Connection from power MOSFETs of output 2 to the Inductor.
8 POR Digital Output Power On Reset. This is an open drain output. This output is shutting down when each
9 EN2 Digital Input Enable for converter 2. This pin is active HIGH (higher than 1.2 V) and is turned off by
10 FB2 Analog Input Feedback voltage from the output 2. This is the input to the error amplifier.
11 Exposed Pad Power Ground This pin is the GROUND reference for the NFET power stage of the IC. The pin must
logic LOW (lower than 0.4 V.
Do not leave this pin floating.
Power supply input for the PFET power stage, analog and digital blocks. The pin must
be decoupled to ground by a 10 mF ceramic capacitor.
connected to the system ground by 10 mF low ESR ceramic capacitor.
regulator runs in automatic switching PFM/PWM. With a HIGH level (equal or lower
Analog Input voltage), the converter runs in PWM mode only. This pin can be also synchronized to an external clock in the range of 2.25 MHz; in this case the device runs in
PWM mode only. Insert the clock before enabling the part is recommended to force
external synchronization. Do not let this pin floating.
Following rule is being used:
output voltages are less than 90% of their nominal values and goes high after 120 ms
when active outputs are within regulation. A pullup resistor around 500k should be
connected between POR and V
logic LOW (lower than 0.4 V). Do not let this pin floating.
be connected to the system ground and to both input and output capacitors.
”0”: Eco mode, automatic switching PFM/PWM, 180° out of phase.
“1”: Low noise, forced PWM mode, 180° out of phase.
”CLK”: External synchronization, forced PWM mode, 0° in phase.
, V
OUT1
or V
IN
depending on the supplied device.
OUT2
VIN or VOUT
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NCP1532
BLOCK DIAGRAM
FB1
EN1
VIN
SW1
GND
EA1
1
2
3
4
5
VREF VREF
Logic
Control
EA1 EA2
PVIN
AVIN AVIN
Q1
PWM/PFM
Q2
Control
UVLO
Thermal
Shutdown
Voltage
Reference
Oscillator
Ramp Generator
0° 180°
PWM/PFM
Control
Logic
Control
VIN
EA2
VIN
Q3
Q4
PVIN
10
9
8
7
6
FB2
EN2
POR
SW2
MODE/SYNC
ILIMIT ILIMIT
Figure 2. Simplified Block Diagram
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NCP1532
MAXIMUM RATINGS
Rating Symbol Value Unit
Minimum Voltage All Pins V
Maximum Voltage All Pins (Note 1) V
Maximum Voltage EN1, EN2, MODE V
Thermal Resistance Junction−to−Air (UDFN10 Package)
Thermal Resistance Using Recommended Board Layout (Note 8)
Operating Ambient Temperature Range (Notes 6 and 7) T
Storage Temperature Range T
Junction Operating Temperature (Notes 6 and 7) T
Latchup Current Maximum Rating TA = 85°C (Note 4) Other Pins L
ESD Withstand Voltage (Note 3)
Human Body Model
min
max
max
R
q
JA
A
stg
J
u
V
esd
Machine Model
Moisture Sensitivity Level (Note 5) MSL 1 per IPC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T
2. According JEDEC standard JESD22−A108B
3. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) per JEDEC standard: JESD22−A114
Machine Model (MM) per JEDEC standard: JESD22−A115
4. Latchup current maximum rating per JEDEC standard: JESD78.
5. JEDEC Standard: J−STD−020A.
6. In applications with high power dissipation (low V
considerations − thermal dissipation vias, traces or planes and PCB material − can significantly improve junction to air thermal resistance
(for more information, see design and layout consideration section). Environmental conditions such as ambient temperature Ta brings
R
q
JA
thermal limitation on maximum power dissipation allowed.
, high I
IN
), special care must be paid to thermal dissipation issues. Board design
OUT
The following formula gives calculation of maximum ambient temperature allowed by the application: T
Where
is the junction temperature,
T
J
is the maximum power dissipated by the device (worst case of the application), and R
P
d
resistance.
q
7. To prevent permanent thermal damages, this device include a thermal shutdown which engages at 180°C (typical).
8. Board recommended UDFN10 layout is described in Layout Considerations section.
−0.3 V
7.0 V
VIN + 0.3 V
200
°C/W
40
−40 to 85 °C
−55 to 150 °C
−40 to 150 °C
$100 mA
2.0
200
= 25°C
A
= T
A(max)
is the junction−to−ambient thermal
JA
J(max)
− (R
q
JA
kV
V
x Pd)
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NCP1532
ELECTRICAL CHARACTERISTICS
(Typical values are referenced to TA = +25°C, Minimum and Maximum values are referenced −40°C to +85°C ambient temperature,
unless otherwise noted, operating conditions V
Rating
INPUT VOLTAGE
Input Voltage Range
Quiescent Current,
No Switching, No Load
No Load
Standby Current EN1 = EN2 = GND I
Under Voltage Lockout VIN Falling V
Under Voltage Hysteresis V
ANALOG AND DIGITAL PIN
Positive Going Input High Voltage Threshold
Negative Going Input High Voltage Threshold EN1, EN2, MODE/SYNC V
Digital Threshold Hysteresis EN1, EN2, MODE/SYNC V
External Synchronization (Note 11)
Minimum
Maximum
POWER ON RESET (Note 9)
Power On Reset Threshold
Power On Reset Hysteresis V
Power On Reset Delay (See Page 12) T
OUTPUT PERFORMANCES
Feedback Voltage Threshold
Minimum Output Voltage V
Maximum Output Voltage V
Output Voltage Accuracy (Note 10) Room Temperature
Output Voltage load regulation
NCP1532MUAATXG
Load transient response
Rise/Falltime 1 ms
Output Voltage Line Regulation
Load = 100 mA
Line Transient Response
Load = 100 mA
Output Voltage Ripple I
Soft−Start Time Time from EN to 90% of Output
Switching Frequency F
Duty Cycle D − − 100 %
= 3.6 V, V
IN
OUT1
= V
= 1.2 V, unless otherwise noted).
OUT2
Conditions Symbol Min Typ Max Unit
MODE/SYNC = GND I
EN1, EN2, MODE/SYNC V
MODE/SYNC F
V
Falling
OUT
FB1, FB2 V
Overtemperature Range
Overtemperature
Load = 100 mA to 600 mA
10 mA to 100 mA load step
(PFM to PWM mode)
200 mA to 600 mA load step
(PWM to PWM mode)
VIN = 2.7 V to 5.5 V V
3.6 V to 3.2 V Line Step
(Falltime = 50 ms)
= 0 mA
OUT
I
= 300 mA
OUT
Voltage
V
STB
UVLO
UVLOH
HYS
SYNC
V
PORT
PORH
POR
OUT
OUT
DV
V
LOADR
V
LOADT
LINER
V
LINET
V
RIPPLE
t
START
IN
Q
IH
IL
FB
OUT
SW
2.7 − 5.5 V
−
−
50
60
70
−
− 0.3 1.0
2.2 2.4 2.55 V
− 100 − mV
1.2 − − V
− − 0.4 V
− 100 − mV
MHz
−
−
1.8
3.0
−
−
− 89% − V
− 3% − V
− 116 − ms
− 0.6 − V
− 0.9 − V
− 3.3 − V
−
−3%
$1%
$2%−+3%
− −0.6 −
−
−
40
85
−
−
− 0.05 − %
− 6.0 − mV
−
−
8.0
3.0
−
mV
−
− 230 350
1.8 2.25 2.7 MHz
mA
mA
%
%
mV
PP
PP
ms
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