Datasheet NCP1421DMR2G Datasheet

NCP1421

600 mA Sync−Rect PFM
Step−Up DC−DC Converter
with True−Cutoff and
Ring−Killer

NCP1421 is a monolithic micropower high−frequency step−up
switching converter IC specially designed for battery−operated
hand−held electronic products up to 600 mA loading. It integrates
Sync−Rect to improve efficiency and to eliminate the external
Schottky Diode. High switching frequency (up to 1.2 MHz) allows
for a low profile, small−sized inductor and output capacitor to be
used. When the device is disabled, the internal conduction path from
LX or BAT to OUT is fully blocked and the OUT pin is isolated from
the battery. This True−Cutoff function reduces the shutdown current
to typically only 50 nA. Ring−Killer is also integrated to eliminate
the high−frequency ringing in discontinuous conduction mode. In
addition to the above, Low−Battery Detector, Logic−Controlled
Shutdown, Cycle−by−Cycle Current Limit and Thermal Shutdown
provide value−added features for various battery−operated
applications. With all these functions on, the quiescent supply
current is typically only 8.5 A. This device is available in the
compact and low profile Micro8 package.

Features

• Pb−Free Package is Available

• High Efficiency: 94% for 3.3 V Output at 200 mA from 2.5 V Input

88% for 3.3 V Output at 500 mA from 2.5 V Input

• High Switching Frequency, up to 1.2 MHz (not hitting current limit)

• Output Current up to 600 mA at V

• True−Cutoff Function Reduces Device Shutdown Current to

typically 50 nA

• Anti−Ringing Ring−Killer for Discontinuous Conduction Mode

• High Accuracy Reference Output, 1.20 V 1.5%, can Supply

2.5 mA Loading Current when V

• Low Quiescent Current of 8.5 A

• Integrated Low−Battery Detector

• Open Drain Low−Battery Detector Output

• 1.0 V Startup at No Load Guaranteed

• Output Voltage from 1.5 V to 5.0 V Adjustable

• 1.5 A Cycle−by−Cycle Current Limit

• Multi−function Logic−Controlled Shutdown Pin

• On Chip Thermal Shutdown with Hysteresis

T ypical Applications

• Personal Digital Assistants (PDA)

• Handheld Digital Audio Products

• Camcorders and Digital Still Cameras

• Hand−held Instruments

• Conversion from one to two Alkaline, NiMH, NiCd Battery Cells to

3.0−5.0 V or one Lithium−ion cells to 5.0 V

• White LED Flash for Digital Cameras

= 2.5 V and V

IN

> 3.3 V

OUT

OUT

= 3.3 V

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MARKING
DIAGRAM

8

1

1421 = Device Code
A = Assembly Location
Y = Year
W = Work Week

FB

LBI/EN

LBO
REF

ORDERING INFORMATION

Device Package Shipping†

NCP1421DMR2 Micro8 4000 Tape & Reel
NCP1421DMR2G Micro8

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.

Micro8
DM SUFFIX
CASE 846A

PIN CONNECTIONS

18
2

3
4

(Top View)

(Pb−Free)

1421
AYW

OUT
LX

7
6

GND

5

BAT

4000 Tape & Reel

 Semiconductor Components Industries, LLC, 2004

October, 2004 − Rev. 6

1 Publication Order Number:

NCP1421/D

NCP1421

M3

BAT

5

V

BAT

FB

REF

LBI/EN

0.5 V

ZLC

Chip

Enable

+

−

+

20 mV

CONTROL LOGIC

_ZCUR

_TSDON

TRUE CUTOFF

CONTROL

V

DD

SENSEFET

M2

LX

7

V

DD

V

OUT

OUT

8

_MSON

_MAINSW2ON

GND

_CEN

1

+

−

PFM

_PFM

_MAINSWOFD

M1

6

GND

V

DD

_SYNSW2ON

GND

_V

REFOK

_SYNSWOFD

Voltage

4

Reference

_ILIM

+

−

+

1.20 V

+

2

−

GND

R

SENSE

LBO

3

GND

Figure 1. Detailed Block Diagram

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PIN FUNCTION DESCRIPTIONS

NCP1421

Pin

Symbol Description

1 FB Output Voltage Feedback Input.
2 LBI/EN Low−Battery Detector Input and IC Enable. With this pin pulled down below 0.5 V, the device is disabled and

enters the shutdown mode.

3 LBO Open−Drain Low−Battery Detector Output. Output is LOW when V

is < 1.20 V . LBO is high impedance in

LBI

shutdown mode.

4 REF 1.20 V Reference Voltage Output, bypass with 1.0 F capacitor. If this pin is not loaded, bypass with 300 nF

capacitor; this pin can be loaded up to 2.5 mA @ V

OUT

= 3.3 V .
5 BAT Battery input connection for internal ring−killer.
6 GND Ground.
7 LX N−Channel and P−Channel Power MOSFET drain connection.
8 OUT Power Output. OUT also provides bootstrap power to the device.

MAXIMUM RATINGS (T

= 25°C unless otherwise noted.)

C

Rating Symbol Value Unit

Power Supply (Pin 8) V
Input/Output Pins (Pin 1−5, Pin 7) V

OUT

IO

−0.3, 5.5 V

−0.3, 5.5 V

Thermal Characteristics

Micro8 Plastic Package

Thermal Resistance Junction−to−Air
Operating Junction Temperature Range T
Operating Ambient Temperature Range T
Storage Temperature Range T

P

D

R



JA
J

A

stg

520
240

mW

C/W

−40 to +150 C

−40 to +85 C

−55 to +150 C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.

1. This device contains ESD protection and exceeds the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114. *Except OUT pin, which is 1k V.
Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115. *Except OUT pin, which is 100 V.

2. The maximum package power dissipation limit must not be exceeded.

T

P



D

J(max)

R

JA

 T

A

3. Latchup Current Maximum Rating: ±150 mA per JEDEC standard: JESD78.

4. Moisture Sensitivity Level: MSL 1 per IPC/JEDEC standard: J−STD−020A.

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NCP1421

ELECTRICAL CHARACTERISTICS (V

= 3.3 V , TA = 25°C for typical value, −40°C  TA  85°C for min/max values unless

OUT

otherwise noted.)

Characteristic Symbol Min Typ Max Unit

Operating Voltage V
Output Voltage Range V
Reference Voltage

(V

OUT

= 3.3 V , I

LOAD

= 0 A, C

= 200 nF, TA = 25°C)

REF

Reference Voltage

(V

OUT

= 3.3 V , I

LOAD

= 0 A, C

= 200 nF, TA = −40°C to 85°C)

REF

Reference Voltage Temperature Coefficient TC
Reference Voltage Load Current

(V

OUT

= 3.3 V , V

REF

= V

REF_NL

1.5% C

= 1.0 F) (Note 5)

REF

Reference Voltage Load Regulation

(V

= 3.3 V , I

OUT

= 0 to 100 A, C

LOAD

REF

= 1.0 F)

Reference Voltage Line Regulation

(V

from 1.5 V to 5.0 V , C

OUT

FB Input Threshold (I
FB Input Threshold (I
LBI Input Threshold (I

LOAD

LOAD

LOAD

= 1.0 F)

REF

= 0 mA, TA = 25°C) V
= 0 mA, TA = −40°C to 85°C) V

= 0 mA, TA= −40C to 85C) V
LBI Input Threshold (TA = 25C) V
Internal NFET ON−Resistance R
Internal PFET ON−Resistance R
LX Switch Current Limit (N−FET) (Note 7) I
Operating Current into BAT

(V

= 1.8 V , V

BAT

Operating Current into OUT (V
LX Switch MAX. ON−Time (VFB = 1.0 V , V
LX Switch MIN. OFF−Time (VFB = 1.0 V , V

= 1.8 V , V

FB

= 1.8 V , V

LX

= 1.4 V , V

FB

= 3.3 V)

OUT

= 3.3 V) I

OUT

= 3.3 V , TA = 25C) t

OUT

= 3.3 V , TA = 25C) t

OUT

FB Input Current I
True−Cutoff Current into BAT

(LBI/EN = GND, V

OUT

BAT−to−LX Resistance (V

= 0, V

= 3.3 V , LX = 3.3 V)

IN

= 1.4 V , V

FB

= 3.3 V) (Note 7) R

OUT

LBI/EN Input Current I
LBO Low Output Voltage (V
Soft−Start Time (V

= 2.5 V , V

IN

LBI

= 0, I

OUT

= 1.0 mA) V

SINK

= 5.0 V , C

= 200 nF) (Note 6) T

REF

EN Pin Shutdown Threshold (TA = 25°C) V
Thermal Shutdown Temperature (Note 7) T
Thermal Shutdown Hysteresis (Note 7) T

5. Loading capability increases with V

6. Design guarantee, value depends on voltage at V

7. Values are design guaranteed.

OUT.

OUT.

IN

OUT

V

REF_NL

V

REF_NL

VREF

I

REF

V

REF_LOAD

V

REF_LINE

FB

FB
LBI
LBI

DS(ON)_N
DS(ON)_P

LIM

I

QBAT

Q

ON

OFF

FB

I

BAT

BAT_LX

LBI

LBO_L

SS

SHDN

SHDN

SDHYS

1.0 − 5.0 V

1.5 − 5.0 V

1.183 1.200 1.217 V

1.174 − 1.220 V

− 0.03 − mV/°C

− 2.5 − mA

− 0.05 1.0 mV

− 0.05 1.0 mV/V

1.192 1.200 1.208 V

1.184 − 1.210 V

1.162 1.230 V

1.182 1.200 1.218 V

− 0.3 − 

− 0.3 − 

− 1.5 − A

− 1.3 3 A

− 8.5 14 A

0.46 0.72 1.15 s

− 0.12 0.22 s

− 1.0 50 nA

− 50 − nA

− 100 − 

− 1.5 50 nA

− − 0.2 V

− 1.5 20 ms

0.35 0.5 0.67 V

− − 145 °C

− 30 − °C

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NCP1421

0

TYPICAL OPERATING CHARACTERISTICS

1.220

/V

REF

1.210

1.200

V

= 3.3 V

OUT

L = 10 H
C

= 22 F

IN

C

= 22 F

OUT

C

= 1.0 F

REF

T

= 25C

A

VIN = 1.5 V

VIN = 2.0 V

1.190

REFERENCE VOLTAGE, V

1.180
1 10 100 1000

OUTPUT CURRENT, I

LOAD

/mA

Figure 2. Reference Voltage vs. Output Current

1.205

/V

1.200

REF

1.195

1.190

V

1.185

REFERENCE VOLTAGE, V

1.180

−40 −20

0 20 40 60 80 100

AMBIENT TEMPERATURE, TA/°C

C
I

REF

OUT
REF

= 0 mA

VIN = 2.5 V

= 3.3 V
= 200 nF

1.220
C

/V

REF

1.210

I

REF

T

REF

A

= 200 nF

= 0 mA

= 25°C

1.200

1.190

REFERENCE VOLTAGE, V

1.180

1.5 2 2.5 3 3.5 4 4.5 5
VOLTAGE AT OUT PIN, V

OUT

/V

Figure 3. Reference Voltage vs. Voltage at OUT Pin

0.6

/

0.5

DS(ON)

0.4

0.3

0.2

0.1

SWITCH ON RESISTANCE, R

0.0

V

= 3.3 V

OUT

P−FET (M2)

N−FET (M1)

−40 −20 0 20 40 60 80 100
AMBIENT TEMPERATURE, TA/°C

Figure 4. Reference Voltage vs. Temperature Figure 5. Switch ON Resistance vs. Temperature

1.0

/S

ON

0.9

0.8

0.7

0.6

SWITCH MAXIMUM, ON TIME, t

X

L

0.5

−40 −20

0 20 40 60 80 100

AMBIENT TEMPERATURE, TA/°C

Figure 6. L

Switch Max. ON Time vs. Temperature Figure 7. Minimum Startup Battery Voltage vs.

X

1.6

1.4

/V

BATT

1.1

VOLTAGE, V

0.9

MINIMUM STARTUP BATTERY

0.6
0 50 100 150 200 25

OUTPUT LOADING CURRENT, I

LOAD

Loading Current

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5

TA = 25°C

/mA

NCP1421

TYPICAL OPERATING CHARACTERISTICS

100

90

80

V

= 3.3 V

70

EFFICIENCY/%

60

50

1 10 100 1000

OUTPUT LOADING CURRENT, I

IN

V

= 5.0 V

OUT

L = 12 H
C

= 22 F

IN

C

= 22 F

OUT

T

= 25C

A

/mA

LOAD

Figure 8. Efficiency vs. Load Current

100

90

80

V

= 2.5 V

70

EFFICIENCY/%

V

IN
OUT

= 5.0 V
L = 6.8 H
C

60

50

1 10 100 1000

OUTPUT LOADING CURRENT, I

IN

C

OUT

T

A

LOAD

= 22 F

= 22 F

= 25C

/mA

Figure 10. Efficiency vs. Load Current Figure 11. Efficiency vs. Load Current

100

90

80

V

= 2.5 V

70

EFFICIENCY/%

60

50

1 10 100 1000

OUTPUT LOADING CURRENT, I

IN

V

= 3.3 V

OUT

L = 10 H
C

= 22 F

IN

C

= 22 F

OUT

T

= 25C

A

LOAD

Figure 9. Efficiency vs. Load Current

100

90

80

V

= 2.0 V

70

EFFICIENCY/%

60

50

1 10 100 1000

OUTPUT LOADING CURRENT, I

IN

V

= 3.3 V

OUT

L = 10 H
C

= 22 F

IN

C

= 22 F

OUT

T

= 25C

A

LOAD

/mA

/mA

100

90

80

V

70

EFFICIENCY/%

V

= 1.5 V

IN
OUT

= 5.0 V
L = 2.2 H
C

60

50

1 10 100 1000

OUTPUT LOADING CURRENT, I

IN

C

OUT

T

A

= 22 F

= 22 F

= 25C

LOAD

/mA

Figure 12. Efficiency vs. Load Current Figure 13. Efficiency vs. Load Current

100

90

80

70

EFFICIENCY/%

60

50

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V

= 1.5 V

IN

V

= 1.8 V

OUT

L = 2.2 H
C

= 22 F

IN

C

= 22 F

OUT

T

= 25C

A

1 10 100 1000

OUTPUT LOADING CURRENT, I

LOAD

/mA

NCP1421

TYPICAL OPERATING CHARACTERISTICS

10

5

V

= 2.5 V

V

IN

= 2.0 V

IN

0

V

= 3.3 V

OUT

L = 5.6 H

−5

OUTPUT VOLTAGE CHANGE/%

C

IN

C

OUT

T

A

= 22 F

= 22 F

= 25C

−10
10 100 1000

OUTPUT LOADING CURRENT, I

LOAD

/mA

Figure 14. Output Voltage Change vs. Load

Current

50

p−p

/mV

40

V
V

= 2.5 V

IN
OUT

= 3.3 V
L = 6.8 H
C

= 22 F

RIPPLE

30

IN

C

OUT

T

A

= 22 F

= 25C

500 mA

20

300 mA

10

RIPPLE VOLTAGE, V

100 mA

0

1.5 1.7 1.9 2.1 2.3 2.5
BATTERY INPUT VOLTAGE, V

BATT

/V

Figure 16. Battery Input Voltage vs. Output Ripple

Voltage

10

5

0

V

= 5.0 V

OUT

L = 5.6 H

−5

OUTPUT VOLTAGE CHANGE/%

C
C
T

IN
OUT

A

= 22 F

= 22 F

= 25C

V

= 1.5 V

IN

V

IN

V

IN

−10
10 100 1000

OUTPUT LOADING CURRENT, I

LOAD

/mA

Figure 15. Output Voltage Change vs. Load

Current

Upper Trace: Voltage at LBI Pin, 1.0 V/Division
Lower Trace: V oltage at LBO Pin, 1.0 V/Division

Figure 17. Low Battery Detect

= 3.3 V

= 2.5 V

/A

15

BATT

12.5

10

7.5

5.0

2.5

NO LOAD OPERATING CURRENT, I

1.5 2.0 2.5 3.0 3.5 5.0
INPUT VOL TAGE AT OUT PIN, V

4.0 4.5
/V

OUT

Figure 18. No Load Operating Current vs. Input

V oltage at OUT Pin

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V

= 2.5 V

IN

V

= 5.0 V

OUT

I

= 10 mA

LOAD

Upper Trace: Input Voltage Waveform, 1.0 V/Division
Lower Trace: Output V oltage Waveform, 2.0 V/Division

Figure 19. Startup Transient Response

NCP1421

TYPICAL OPERATING CHARACTERISTICS

(VIN = 2.5 V, V
Upper Trace: Output V oltage Ripple, 20 mV/Division

OUT

= 3.3 V, I

= 50 mA; L = 5.6 H, C

LOAD

Lower Trace: V oltage at Lx pin, 1.0 V/Division

Figure 20. Discontinuous Conduction Mode

Switching Waveform

(VIN = 1.5 V to 2.5 V; L = 5.6 H, C
Upper Trace: Output V oltage Ripple, 100 mV/Division
Lower Trace: Battery Voltage, V

= 22F, I

OUT

1.0 V/Division

IN,

LOAD

Figure 22. Line Transient Response for V

OUT

= 22 F)

(VIN = 2.5 V, V
Upper Trace: Output V oltage Ripple, 20 mV/Division

OUT

= 3.3 V, I

= 500 mA; L = 5.6 H, C

LOAD

Lower Trace: Voltage at LX pin, 1.0 V/Division

Figure 21. Continuous Conduction Mode

Switching Waveform

= 100 mA)

= 3.3 V Figure 23. Line Transient Response For V

OUT

= 1.5 V to 2.5 V; L = 5.6 H, C

(V

IN

Upper Trace: Output V oltage Ripple, 100 mV/Division
Lower Trace: Battery Voltage, V

= 22F, I

OUT

1.0 V/Division

IN,

LOAD

= 22F)

OUT

= 100 mA)

= 5.0 V

OUT

(V

= 3.3 V, I

OUT

Upper Trace: Output V oltage Ripple, 50 mV/Division
Lower Trace: Load Current, I

= 50 mA to 500 mA; L = 5.6 H, C

LOAD

, 500 mA/Division

LOAD

OUT

= 22 F)

Figure 24. Load Transient Response For VIN = 2.5 V

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(V

= 5.0 V, I

OUT

Upper Trace: Output V oltage Ripple, 100 mV/Division
Lower Trace: Load Current, I

= 50 mA to 500 mA; L = 5.6 H, C

LOAD

, 500 mA/Division

LOAD

Figure 25. Load Transient Response For V

8

OUT

= 22 F)

= 3.0 V

IN

NCP1421

DETAILED OPERATION DESCRIPTION

NCP1421 is a monolithic micropower high−frequency
step−up voltage switching converter IC specially designed
for battery operated hand−held electronic products up to
600 mA loading. It integrates a Synchronous Rectifier to
improve efficiency as well as to eliminate the external
Schottky diode. High switching frequency (up to 1.2 MHz)
allows for a low profile inductor and output capacitor to be
used. Low−Battery Detector, Logic−Controlled Shutdown,
and Cycle−by−Cycle Current Limit provide value−added
features for various battery−operated applications. With all
these functions ON, the quiescent supply current is
typically only 8.5 A. This device is available in a compact
Micro8 package.

PFM Regulation Scheme

From the simplified functional diagram (Figure 1), the
output voltage is divided down and fed back to pin 1 (FB).
This voltage goes to the non−inverting input of the PFM
comparator whereas the comparator’s inverting input is
connected to the internal voltage reference, REF. A
switching cycle is initiated by the falling edge of the
comparator, at the moment the main switch (M1) is turned
ON. After the maximum ON−time (typically 0.72 S)
elapses or the current limit is reached, M1 is turned OFF
and the synchronous switch (M2) is turned ON. The M1
OFF time is not less than the minimum OFF−time
(typically 0.12 S), which ensures complete energy
transfer from the inductor to the output capacitor. If the
regulator is operating in Continuous Conduction Mode
(CCM), M2 is turned OFF just before M1 is supposed to be
ON again. If the regulator is operating in Discontinuous
Conduction Mode (DCM), which means the coil current
will decrease to zero before the new cycle starts, M1 is
turned OFF as the coil current is almost reaching zero. The
comparator (ZLC) with fixed offset is dedicated to sense
the voltage drop across M2 as it is conducting; when the
voltage drop is below the offset, the ZLC comparator
output goes HIGH and M2 is turned OFF. Negative
feedback of closed−loop operation regulates voltage at
pin 1 (FB) equal to the internal reference voltage (1.20 V).

Synchronous Rectification

The Synchronous Rectifier is used to replace the
Schottky Diode to reduce the conduction loss contributed
by the forward voltage of the Schottky Diode. The
Synchronous Rectifier is normally realized by powerFET
with gate control circuitry that incorporates relatively
complicated timing concerns.

As the main switch (M1) is being turned OFF and the
synchronous switch M2 is just turned ON with M1 not
being completely turned OFF, current is shunt from the
output bulk capacitor through M2 and M1 to ground. This
power loss lowers overall efficiency and possibly damages
the switching FETs. As a general practice, a certain amount

of dead time is introduced to make sure M1 is completely
turned OFF before M2 is being turned ON.

The previously mentioned situation occurs when the
regulator is operating in CCM, M2 is being turned OFF, M1
is just turned ON, and M2 is not being completely turned
OFF. A dead time is also needed to make sure M2 is
completely turned OFF before M1 is being turned ON.

As coil current is dropped to zero when the regulator is
operating in DCM, M2 should be OFF. If this does not
occur, the reverse current flows from the output bulk
capacitor through M2 and the inductor to the battery input,
causing damage to the battery. The ZLC comparator comes
with fixed offset voltage to switch M2 OFF before any
reverse current builds up. However, if M2 is switched OFF
too early, large residue coil current flows through the body
diode of M2 and increases conduction loss. Therefore,
determination of the offset voltage is essential for optimum
performance. With the implementation of the synchronous
rectification scheme, efficiency can be as high as 94% with
this device.

Cycle−by−Cycle Current Limit

In Figure 1, a SENSEFET is used to sample the coil
current as M1 is ON. With that sample current flowing
through a sense resistor, a sense−voltage is developed. The
threshold detector (I

) detects whether the

LIM

sense−voltage is higher than the preset level. If the sense
voltage is higher than the present level, the detector output
notifies the Control Logic to switch OFF M1, and M1 can
only be switched ON when the next cycle starts after the
minimum OFF−time (typically 0.12 S). With proper
sizing of the SENSEFET and sense resistor, the peak coil
current limit is typically set at 1.5 A.

Voltage Reference

The voltage at REF is typically set at 1.20 V and can
output up to 2.5 mA with load regulation ±2% at V
equal to 3.3 V. If V

is increased, the REF load

OUT

OUT

capability can also be increased. A bypass capacitor of
200 nF is required for proper operation when REF is not
loaded. If REF is loaded, a 1.0 F capacitor at the REF pin
is needed.

True−Cutoff

The NCP1421 has a True−Cutoff function controlled by
the multi−function pin LBI/EN (pin 2). Internal circuitry
can isolate the current through the body diode of switch M2
to load. Thus, it can eliminate leakage current from the
battery to load in shutdown mode and significantly reduce
battery current consumption during shutdown. The
shutdown function is controlled by the voltage at pin 2
(LBI/EN). When pin 2 is pulled to lower than 0.3 V, the
controller enters shutdown mode. In shutdown mode, when
switches M1 and M2 are both switched OFF, the internal

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NCP1421

reference voltage of the controller is disabled and the
controller typically consumes only 50 nA of current. If the
pin 2 voltage is raised to higher than 0.5 V (for example, by
a resistor connected to V

, the IC is enabled again, and the

IN)

internal circuit typically consumes 8.5 A of current from
the OUT pin during normal operation.

Low−Battery Detection

A comparator with 30 mV hysteresis is applied to

perform the low−battery detection function. When pin 2

APPLICATIONS INFORMATION

Output Voltage Setting

A typical application circuit is shown in Figure 26. The
output voltage of the converter is determined by the
external feedback network comprised of R1 and R2. The
relationship is given by:

R1

V

 1.20 V 1 

OUT

R2



where R1 and R2 are the upper and lower feedback
resistors, respectively.

Low Battery Detect Level Setting

The Low Battery Detect Voltage of the converter is
determined by the external divider network that is
comprised of R3 and R4. The relationship is given by:

R3

VLB 1.20 V 1 

R4



where R3 and R4 are the upper and lower divider resistors
respectively.

Inductor Selection

The NCP1421 is tested to produce optimum performance
with a 5.6 H inductor at VIN = 2.5 V and V

OUT

= 3.3 V,
supplying an output current up to 600 mA. For other
input/output requirements, inductance in the range 3 H to
10 H can be used according to end application
specifications. Selecting an inductor is a compromise
between output current capability, inductor saturation
limit, and tolerable output voltage ripple. Low inductance
values can supply higher output current but also increase
the ripple at output and reduce efficiency. On the other
hand, high inductance values can improve output ripple
and efficiency; however, it is also limited to the output
current capability at the same time.

Another parameter of the inductor is its DC resistance.
This resistance can introduce unwanted power loss and
reduce overall efficiency. The basic rule is to select an
inductor with the lowest DC resistance within the board
space limitation of the end application. In order to help with
the inductor selection, reference charts are shown in
Figure 27 and 28.

Capacitors Selection

In all switching mode boost converter applications, both
the input and output terminals see impulsive

(LBI/EN) is at a voltage (defined by a resistor divider from
the battery voltage) lower than the internal reference
voltage of 1.20 V, the comparator output turns on a 50 
low side switch. It pulls down the voltage at pin 3 (LBO)
which has hundreds of k of pull−high resistance. If the
pin 2 voltage is higher than 1.20 V + 3 0 mV, the comparator
output turns off the 50 low side switch. When this occurs,
pin 3 becomes high impedance and its voltage is pulled
high again.

voltage/current waveforms. The currents flowing into and
out of the capacitors multiply with the Equivalent Series
Resistance (ESR) of the capacitor to produce ripple voltage
at the terminals. During the Syn−Rect switch−off cycle, the
charges stored in the output capacitor are used to sustain the
output load current. Load current at this period and the ESR
combine and reflect as ripple at the output terminals. For
all cases, the lower the capacitor ESR, the lower the ripple
voltage at output. As a general guideline, low ESR
capacitors should be used. Ceramic capacitors have the
lowest ESR, but low ESR tantalum capacitors can also be
used as an alternative.

PCB Layout Recommendations

Good PCB layout plays an important role in switching
mode power conversion. Careful PCB layout can help to
minimize ground bounce, EMI noise, and unwanted
feedback that can affect the performance of the converter.
Hints suggested below can be used as a guideline in most
situations.

Grounding

A star−ground connection should be used to connect the
output power return ground, the input power return ground,
and the device power ground together at one point. All
high−current paths must be as short as possible and thick
enough to allow current to flow through and produce
insignificant voltage drop along the path. The feedback
signal path must be separated from the main current path
and sense directly at the anode of the output capacitor.

Components Placement

Power components (i.e., input capacitor, inductor and
output capacitor) must be placed as close together as
possible. All connecting traces must be short, direct, and
thick. High current flowing and switching paths must be
kept away from the feedback (FB, pin 1) terminal to avoid
unwanted injection of noise into the feedback path.

Feedback Network

Feedback of the output voltage must be a separate trace
detached from the power path. The external feedback
network must be placed very close to the feedback (FB,
pin 1) pin and sense the output voltage directly at the anode
of the output capacitor.

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NCP1421

TYPICAL APPLICATION CIRCUIT

V

IN

C1
22 F

L

6.5 H

R1
350 k

1
2
3
4

C3
200 nF

Shutdown

Open Drain

Input

Low Battery

Open Drain

Output

R3

C4

220 k

R2 200 k

*Optional

10 p*

R4
330 k

Figure 26. Typical Application Schematic for 2 Alkaline Cells Supply

GENERAL DESIGN PROCEDURES

Switching mode converter design is considered a
complicated process. Selecting the right inductor and
capacitor values can allow the converter to provide
optimum performance. The following is a simple method
based on the basic first−order equations to estimate the
inductor and capacitor values for NCP1421 to operate in
Continuous Conduction Mode (CCM). The set component
values can be used as a starting point to fine tune the
application circuit performance. Detailed bench testing is
still necessary to get the best performance out of the circuit.

Design Parameters:

VIN = 1.8 V to 3.0 V, Typical 2.4 V
V

= 3.3 V

OUT

I

= 500 mA (600 mA max)

OUT

VLB = 2.0 V
V

OUT−RIPPLE

= 45 mV

p−p

at I

= 500 mA

OUT

Calculate the feedback network:

Select R2 = 200 k

R1  R2

R1  200 k



V

REF



1.20 V

 1

3.3 V



 1 350 k

V

OUT

Calculate the Low Battery Detect divider:

VLB = 2.0 V
Select R4 = 330 k

V

LB

R3  R4



V

REF

 1



NCP1421

FB
LBI/EN
LBO

REF BAT

OUT

LX

GND

8

V

+

7
6
5

C2

22 F

500 mA

Determine the Steady State Duty Ratio, D, for typical

VIN. The operation is optimized around this point:

V

D  1 

V

OUT

V

V

IN

OUT

IN



1  D

 1 

1

2.4 V

3.3 V

 0.273

Determine the average inductor current, I

maximum I

OUT

I

LAVG

:



I

OUT

1  D

500 mA



1  0.273

 688 mA

Determine the peak inductor ripple current, I

and calculate the inductor value:
Assume I

RIPPLE−P

is 20% of I

. The inductance of the

LAVG

power inductor can be calculated as follows:

L 

VIN t

2I

RIPPLEP

ON

2.4 V  0.75 S



2 (137.6 mA)

 6.5 H

A standard value of 6.5 H is selected for initial trial.

Determine the output voltage ripple, V

OUT−RIPPLE,

calculate the output capacitor value:
V

OUT−RIPPLE

C

where tON = 0.75 uS and ESR

C

OUT

= 40 mV



OUT

V



45 mV  500 mA  0.05 

P−P

OUTRIPPLE

500 mA  0.75 S

at I

OUT

I

OUT

COUT

= 500 mA

 t

ON

 I

OUT

= 0.05 ,

 ESR

 18.75 F

OUT

COUT

=3.3 V

LAVG,

RIPPLE−P,

at

and

R3  300 k

2.0 V



1.20 V

 1 220 k

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11

NCP1421

From the previous calculations, you need at least 18.75
F in order to achieve the specified ripple level at the
conditions stated. Practically, a capacitor that is one level
larger is used to accommodate factors not taken into
account in the calculations. Therefore, a capacitor value of
22 F is selected. The NCP1421 is internally compensated
for most applications, but in case additional compensation

16
14
12
10

8

I

= 500 mA

6
4

INDUCTOR VALUE (H)

2
0

1.4

1.8 2.0 2.2

1.6
INPUT VOL TAGE (V)

Figure 27. Suggested Inductance of V

OUT

2.4

2.6 2.8 3.0

= 3.3 V Figure 28. Suggested Inductance of V

OUT

is required, the capacitor C4 can be used as external
compensation adjustment to improve system dynamics.

In order to provide an easy way for customers to select
external parts for NCP1421 in different input voltage and
output current conditions, values of inductance and
capacitance are suggested in Figure 27, 28 and 29.

21

18

15

12

9

6

INDUCTOR VALUE (H)

3

0

1.6

1.9

2.2 2.5 2.8 3.1 3.4 3.7 4.0
INPUT VOLTAGE (V)

I

OUT

= 500 mA

= 5.0 V

OUT

40
35
30

V

25
20
15
10

CAPACITOR VALUE (F)

OUT−RIPPLE

5
0

200 250 300 350 400 450 500 550 600

V

OUT−RIPPLE

= 45 mV

OUTPUT CURRENT (mA)

= 40 mV

V

OUT−RIPPLE

= 50 mV

25

CAPACITOR ESR (m)

33

50

100

Figure 29. Suggested Capacitance for Output Capacitor

T able 1. Suggestions for Passive Components

Output Current Inductors Capacitors

500 mA Sumida CR43, CR54,CDRH6D28 series Panasonic ECJ series

250 mA Sumida CR32 series Panasonic ECJ series

Kemet TL494 series

Kemet TL494 series

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NCP1421

PACKAGE DIMENSIONS

Micro8

DM SUFFIX

CASE 846A−02

ISSUE F

SEATING
PLANE

−T−

0.038 (0.0015)

PIN 1 ID

−A−

K

G

−B−

D

8 PL

0.08 (0.003) A

M

T

S

B

S

C

H

J

L

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH, PROTRUSIONS OR GATE BURRS SHALL
NOT EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.

5. 846A−01 OBSOLETE, NEW STANDARD 846A−02.

DIM MIN MAX MIN MAX

A 2.90 3.10 0.114 0.122
B 2.90 3.10 0.114 0.122
C −−− 1.10 −−− 0.043
D 0.25 0.40 0.010 0.016
G 0.65 BSC 0.026 BSC
H 0.05 0.15 0.002 0.006

J 0.13 0.23 0.005 0.009

K 4.75 5.05 0.187 0.199

L 0.40 0.70 0.016 0.028

INCHESMILLIMETERS

SOLDERING FOOTPRINT*

8X

1.04

0.041

0.38

0.015

8X

6X

0.0256

3.20

0.126

0.65

0.167

4.24

SCALE 8:1

5.28

0.208



inches

mm



*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

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NCP1421

Micro8 is a trademark of International Rectifier.
SENSEFET is a trademark of Semiconductor Components Industries, LLC.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NCP1421/D

14