Datasheet NC7WB3125 Datasheet (Fairchild Semiconductor)

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NC7WB3125
NC7WB3125 TinyLogic
May 2000 Revised April 2003
TinyLogic
General Description
The NC7WB3125 is a 2-bit ultra high-spee d CMOS FET bus switch with TTL-compatible active LOW control inputs. The low On Resistance of the switch allows inputs to be connected to outputs wi th minimal propagation de lay and without generating additional ground bounce noise. The device is organized a s a 2-b it switch with indepe ndent b us enable (OE and Port A is connect ed to Port B. Whe n OE switch is OPEN and a high-impedance state exists between the two ports. C ontrol inputs t olerate voltages up to 5.5V independent of V
) controls. When OE is LOW, the switch is ON
.
CC
is HIGH, the
Features
Space saving US8 surface mount package
MicroPak
Typical 3
Minimal propagation delay through the switch
Power down high impedance input/output
Zero bounce in flow through mode
TTL compatible active LOW control inputs
Control inputs are overvoltage tolerant
Bus switch replacement for Logic x125 part
leadless package
switch resistance at 5.0V V
CC
Ordering Code:
Product
Package Description Supplied AsOrder Package Code
Number Number Top Mark
NC7WB3125K8X MAB08A WB25 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel NC7WB3125L8X
(Preliminary)
MAC08A T4 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel
UHS 2-Bit Low Power Bus Switch
TinyLogic is a registered tradema rk of F airc hild Semiconduct or Corporation. MircoPak is a tradem ark of Fairchild Semiconductor Corporation.
© 2003 Fairchild Semiconductor Corporation DS500376 www.fairchildsemi.com
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Logic Diagram
NC7WB3125
Pin Descriptions
Pin Name Description
ABus A BBus B
OE
Function Table
Bus Enable Input
Connection Diagrams
(Top View)
Pin One Orientation Diagram
AAA represents Product Code Top Mark - see ordering cod e Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark lef t to right, Pin One is the lo w er left pin (see diagram ).
Pad Assignments for MicroPak
Bus Enable Input OE
L B Connected to A
H Disconnected
Function
(Top Thru View)
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Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) 0.5V to +7.0V DC Switch Voltage (V DC Output Voltage (V
) 0.5V to +7.0V
S
) (Note 2) 0.5V to +7.0V
IN
DC Input Diode Current
) VIN < 0V 50 mA
(I
IK
DC Output (I DC V
CC
(I
CC/IGND
Storage Temperature Range (T Junction Temperature under Bias (T Junction Lead Temperature (T
(Soldering, 10 Seconds)
Power Dissipation (P
) Current 128 mA
OUT
or Ground Current
) ±100 mA
) 65°C to +150°C
STG
) +150°C
J
)
L
) @ +85°C250 mW
D
+260°C
Conditions
Supply Operating (V Control Input Voltage (V Switch Input Voltage (V Output Voltage (V Operating Temperature (T Input Rise and Fall Time (t
Switch Control Input 0 ns/V to 5 ns Switch I/O 0 ns/V to DC
Thermal Resistance (
Note 1: The “Absolute Maxi mum Ratings ” are those val ues beyond w hich the safety of the d evice cannot b e guaranteed . The device sh ould not be operated at these limit s. The parametric values defi ned in the Electrical Characteristics tables are not gu aranteed at t he absolute m ax imum ratings . The “Recommend ed O peratin g Cond itions” t able w ill defin e the condition s for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if the input and ou t put diode current ratings are observed.
Note 3: Unused logic inputs must be held HIGH or LOW. They may not float.
(Note 3)
) 4.0V to 5.5V
CC
) 0V to 5.5V
IN
) 0V to 5.5V
IN
) 0V to 5.5V
OUT
) 40°C to +85°C
A
, tf)
r
θ
)250°C/W
JA
DC Electrical Characteristics
V
Symbol Parameter
V
IK
V
IH
V
IL
V
OH
I
IN
I
OFF
R
ON
I
CC
I
Note 4: Measured by the voltage drop between A and B pins at the indicated c urrent through the switch. On Resistanc e is determined by the lower of the voltages on the two (A or B) pins.
Note 5: Per TTL driven input (V
Clamp Diode Voltage 4.5 −1.2 V IIN = 18 mA HIGH Level Input Voltage 4.0 to 5.5 2.0 V LOW Level Input Voltage 4.0 to 5.5 0.8 V HIGH Level Output Voltage 4.0 to 5.5 See Figure 3 V VIN = V Input Leakage Current 5.5 ±1.0 µA0 ≤ VIN 5.5V Switch OFF Leakage Current 5.5 ±1.0 µA0 ≤ A, B ≤ V Switch On Resistance 4.5 3 7 (Note 4) 4.5 3 7 VIN = 0V, IIN = 30 mA
Quiescent Supply Current 5.5 3 µAVIN = VCC or GND
Increase in ICC per Input (Note 5) 5.5 1 2.5 mA VIN = 3.4V, One OE Input only,
CC
= 3.4V, control input only). A and B pins do not contribute to ICC.
IN
CC
(V) Min Typ Max
4.5 6 15 V
4.0 10 20 V
TA = 40°C to +85°C
Units Conditions
CC
VIN = 0V, IIN = 64 mA
I
OUT
Other OE = V
CC
= 2.4V, IIN = 15 mA
IN
= 2.4V, IIN = 15 mA
IN
= 0
CC
NC7WB3125
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AC Electrical Characteristics
TA = 40°C to +85°C,
Symbol Parameter
V
CL = 50 pF, RU = RD = 500
CC
Units Conditions Figure
(V) Min Typ Max Number
t
, Propagation Delay Bus to Bus 4.0 to 5.5 0.25 ns VI = OPEN Figures
PHL
NC7WB3125
t t t t t
(Note 6)
PLH
, Output Enable Time 4.5 to 5.5 0.8 2.5 4.2
PZL PZH
, Output Disable Time 4.5 to 5.5 0.8 3.1 4.8
PLZ PHZ
Note 6: This parameter is g uaran teed b y de sign . The bu s s witch co ntrib utes n o propa gatio n delay oth er t han t he R C d elay of th e ty pic al On Resistance of the switch and the 5 0 pF load capacitance, w hen driven by an idea l vo lt age source (zero out put im pedance). The spec if ied limit is calculated o n t his basis.
4.0 0.8 3.0 4.6 VI = 0V for t
4.0 0.8 2.9 4.4 VI = 0V for t
ns
ns
VI = 7V for t
VI = 7V for t
PZL PZH PLZ PHZ
Capacitance
Symbol Parameter Typ Max Units Conditions
C
IN
C
(OFF) Port Off Capacitance 6 pF VCC = 5.0V = OE
I/O
C
(ON) Switch ON Capacitance 12 pF VCC = 5.0V, OE = 0V
I/O
Control Pin Input Capacitance 2.5 pF VCC = 0V
AC Loading and Waveforms
Input driven by 50 source terminated in 50
includes load and stray capacitance
C
L
Input PRR = 1. 0 M H z ; t
FIGURE 1. AC Test Circuit
= 500 ns
W
1, 2
Figures
1, 2
Figures
1, 2
FIGURE 2. AC Waveforms
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DC Characteristics
NC7WB3125
FIGURE 3. Typical High Level Output Voltage vs. Supply Voltage
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Tape and Reel Specification
TAPE FORMAT for US8
Package Tape Number Cavity Cover Tape
Designator Section Cavities Status Status
NC7WB3125
K8X Carrier 250 Filled Sealed
TAPE DIMENSIONS inches (millimeters)
TAPE FO RM AT for Mic ro Pak
Package Tape Number Cavity Cover Tape
Designator Section Cavities Status Status
L8X Carrier 250 Filled Sealed
Leader (Start End) 125 (typ) Empty Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
Leader (Start End) 125 (typ) Empty Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
TAPE DIMENSIONS inches (millimeters)
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Tape and Reel Specification (Continu ed)
REEL DIMENSIONS inches (millimeters)
NC7WB3125
Tape Size
8 mm
ABCDN W1 W2 W3
7.0 0.059 0.512 0.795 2.165 0.331
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40
+ 0.059/0.000 0.567 W1 + 0.078/0.039
+ 1.50/0.00) (14.40) (W1 + 2.00/1.00)
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Physical Dimensions inches (millimeters) unless otherwise noted
NC7WB3125
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
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Package Number MAB08A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
NC7WB3125 TinyLogic
UHS 2-Bit Low Power Bus Switch
8-Lead MicroPak, 1.6 mm Wide
Package Number MAC08A
(Preliminary)
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provide d in the l abe ling, can be rea­sonably expected to result in a significant injury to the user.
2. A critical compo nent in any com ponen t of a life s upp ort device or system whose failure to perform can be rea­sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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