Datasheet NC7SB121 Datasheet (Fairchild)

Page 1
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NC7SB121
NC7SB121 TinyLogic
October 2001 Revised October 2001
TinyLogic
Wide Bandwidth Normally Open Analog Switch
General Description
The NC7SB121 is a ul tra high-speed (UHS) CM OS com­patible single-pole/single-throw (SPST) analog switch or 1-bit bus switch. The LOW on resistance of the switch allows inputs to be connected to outputs with minimal prop­agation delay and without generating additional ground bounce noise. The dev ice is organized as a 1-bit switch with a switch enable (O E) signal. When OE is HI GH, the switch is on and Port A is connected to Port B. When OE is LOW, the switch is open and a high-impedance state exists between the two ports.
Ordering Code:
Order Package Product Code
Number Number Top Mark
NC7SB121M5X MA05B 7B21 5-Lead SOT23, JEDEC MO-178, 1.6mm 3k Units on Tape and Reel NC7SB121P5X MAA05A B21 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel NC7SB121L6X MAC06
(Preliminary)
21 6-Lead MicroPak, 1.0mm Wide 5k Units on Tape and Reel
Features
■ Space saving SOT23 or SC70 5-lead package
■ Ultra small MicroPak
■ Broad V
■ Rail-to-rail signal handling
■ 7.2
■ Minimal propagation delay through the switch
■ Low I
■ Zero bounce in flow-through mode
■ Control input compatible with CMOS input levels
■
>326 MHz −3dB bandwid th
■ Improved package replacement for the P15A121
Package Descript ion Supplied As
Operating Range 2V–5.5V
CC
Ω switch connection between two ports
CC
leadless package
Low Voltage UHS Single SPST Wide Bandwidth Normally Open Analog Switch
TinyLogic and MicroPak are trademarks of Fairchild Semico nductor Corporatio n.
© 2001 Fairchild Semiconductor Corporation DS500662 www.fairchildsemi.com
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Logic Symbol
NC7SB121
Pin Descriptions
Pin Names Description
OE Switch Enable Input
NC No Connect
Function Table
OE B
L HIGH-Z State Disconnect HA
A Bus A I/O B Bus B I/O
0
0
Function
Connect
Analog Symbol
Connection Diagrams
Pin Assignments for SC70
(Top View)
Pad Assignment for MicroPak
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(Top Thru View)
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Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) −0.5V to +7.0V DC Switch Voltage (V DC Input Voltage (V
) −0.5V to VCC +0.5V
S
) (Note 2) −0.5V to +7.0V
IN
DC Input Diode Current
) VIN < 0V −50 mA
(I
IK
DC Output (I DC V
CC
) Sink Current 128 mA
OUT
/GND Current (ICC/I
) ±100 mA
GND
Storage Temperature Range
(T
) −65°C to +150°C
STG
Junction Lead Temperature
under Bias (T
Junction Lead Temperature (T
(Soldering, 10 Seconds)
Power Dissipation (P
) +150°C
J
)
L
+260°C
) @ +85°C
D
SOT23-5 200 mW SC70-5 150 mW
Conditions
Power Supply Operating (V Control Input Voltage (V Switch Input Voltage (V Switch Output Voltage (V Input Rise and Fall Time (tr, tf)
Control Input; V Control Input; V
Switch I/O 0 ns/V to DC Operating Temperature (T Thermal Resistance (
SOT23-5 300
SC70-5 425
Note 1: The “Absolute Maximum Ratings” are those value s beyond which the safety of the d evice cannot b e guaranteed . The device sh ould not be operated at these limit s. The parametric values defi ned in the Electrical Characteristics tab les are not gu aranteed at t he absolute m ax imum rating s . The “Recomm ended O peratin g Cond itions ” table will defin e the condition s for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if the input and ou t put diode current ratings ar e observed.
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
(Note 3)
) 2V to 5.5V
CC
) 0V to 5.5V
IN
)0V to V
IN
)0V to V
OUT
= 2.3V−3.6V 0 ns/V to 10 ns
CC
= 4.5−5.5V 0 ns/V to 5 ns
CC
) −40°C to +85°C
A
θ
)
JA
DC Electrical Characteristics
V
Symbol Parameter
V
HIGH Level Input Voltage 2 to 5.5 0.7 V
IH
V
LOW Level Input Voltage 2 to 5.5 0.3 VCCV
IL
I
Control Input
IN
Leakage Current
I
OFF Leakage Current 2 to 5.5 ±0.05 ±10.0 µA0 ≤ A, B ≤ V
OFF
R
Switch On Resistance 4.5 7.2 10 12
ON
(Note 4) 3.0 12 18 12 22 V On Resistance Flatness 5.0 3.2 3.5 4
R
flat
(Note 4)(Note 6)(Note 7) 3.3 4.5 5 5 IA = −24 mA, VIN = 0.8, 2.5V
I
Quiescent Supply Current 2 to 5.5 1 0.05 10 µAVIN = VCC or GND
CC
Note 4: Measured by the voltage drop between A and B pins at the indicated c urrent through the switch. On Resistanc e is determined by the lower of the voltages on the two (A or B) pins.
Note 5: All typical values are at the s pec ified V Note 6: Parameter is characteri z ed but not tested in production.
Note 7: Flatness is defined as the di fference between the ma x im um and minimum value of On Resistanc e ov er the specified rang e of conditions.
CC
(V) Min Typ Max Min Typ
0 to 5.5 ±0.05 ±1.0 µA0 ≤ VIN ≤ 5.5V
, and TA = 25°C.
CC
TA = +25°CT
= −40°C to +85°C
A
(Note 5)
CC
Units Conditions
Max
V
VIN = 2.5V, IIN = 30 mA
Ω
IA = −30 mA, VIN = 1, 2.5, 4V
Ω
I
CC
= 1.5V, IIN = 24 mA
IN
= 0
OUT
NC7SB121
CC CC
°C/Watt °C/Watt
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AC Electrical Characteristics
TA= −40°C to +85°C,
Symbol Parameter
NC7SB121
, t
t
PZL
t
PLZ
Output Enable Time 3.0 - 3.6 25 ns VIN = 2 x VCC for t
PZH
, t
Output Disable Time 3.0 - 3.6 12 ns VIN= 2 x VCC for t
PHZ
V
(V) Min Typ
4.5 - 5.5 15 ns V
4.5 - 5.5 7 ns V
CL= 50 pF, RU= RD = 500Ω
CC
(Note 8)
Units Conditions Figure
Max Number
= 0V for t
IN
= 0V for t
IN
Q Charge Injection (Note 9) 2 - 5.5 10 p C CL = 1 nF, V
R
= 0Ω, f = 1 MHz
GEN
OIRR Off Isolation (Note 10) 2 - 5.5 −43 dB R
= 50 Ω, CL = 5 pF,
L
f = 10 MHz
BW −3dB Bandwidth 2 - 5.5 326 MHz R
Note 8: All typical values are at the specified VCC, and TA = 25°C. Note 9: Guaranteed by design. Note 10: Off Isolation = 20 log
[VA/VBN].
10
= 50 Ω Figure 5
L
Capacitance
Symbol Parameter Typ Max Units Conditions
C
IN
C
I/O
Control Pin Input Capacitance 2 pF VCC = 0V Input/Output Capacitance 5.5 pF VCC = 5.0V
PZL Figures
PZH
PLZ Figures
PHZ
= 0V,
GEN
1, 2
1, 2
Figure 3
Figure 4
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AC Loading and Waveforms
Input driven by 50Ω source terminated in 50Ω
includes load and s tr ay c apacitance.
C
L
Input PR R = 1.0 MHz; t
= 500 ns
w
NC7SB121
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
FIGURE 3. Charge Injection Test
FIGURE 4. Off Isolation FIGURE 5. Bandwidth
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Tape and Reel Specification
TAPE FORMAT FOR SOT23, SC70
Package Tape Number Cavity Cover Tape
Designator Section Cavities Status Status
NC7SB121
M5X, P5X Carrier 3000 Filled Sealed
TAPE DIMENSIONS inches (millimeters)
Leader (Start End) 125 (typ) Empty Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
Package
SC70-5 8 mm
SOT23-5 8 mm
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Tape Size DIM A DIM B DIM F DIM K
0.093 0.096 0.138 (2.35) (2.45) (3.5
0.130 0.130 0.138 (3.3) (3.3) (3.5
DIM P1 DIM W
o
± 0.004 0.053 ± 0.004 0.157 0.315 ± 0.004
± 0.10) (1.35 ± 0.10) (4) (8 ± 0.1)
± 0.002 0.055 ± 0.004 0.157 0.315 ± 0.012
± 0.05) (1.4 ± 0.11) (4) (8 ± 0.3)
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Tape and Reel Specification (Continu ed)
TAPE FORMAT FOR MicroPak
Package Tape Number Cavity Cover Tape
Designator Section Cavities Status Status
Leader (Start End) 125 (typ) Empty Sealed
L6X Carrier 5000 Filled Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
TAPE DIMENSIONS inches (millimeters)
NC7SB121
REEL DIMENSIONS inches (millimeters)
Tape
Size
8 mm
ABCDN W1 W2 W3
7.0 0.059 0.512 0.795 2.165 0.331
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40
+ 0.059/−0.000 0.567 W1 + 0.078/−0.039
+ 1.50/−0.00) (14.40) (W1 + 2.00/−1.00)
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Physical Dimensions inches (millimeters) unless otherwise noted
NC7SB121
5-Lead SOT23, JEDEC MO-178, 1.6mm
Package Number MA05B
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
NC7SB121
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
Package Number MAA05A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Low Voltage UHS Single SPST Wide Bandwidth Normally Open Analog Switch
6-Lead MicroPak, 1.0mm Wide
Package Number MAC06A
Preliminary
Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied a nd Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are device s or syste ms
NC7SB121 TinyLogic
which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the user.
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2. A critical component in any compon ent of a l ife supp ort device or system whose failu re to perform can be rea­sonably expected to cause the failure of the li fe su pp ort device or system, or to affect its safety or effectiveness.
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