Page 1
74F273A
Octal D flip-flop
Product specification
IC15 Data Handbook
1996 Mar 12
INTEGRATED CIRCUITS
Page 2
Philips Semiconductors Product specification
74F273AOctal D flip–flop
2
1996 Mar 12 853–0066 16555
FEA TURES
• High impedance inputs for reduced loading
(20
µA in Low and High states)
• Ideal buffer for MOS microprocessor or memory
• Eight edge–triggered D–type flip–flops
• Buffered common clock
• Buffered asynchronous Master Reset
• See 74F377A for clock enable version
• See 74F373 for transparent latch version
• See 74F374 for 3–State version
DESCRIPTION
The 74F273 has eight edge–triggered D–type flip–flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR
) inputs load and reset (clear) all flip–flops
simultaneously .
The register is fully edge–triggered. The state of each D input, one
setup time before the Low–to–High clock transition, is transferred to
the corresponding flip–flop’s Q output.
All outputs will be forced Low independently of Clock or Data inputs
by a Low voltage level on the MR
input. The device is useful for
applications where the true output only is required and the CP and
MR
are common to all elements.
TYPE
TYPICAL
f
MAX
TYPICAL SUPPL Y CURRENT
(TOT AL)
74F273A 170MHz 25mA
ORDERING INFORMATION
PACKAGES
COMMERCIAL RANGE
V
CC
= 5V±10%;
T
amb
= 0°C to +70°C
PKG. DWG. #
20–pin plastic DIP 74F273AN SOT146-1
20–pin plastic SOL 74F273AD SOT163-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
D0 – D7 Data inputs 1.0/0.033 20µA/20µA
MR Master Reset input (active–Low) 1.0/0.033 20µA/20µA
CP Clock pulse input (active rising edge) 1.0/0.033 20µA/20µA
Q0 – Q7 Data outputs 50/33 1.0mA/20mA
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3 Q4
GND
D4
D5
Q5
Q6
D6
D7
Q7
V
CC
CP
SF00346
LOGIC SYMBOL
3 4 7 8 13 14 1817
D0 D1 D2 D3 D4 D5 D6 D7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2 5 6 9 12 15 16 19
1
11
MR
CP
V
CC
= Pin 20
GND = Pin 10
SF00347
Page 3
Philips Semiconductors Product specification
74F273AOctal D flip–flop
1996 Mar 12
3
LOGIC SYMBOL (IEEE/IEC)
SF00348
1
32
4
5
7
6
8
9
R
11
C1
13
12
14
15
17
16
18
19
1D
LOGIC DIAGRAM
CP
Q
R
D
D
3
D0
Q0
CP
Q
R
D
D
4
D1
CP
Q
R
D
D
7
D2
CP
Q
R
D
D
8
D3
CP
Q
R
D
D
13
D4
CP
Q
R
D
D
14
D5
CP
Q
R
D
D
17
D6
CP
Q
R
D
D
18
D7
2
Q1
5
Q2
6
Q3
9
Q4
12
Q5
15
Q6
16
Q7
19
11
1
CP
MR
VCC = Pin 20
GND = Pin 10
SF00349
FUNCTION TABLE
INPUTS OUTPUTS OPERATING
MR CP Dn Q0 – Q7 MODE
L X X L Reset (clear)
H ↑ h H Load ”1”
H ↑ l L Load ”0”
H = High voltage level
h = High voltage level one set–up time prior to the Low–to–High clock transition
L = Low voltage level
l = Low voltage level one set–up time prior to the Low–to–High clock transition
X = Don’t care
↑ = Low–to–High clock transition
Page 4
Philips Semiconductors Product specification
74F273AOctal D flip–flop
1996 Mar 12
4
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER RATING UNIT
V
CC
Supply voltage –0.5 to +7.0 V
V
IN
Input voltage –0.5 to +7.0 V
I
IN
Input current –30 to +5 mA
V
OUT
Voltage applied to output in High output state –0.5 to V
CC
V
I
OUT
Current applied to output in Low output state 40 mA
T
amb
Operating free air temperature range 0 to +70
°C
T
stg
Storage temperature range –65 to +150
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
MIN TYP MAX
V
CC
Supply voltage 4.5 5.0 5.5 V
V
IH
High–level input voltage 2.0 V
V
IL
Low–level input voltage 0.8 V
I
Ik
Input clamp current –18 mA
I
OH
High–level output current –1 mA
I
OL
Low–level output current 20 mA
T
amb
Operating free air temperature range 0 +70
°C
Page 5
Philips Semiconductors Product specification
74F273AOctal D flip–flop
1996 Mar 12
5
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER TEST LIMITS UNIT
CONDITIONS
1
MIN TYP2MAX
MR & CP VCC = MIN, VIL = 0.0V3, ±10%V
CC
2.5 V
V
OH
High-level output voltage inputs VIH = 4.5V3, IOH = MAX ±5%V
CC
2.7 3.4 V
other VCC = MIN, VIL = MAX, ±10%V
CC
2.5 V
inputs VIH = MIN, IOH = MAX ±5%V
CC
2.7 3.4 V
V
OL
Low-level output voltage VCC = MIN, VIL = MAX, ±10%V
CC
0.30 0.50 V
VIH = MIN, IOH = MAX ±5%V
CC
0.30 0.50 V
V
IK
Input clamp voltage VCC = MIN, II = I
IK
–0.73 -1.2 V
I
I
Input current at maximum input voltage VCC = 0.0V, VI = 7.0V 100 µA
I
IH
High–level input current VCC = MAX, VI = 2.7V 20 µA
I
IL
Low–level input current VCC = MAX, VI = 0.5V –20 µA
I
OS
Short–circuit output current
4
VCC = MAX -60 -150 mA
I
CC
Supply current (total) I
CCH
VCC = MAX 24 38 mA
I
CCL
27 43 mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. To reduce the effect of external noise during test.
4. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
AC CHARACTERISTICS FOR ’F273A
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25°C
VCC = +5.0V
CL = 50pF
RL = 500Ω
T
amb
= 0°C to +70°C
VCC = +5.0V ±10%
CL = 50pF
RL = 500Ω
UNIT
Min Typ Max Min Max
f
MAX
Maximum clock frequency 1 150 170 125 MHz
t
PLH
t
PHL
Propagation delay
CP to Qn
1
3.5
5.0
5.0
7.0
8.0
9.5
3.0
4.5
9.0
10.0
ns
t
PHL
Propagation delay
MR to Qn
2 5.0 7.0 9.0 5.0 9.5 ns
Page 6
Philips Semiconductors Product specification
74F273AOctal D flip–flop
1996 Mar 12
6
AC SETUP REQUIREMENTS FOR ’F273A
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25°C
V
CC
= +5.0V
CL = 50pF
RL = 500Ω
T
amb
= 0°C to +70°C
V
CC
= +5.0V ±10%
CL = 50pF
RL = 500Ω
UNIT
Min Typ Max Min Max
ts(H)
ts(L)
Setup time, High or Low
Dn to CP
3
3.0
2.0
2.5
2.5
th(H)
th(L)
Hold time, High or Low
Dn to CP
3
0.5
0.0
2.5
1.0
ns
tw(H)
tw(L)
Clock pulse width
High or Low
1
4.5
3.5
5.0
4.0
ns
tw(L) Master Reset pulse width, Low 2 3.0 3.5 ns
t
REC
Recovery time
MR to CP
2 4.0 5.0 ns
AC WAVEFORMS
CP
V
M
V
M
V
M
tw(H)
1/f
max
V
M
V
M
t
PLH
tw(L)t
PHL
Qn
SF00294
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
V
M
SF00158
MR
Qn
V
M
tw(L)
t
PHL
V
M
t
REC
CP
V
M
Waveform 2. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
th(H)ts(H)
CP
SF00191
V
M
V
M
V
M
V
M
V
M
V
M
th(L)ts(L)
Dn
Waveform 3. Data Setup and Hold Times
NOTE: For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
Page 7
Philips Semiconductors Product specification
74F273AOctal D flip–flop
1996 Mar 12
7
TEST CIRCUIT AND WAVEFORMS
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0V
0V
t
THL (tf
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLHtTHL
1MHz 500ns
2.5ns 2.5ns
Input Pulse Definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for Open Collector Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
t
THL (tf
)
t
TLH (tr
)
t
TLH (tr
)
AMP (V)
amplitude
3.0V
1.5V
V
M
R
L
7.0V
SF00128
TEST SWITCH
t
PLZ
closed
t
PZL
closed
All other open
SWITCH POSITION
Page 8
Philips Semiconductors Product specification
74F273AOctal D flip-flop
1996 Mar 12
8
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
Page 9
Philips Semiconductors Product specification
74F273AOctal D flip-flop
1996 Mar 12
9
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
Page 10
Philips Semiconductors Product specification
74F273AOctal D flip-flop
yyyy mmm dd
10
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 9397-750-051 13
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
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