Datasheet N74ALS164D, N74ALS164N Datasheet (Philips)

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74ALS164

8–bit serial–in parallel–out shift register

Product specification
IC05 Data Handbook

1991 Feb 08

INTEGRATED CIRCUITS

Philips Semiconductors Product specification

74ALS1648-bit serial-in parallel-out shift register

2

1991 Feb 08 853–1510 01670

FEA TURES

•Gated serial data inputs

•Typical shift frequency of 75MHz

•Asynchronous master reset

•Buffered clock and data inputs

•Fully synchronous data transfer

DESCRIPTION

The 74ALS164 is an 8-bit edge-triggered shift register with serial
data entry and an output from each of the eight stages. Data is
entered serially through one of two inputs (Dsa, Dsb); either input
can be used as an active-high enable for data entry through the
other input. Both inputs must be connected together or an unused
input must be tied High.

Data shifts one place to the right on each Low-to-high transition of
the clock (CP) input, and enters into Q0 the logical AND of the two
data inputs (Dsa, Dsb) that existed one setup time before the rising
edge. A Low level on the Master reset (MR

) input overrides all other
inputs and clears the register asynchronously, forcing all outputs
Low.

PIN CONFIGURATION

14
13
12
11
10

9
87

6

5

4

3

2

1

SF00717

Dsa
Dsb

Q0
Q1
Q2
Q3

GND

V

CC

Q7
Q6
Q5
Q4
MR
CP

TYPE

TYPICAL

f

MAX

TYPICAL

SUPPLY CURRENT

(TOTAL)

74ALS164 75MHz 10mA

ORDERING INFORMATION

ORDER CODE

DESCRIPTION COMMERCIAL RANGE

V

CC

= 5V ±10%,

T

amb

= 0°C to +70°C

DRAWING

NUMBER

14-pin plastic DIP 74ALS164N SOT27-1

14-pin plastic SO 74ALS164D SOT108-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS DESCRIPTION

74ALS (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

Dsa, Dsb Data inputs 1.0/1.0 20µA/0.1mA

CP Clock Pulse input (active rising edge) 1.0/1.0 20µA/0.1mA
MR Master Reset input (active-Low) 1.0/1.0 20µA/0.1mA

Q0 – Q7 Data outputs 20/80 0.4mA/8mA

NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.

LOGIC SYMBOL

Dsa Dsb

Q0

12

V

CC

= Pin 14

GND = Pin 7

Q1 Q3 Q4

Q0 Q1 Q3 Q4

CP

MR

8

9

SF00713

3 4 5 6 10 11 12 13

IEC/IEEE SYMBOL

1
2

SRG8

&

R

C1/→

8

9

1D

SF00714

3
4
5

6
10
11
12
13

Philips Semiconductors Product specification

74ALS1648-bit serial-in parallel-out shift register

1991 Feb 08

3

LOGIC DIAGRAM

DQ

RD

Q0

1

Dsa
Dsb

2

CP

MR

3

8

9

V

CC

= Pin 14

GND = Pin 7

DQ

RD

Q1

4

DQ

RD

Q2

5

DQ

RD

Q3

6

DQ

RD

Q4

10

DQ

RD

Q5

11

DQ

RD

Q6

12

DQ

RD

Q7

13

SF00715

CPCPCPCPCPCPCPCP

MODE SELECT FUNCTION TABLE

INPUTS OUTPUTS

MR CP Dsa Dsb Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

OPERATING MODE

L X X X L L L L L L L L Reset (Clear)
H ↑ l l L q0 q1 q2 q3 q4 q5 q6
H ↑ l h L q0 q1 q2 q3 q4 q5 q6
H ↑ h l L q0 q1 q2 q3 q4 q5 q6

Shift

H ↑ h h H q0 q1 q2 q3 q4 q5 q6

NOTES:

H = High voltage level
h = High voltage level one setup time prior to the Low-to-High clock transition
L = Low voltage level
l = Low voltage level one setup time prior to the Low-to-High clock transition
qn = Lower case letter indicate the state of the referenced output one setup time prior to the Low-to-High clock transition.
X = Don’t care
↑ = Low-to-High clock transition

APPLICA TION

The 74ALS164 can be cascaded to form synchronous shift registers of longer length.
Here, two devices are combined to form a 16-bit shift register.

CLEAR

CLOCK

DATA

ENABLE

Dsa
Dsb

Dsa
Dsb

CP MR

D0 D1 D2 D3 D4 D5 D6 D7

D8 D9 D10 D11 D12 D13 D14 D15

CP MR

H

74ALS164 74ALS164

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

SC00063

Philips Semiconductors Product specification

74ALS1648-bit serial-in parallel-out shift register

1991 Feb 08

4

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)

SYMBOL

PARAMETER RATING UNIT

V

CC

Supply voltage –0.5 to +7.0 V

V

IN

Input voltage –0.5 to +7.0 V

I

IN

Input current –30 to +5 mA

V

OUT

Voltage applied to output in High output state –0.5 to V

CC

V

I

OUT

Current applied to output in Low output state 16 mA

T

amb

Operating free-air temperature range 0 to +70 °C

T

stg

Storage temperature range –65 to +150 °C

RECOMMENDED OPERATING CONDITIONS

LIMITS

SYMBOL

PARAMETER

MIN NOM MAX

UNIT

V

CC

Supply voltage 4.5 5.0 5.5 V

V

IH

High-level input voltage 2.0 V

V

IL

Low-level input voltage 0.8 V

I

Ik

Input clamp current –18 mA

I

OH

High-level output current –0.4 mA

I

OL

Low-level output current 8 mA

T

amb

Operating free-air temperature range 0 +70 °C

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

1

MIN TYP

2

MAX

UNIT

V

OH

High-level output voltage VCC±10%, VIL = MAX, VIH = MIN, IOH = MAX V

CC

– 2 V

p

VCC = MIN, VIL = MAX,

I

OL

= 4mA 0.25 0.4 V

VOLLow-level output voltage

CC

,

IL

,

VIH = MIN

I

OL

= 8mA 0.35 0.50 V

V

IK

Input clamp voltage VCC = MIN, II = I

IK

–0.73 –1.5 V

I

I

Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA

I

IH

High-level input current VCC = MAX, VI = 2.7V 20 µA

I

IL

Low-level input current VCC = MAX, VI = 0.5V –0.1 mA

I

O

Output current

3

VCC = MAX, VO = 2.25V –30 –112 mA

I

CC

Supply current (total) VCC = MAX 10 15 mA

NOTES:

1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.

2. All typical values are at V

CC

= 5V, T

amb

= 25°C.

3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I

OS

.

Philips Semiconductors Product specification

74ALS1648-bit serial-in parallel-out shift register

1991 Feb 08

5

AC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL PARAMETER TEST CONDITION

T

amb

= 0°C to +70°C

V

CC

= +5.0V ± 10%

C

L

= 50pF, RL = 500Ω

UNIT

MIN MAX

f

MAX

Maximum clock frequency Waveform 1 50 MHz

t

PLH

t

PHL

Propagation delay
CP to Qn

Waveform 1

5.0

6.0

13.0

15.0

ns

t

PHL

Propagation delay, MR to Qn Waveform 2 8.0 18.0 ns

AC SETUP REQUIREMENTS

LIMITS

SYMBOL PARAMETER TEST CONDITION

T

amb

= 0°C to +70°C

V

CC

= +5.0V ± 10%

C

L

= 50pF, RL = 500Ω

UNIT

MIN MAX

tsu(H)
t

su

(L)

Setup time, High or Low
Dn

to CP

Waveform 3

6.0

5.0

ns

th(H)

t

h

(L)

Hold time, High or Low
Dn

to CP

Waveform 3

0
0

ns

tw(H)
t

w

(L)

Clock pulse width,
High or Low

Waveform 1

10.0

7.0

ns

tw(L) MR pulse width, Low Waveform 2 6.0 ns

t

REC

Recovery time, MR to CP Waveform 2 6.0 ns

AC WAVEFORMS

For all waveforms, VM = 1.3V .
The shaded areas indicate when the input is permitted to change for predictable output performance.

CP

V

M

V

M

V

M

tw(H)

1/f

max

V

M

V

M

t

PLH

tw(L)t

PHL

Qn

SF00294

Waveform 1. Propagation Delay for Clock Input to Output,

Clock Pulse Width,

and Maximum Clock Frequency

V

M

SC00065

MR

Qn

V

M

tw(L)

t

PHL

V

M

t

REC

CP

V

M

Waveform 2. Master Reset Pulse Width,

Master Reset to Output Delay,

and Master Reset to Clock Recovery Time

th(H)tsu(H)

CP

SC00064

V

M

V

M

V

M

V

M

V

M

V

M

th(L)tsu(L)

Dn

Waveform 3. Data Setup and Hold Times

Philips Semiconductors Product specification

74ALS1648-bit serial-in parallel-out shift register

1991 Feb 08

6

TEST CIRCUIT AND WAVEFORMS

t

w

90%

V

M

10%

90%

V

M

10%

90%

V

M

10%

90%

V

M

10%

NEGATIVE
PULSE

POSITIVE
PULSE

t

w

AMP (V)

0.3V

0.3V

t

THL (tf

f

)

INPUT PULSE REQUIREMENTS

Rep.Rate

t

w

t

TLHtTHL

1MHz

500ns

2.0ns 2.0ns

Input Pulse Definition

V

CC

Family

74ALS

D.U.T.

PULSE

GENERATOR

R

L

C

L

R

T

V

IN

V

OUT

Test Circuit for Totem-pole Outputs

DEFINITIONS:

R

L

= Load resistor;

see AC electrical characteristics for value.

CL= Load capacitance includes jig and probe capacitance;

see AC electrical characteristics for value.

R

T

= Termination resistance should be equal to Z

OUT

of

pulse generators.

t

THL (tf

)

t

TLH (tr

)

t

TLH (tr

)

AMP (V)

Amplitude

3.5V

1.3V

V

M

SC00005

Philips Semiconductors Product specification

74ALS1648–bit serial–in parallel–out shift register

1991 Feb 08

7

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

Philips Semiconductors Product specification

74ALS1648–bit serial–in parallel–out shift register

1991 Feb 08

8

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

Philips Semiconductors Product specification

74ALS1648–bit serial–in parallel–out shift register

1991 Feb 08

9

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.

LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.

 Copyright Philips Electronics North America Corporation 1997

All rights reserved. Printed in U.S.A.

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