How it Works
Datasheet
Loading...
N-201J4-L01

Datasheet N-201J4-L01 Datasheet (Chi Mei Optoelectronics)

Download
Page 1
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
TFT LCD Approval Specification
MODEL NO.: N201J4 - L01
Customer :
Approved by :
Note :
www.jxlcd.com
www.jxlcd.com



2007-12-12
14:04:41 CST
PMMD
Director
cs_lee(
/56510/44926)
1 / 30
DirectorAccept
Version 2.0
Page 2
Doc. No.:
14074327
- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID CODE DATA STRUCTURE
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
8.2 SAFETY PRECAUTIONS
9. PACKING
9.1 CARTON
9.2 PALLET
10. DEFINITION OF LABELS 10
.1 CMO MODULE LABEL
10.2 CMO CARTON LABEL
www.jxlcd.com
www.jxlcd.com
Model No.: N201J4 - L01
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
-------------------------------------------------------
Approval
3
4
5
7
11
12
18
20
23
24
25
2 / 30
Version 2.0
Page 3
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
Version
Ver 2.0
REVISION HISTORY
Date
Dec. 05,2007
www.jxlcd.com
www.jxlcd.com
Page
(New)
All
Section
All Approval specification is first issued
Description
3 / 30
Version 2.0
Page 4
Doc. No.:
14074327
Model No.: N201J4 - L01
1. GENERAL DESCRIPTION
1.1 OVERVIEW
N201J4 - L01 is a 20.1” TFT Liquid Crystal Display module with two CCFLs Backlight unit and 40 pins LVDS interface. This module supports 1920 x 1200 Wide-WUXGA mode and can display 16,777,216 colors. The optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and High Brightness
- WUXGA (1920 x 1200 pixels) resolution
- DE only mode
- 5.0V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock
- 2 CCFLs
1.3 APPLICATION
Approval
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 433.44 (H) x 270.9 (V) (20.1” diagonal) mm Bezel Opening Area 437.2 (H) x 274.7 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1920 x R.G.B. x 1200 pixel ­Pixel Pitch 0.22575 (H) x 0.22575 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 16,777,216 color ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), Glare Type - -
1.5 MECHANICAL SPECIFICATIONS
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
www.jxlcd.com
www.jxlcd.com
Item Min. Typ. Max. Unit Note
Horizontal (H) Vertical (V) 296 296.5 297 mm Depth (D) --- 8.3 8.6 mm
Weight --- 1385 1400 g -
453 453.5 454 mm
(1)
(1)
4 / 30
Version 2.0
Page 5
Doc. No.:
14074327
Stage
Bracket
LCD Module
80 60
40 0 20
80 40 60 20 10 90
Model No.: N201J4 - L01
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC Storage Humidity HST 10 90 % Operating Ambient Temperature TOP 0 +50 ºC Operating Humidity HOP 20 90 % Shock (Non-Operating) HST - 200/2 G/ms (3), (5) Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown below. (a) 90 %RH Max. (Ta 40 ºC). (b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC). (c) No condensation.
Relative Humidity (%RH)
- 1.5 G (4), (5)
NOP
Min. Max.
Value
Unit Note
Approval
(1)
(1), (2)
100
Operating Range
www.jxlcd.com
www.jxlcd.com
Storage Range
-40
Note (2) The ambient temperature means the temperature of panel surface. Note (3) 1 time for ± X, ± Y, ± Z. for Condition (200G / 2ms) is half Sine Wave. Note (4) 10 ~ 500 Hz, 0.5 Hr / Cycle, 1 cycles for each X, Y, Z axis.
-20
Temperature (ºC)
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
Side Mount Fixing Screw
gap=2mm
Side Mount Fixing Screw
5 / 30
Version 2.0
Page 6
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage VCC -0.3 +6.0 V Logic Input Voltage VIN -0.3 4.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL Lamp Current IL Lamp Frequency FL
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Min. Max.
Min. Max.
  
Value
Value
1400 V
8 mA
80 KHz
Unit Note
(1)
Unit Note
(1), (2), IL = 7.5 mA
RMS
RMS
(1), (2)
Note (2) Specified values are for lamp (Refer to 3.2 for further information).
www.jxlcd.com
www.jxlcd.com
6 / 30
Version 2.0
Page 7
Doc. No.:
14074327
3. ELECTRICAL CHARACTERISTICS
=1.2V
(High to Low)
SW Q2 C1
Q1
R2 1K
C2
C3
Model No.: N201J4 - L01
Approval
3.1 TFT LCD MODULE
Parameter Symbol
Power Supply Voltage Vcc 4.5 5.0 5.5 V ­Permissive Ripple Voltage VRP 100 mV ­Rush Current I Initial Stage Current IIS 1.0 A (2)
Power Supply Current
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V LVDS Common Mode Voltage VCM 1.125 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 600 mV (5) Terminating Resistor RT 100 Ohm Power per EBL WG P
Note (1) The ambient temperature is Ta = 25 ± 2 ºC. Note (2) I
IIS: the maximum current of the first 100ms after power-on Measurement Conditions: Shown as the following figure. Test pattern: black.
: the maximum current when VCC is rising
RUSH
www.jxlcd.com
www.jxlcd.com
(Control Signal)
+12V
1uF
White 480 mA (3)a Black
+5.0V
R1
47K
47K
VR1
0.01uF
RUSH
Icc
TH(LVDS)
TL(LVDS)
- 7.54 - W (4)
EBL
2SK1475
2SK1470
Min. Typ. Max.
1.5 A (2)
760 mA (3)b +100 mV
-100 mV
Value
FUSE
Unit Note
Vcc
(LCD Module Input)
1uF
(5),
V
CM
(5)
V
=1.2V
CM
0V
I
RUSH
470us
Vcc rising time is 470us
+5.0V
0.9Vcc
100ms
0.1Vcc
VCC
IIS
ICC
7 / 30
Version 2.0
Page 8
Doc. No.:
14074327
0V VCM
|VID|
0V |VID|
V V
Model No.: N201J4 - L01
Note (3) The specified power supply current is under the conditions at Vcc = 5.0 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
Approval
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
a. White Pattern
Active Area
power. Test conditions are as follows. (a) Vcc = 5.0 V, Ta = 25 ± 2 ºC, fv = 60 Hz, (b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt. (c) Luminance: 60 nits. (d) The inverter used is provided from __________. Please contact them for detail information.
www.jxlcd.com
www.jxlcd.com
CMO doesn’t provide the inverter in this product.
b. Black Pattern
Active Area
Note (5) The parameters of LVDS signals are defined as the following figures.
Single Ended
Differential
8 / 30
Version 2.0
Page 9
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
3.2 BACKLIGHT UNIT
Parameter Symbol Lamp Input Voltage VL 670 750 830 V
Lamp Current IL 3.0 7.5 8.0 mA Lamp Turn On Voltage
Operating Frequency FL 50 Lamp Life Time LBL 15,000 Power Consumption PL
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second
after startup. Otherwise, the lamp may not be turned on normally.
VS
Min. Typ. Max.
 
Value
1250 (25
1400 (0
 
11.25
o
C) V
o
C) V
80 KHz (3)
Ta = 25 ± 2 ºC
Unit Note
IL = 7.5 mA
RMS
RMS
(2)
RMS
(2)
RMS
Hrs (5)
W (4), I
L
(1)
= 7.5 mA
(a)
www.jxlcd.com
www.jxlcd.com
(b) Instrument : NF AS-129
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp frequency should be detached from the horizontal synchronous frequency and its harmonics as far as possible.
Note (4) PL = IL VL x2
9 / 30
Version 2.0
Page 10
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the condition Ta = 25 2 oC and IL = 7.5 mArms until one of the following events occurs:
(a) When the brightness becomes or lower than 50% of its original value. (b) When the effective ignition length becomes or lower than 80% of its original value.
(The effective ignition length is a scope that luminance is over 70% of that at the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight, such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for the lamp. All the parameters of an inverter should be carefully designed to avoid generating too much current leakage from high voltage output of the inverter. When designing or ordering the inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module should be operated in the same manners when it is installed in your instrument.
www.jxlcd.com
www.jxlcd.com
10 / 30
Version 2.0
Page 11
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
The output of the inverter must have symmetrical (negative and positive) voltage waveform and symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter, which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal synchronous frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its leakage current. a. The asymmetry rate of the inverter waveform should be 10% below; b. The distortion rate of the waveform should be within 2 ± 10%; c. The ideal sine wave form shall be symmetric in positive and negative polarities.
* Asymmetry rate:
I p
I
-p
www.jxlcd.com
www.jxlcd.com
| I p – I –p | / I
* Distortion rate I p (or I –p) / I
rms
rms
* 100%
11 / 30
Version 2.0
Page 12
Doc. No.:
14074327
4. BLOCK DIAGRAM
SCAN DRIVER IC
LVDS INPUT /
DC/DC CONVERTER &
EDID
EEPROM
4.1 TFT LCD MODULE
Display
Data
Vcc
GND
Data
CLK
V
EDID
EDID
EDID
INPUT CONNECTOR
VL
LAMP CONNECTOR
TIMING CONTROLLER
REFERENCE VOLTAGE
GENERATOR
Model No.: N201J4 - L01
Approval
TFT LCD PANEL
DATA DRIVER IC
BACKLIGHT UNIT
4.2 BACKLIGHT UNIT
www.jxlcd.com
www.jxlcd.com
12 / 30
Version 2.0
Page 13
Doc. No.:
14074327
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin # Symbol Function
1 GND Ground
2 GND Ground
3 AVDD Analog Power Supply
4 AVDD Analog Power Supply 5 AVDD Analog Power Supply
6 DVDD Digital Power Supply 7 DVDD Digital Power Supply 8 DDC_SCL Two wire serial interface clock
9 DDC_SDA Two wire serial interface data 10 RXinO0- - LVDS differential data input, Chan 0-Odd 11 RXinO0+ + LVDS differential data input, Chan 0-Odd 12 HGND Ground 13 RXinO1- - LVDS differential data input, Chan 1-Odd 14 RXinO1+ + LVDS differential data input, Chan 1-Odd 15 HGND Ground 16 RXinO2- - LVDS differential data input, Chan 2-Odd 17 RXinO2+ + LVDS differential data input, Chan 2-Odd 18 HGND Ground 19 RXCLKO- - LVDS Differential Clock input (Odd) 20 RXCLKO+ + LVDS Differential Clock input (Odd) 21 HGND Ground 22 RXinO3- - LVDS differential data input, Chan 3-Odd 23 RXinO3+ + LVDS differential data input, Chan 3-Odd 24 HGND Ground 25 RXinE0- - LVDS differential data input, Chan 0-Even 26 RXinE0+ + LVDS differential data input, Chan 0-Even 27 HGND Ground 28 RXinE1- - LVDS differential data input, Chan 1-Even 29 RXinE1+ + LVDS differential data input, Chan 1-Even 30 HGND Ground 31 RXinE2- - LVDS differential data input, Chan 2-Even 32 RXinE2+ + LVDS differential data input, Chan 2-Even 33 HGND Ground 34 RXCLKE- - LVDS Differential Clock input (Even) 35 RXCLKE+ + LVDS Differential Clock input (Even) 36 HGND Ground 37 RXinE3- - LVDS differential data input, Chan 3-Even 38 RXinE3+ + LVDS differential data input, Chan 3-Even 39 HGND Ground 40 NC No Connection
www.jxlcd.com
www.jxlcd.com
Model No.: N201J4 - L01
Approval
13 / 30
Version 2.0
Page 14
Doc. No.:
14074327
Model No.: N201J4 - L01
Note (1) Connector Part No: JAE-FI-NXB40SL-HF10 or equivalent
Note (2) User’s connector Part No: JAE-FI-NX40CL-SH02-4 + FI-NX40CL-4 or equivalent Note (3) The first pixel is odd as shown in the following figure.
Approval
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink 2 LV Ground Black 1 HV High Voltage White 2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent. Note (2) User’s connector Part No: JST-SM02B-BHSS-1-TB or equivalent.
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
LVDS Channel E0
LVDS Channel E1
LVDS Channel E2
LVDS Channel E3
LVDS Channel O0
LVDS Channel O1
LVDS Channel O2
LVDS Channel O3
www.jxlcd.com
www.jxlcd.com
LVDS output D7 D6 D4 D3 D2 D1 D0 Data order EG0 ER5 ER4 ER3 ER2 ER1 ER0 LVDS output D18 D15 D14 D13 D12 D9 D8 Data order EB1 EB0 EG5 EG4 EG3 EG2 EG1 LVDS output D26 D25 D24 D22 D21 D20 D19 Data order DE NA NA EB5 EB4 EB3 EB2 LVDS output D23 D17 D16 D11 D10 D5 D27 Data order NA EB7 EB6 EG7 EG6 ER7 ER6 LVDS output D7 D6 D4 D3 D2 D1 D0 Data order OG0 OR5 OR4 OR3 OR2 OR1 OR0 LVDS output D18 D15 D14 D13 D12 D9 D8 Data order OB1 OB0 OG5 OG4 OG3 OG2 OG1 LVDS output D26 D25 D24 D22 D21 D20 D19 Data order DE NA NA OB5 OB4 OB3 OB2 LVDS output D23 D17 D16 D11 D10 D5 D27 Data order NA OB7 OB6 OG7 OG6 OR7 OR6
14 / 30
Version 2.0
Page 15
Doc. No.:
14074327
0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0 1 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1
: :
0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 0 1 0 : : 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0
: :
0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 0 1 0 : : 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0
: :
0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 0 1 0 : : 1 0 1
Model No.: N201J4 - L01
Approval
5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color. The higher the binary input, the brighter the color. The table below provides the assignment of color versus data input.
Data Signal
Basic
Colors
Gray
Scale
Of
Red
Color
R7 R6 R5 R4 R3 R2 R1 R0 R7 R6 G5 G4 G3 G2 G1 G0 R7 R6 B5 B4 B3 B2 B1 B0
Black
Red
Green
Blue
Cyan
Magenta
Yellow
White
Red(0) / Dark
Red(1) Red(2)
Red(253) Red(254) Red(255)
Red Green Blue
Green(0) / Dark
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Green(1) Green(2)
www.jxlcd.com
Green(253)
www.jxlcd.com
Green(254) Green(255)
Blue(0) / Dark
Blue(1) Blue(2)
Blue(253) Blue(254) Blue(255)
15 / 30
Version 2.0
Page 16
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the VESA Plug & Display and FPDI standards.
Byte
(hex)
0 Header 1 Header 2 Header 3 Header 4 Header 5 Header 6 Header 7 Header 8 EISA ID manufacturer name (“CMO”)
9 EISA ID manufacturer name (Compressed ASCII) 0A ID product code (N201J4-L01) 00 0B ID product code (hex LSB first; N201J4-L01) 20
0C ID S/N (fixed “0”) 0D ID S/N (fixed “0”) 0E ID S/N (fixed “0”) 0F ID S/N (fixed “0”)
10 Week of manufacture (fixed “00H”) 11 Year of manufacture (fixed “00H”) 12 EDID structure version # (“1”) 13 EDID revision # (“3”)
14 Video I/P definition (“digital”) 15 Max H image size (“44cm”) 16 Max V image size (“28cm”)
17 Display Gamma (Gamma = ”2.2”) 18 Feature support (“Active off, RGB Color”)
19 Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0)
1A Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0) 1B Red-x (Rx = “0.660”) 1C Red-y (Ry = “0.335”) 1D Green-x (Gx = ”0.209”) 1E Green-y (Gy = ”0.679”) 1F Blue-x (Bx = ”0.143”)10
20 Blue-y (By = ”0.099”)01 21 White-x (Wx = ”0.313”) 22 White-y (Wy = ”0.329”)
www.jxlcd.com
www.jxlcd.com
Field Name and Comments
Value Value
(hex) (binary)
00 00000000 FF 11111111 FF 11111111 FF 11111111 FF 11111111 FF 11111111 FF 11111111
00 00000000 0D 00001101 AF 10101111
00000000
00100000 00 00000000 00 00000000 00 00000000 00 00000000 09 00001001 10 00010000 01 00000001 03 00000011
80 10000000
2C 00101100 1C 00011100
78 01111000
0A 00001010 3B 00111011
95 10010101
A9 10101001
55 01010101 35 00110101
AD 10101101
24 00100100 19 00011001 50 01010000 54 01010100
23 Established timings 1
24 Established timings 2
25 Manufacturer’s reserved timings
16 / 30
00 00000000
00 00000000
00 00000000
Version 2.0
Page 17
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
26 Standard timing ID # 1 27 Standard timing ID # 1 28 Standard timing ID # 2
29 Standard timing ID # 2 2A Standard timing ID # 3 2B Standard timing ID # 3 2C Standard timing ID # 4 2D Standard timing ID # 4 2E Standard timing ID # 5 2F Standard timing ID # 5
30 Standard timing ID # 6
31 Standard timing ID # 6
32 Standard timing ID # 7
33 Standard timing ID # 7
34 Standard timing ID # 8
35 Standard timing ID # 8
Detailed timing description # 1 Pixel clock (“154MHz”, According
36
to VESA CVT Rev1.1) 37 # 1 Pixel clock (hex LSB first) 38 # 1 H active (“1920”) 39 # 1 H blank (“160”)
3A # 1 H active : H blank (“1920 : 160”) 3B # 1 V active (”1200”) 3C # 1 V blank (”35”) 3D # 1 V active : V blank (”1200 : 35”) 3E # 1 H sync offset (”48”) 3F # 1 H sync pulse width ("32”)
40 # 1 V sync offset : V sync pulse width (”3 : 6”)
41 42 # 1 H image size (”434 mm”) 43 # 1 V image size (”271 mm”) 44 # 1 H image size : V image size (”434 : 271”) 45 # 1 H boarder (”0”) 46 # 1 V boarder (”0”)
47 48 Detailed timing description # 2 49 # 2 Flag
4A # 2 Reserved
4B 4C # 2 Flag 4D # 2 1st character of name (“N”) 4E # 2 2nd character of name (“2”) 4F # 2 3rd character of name (“0”)
50 # 2 4th character of name (“1”) 51 # 2 5th character of name (“J”) 52 # 2 6th character of name (“4”)
www.jxlcd.com
www.jxlcd.com
# 1 H sync offset : H sync pulse width : V sync offset : V sync
width (”48: 32 : 3 : 6”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
Negatives
# 2 FE (hex) defines ASCII string (Model Name “N201J4-L01”,
ASCII)
01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001 01 00000001
28 00101000
3C 00111100
80 10000000
A0 10100000
70 01110000
B0 10110000
23 00100011 40 01000000 30 00110000 20 00100000 36 00110110
00 00000000
B2 10110010 0F 00001111
11 00010001 00 00000000 00 00000000
18 00011000 00 00000000
00 00000000 00 00000000
FE 11111110
00 00000000
4E 01001110
32 00110010 30 00110000 31 00110001
4A 01001010
34 00110100
17 / 30
Version 2.0
Page 18
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
53 # 2 7th character of name (“-”) 54 # 2 8th character of name (“L”) 55 # 2 9th character of name (“0”) 56 # 2 9th character of name (“1”) 57 # 2 New line character indicates end of ASCII string 58 # 2 Padding with “Blank” character 59 # 2 Padding with “Blank” character
5A Detailed timing description # 3 5B # 3 Flag 5C # 3 Reserved 5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII) 5E # 3 Flag
5F # 3 1st character of string (“C”)
60 # 3 2nd character of string (“M”) 61 # 3 3rd character of string (“O”) 62 # 3 New line character indicates end of ASCII string 63 # 3 Padding with “Blank” character
64 # 3 Padding with “Blank” character 65 # 3 Padding with “Blank” character 66 # 3 Padding with “Blank” character 67 # 3 Padding with “Blank” character 68 # 3 Padding with “Blank” character 69 # 3 Padding with “Blank” character
6A # 3 Padding with “Blank” character 6B # 3 Padding with “Blank” character
6C Detailed timing description # 4 6D # 4 Flag 6E # 4 Reserved
6F
70 # 4 Flag 71 # 4 1st character of name (“N”) 4E 72 # 4 2nd character of name (“2”) 32 73 # 4 3rd character of name (“0”) 30 74 # 4 4th character of name (“1”) 31 75 # 4 5th character of name (“J”) 4A 76 # 4 6th character of name (“4”) 34 77 # 4 7th character of name (“-”) 2D 78 # 4 8th character of name (“L”) 4C 79 # 4 9th character of name (“0”)
7A # 4 9th character of name (“1”) 7B # 4 New line character indicates end of ASCII string
www.jxlcd.com
www.jxlcd.com
# 4 FE (hex) defines ASCII string (Model Name“N201J4-L01”,
ASCII)
2D 00101101 4C 01001100
30 00110000 31 00110001
0A 00001010
20 00100000 20 00100000
00 00000000 00 00000000 00 00000000
FE 11111110
00 00000000 43 01000011
4D 01001101
4F 01001111 0A 00001010
20 00100000 20 00100000
20 00100000 20 00100000 20 00100000 20 00100000 20 00100000 20 00100000
20 00100000 00 00000000
00 00000000 00 00000000
FE 11111110
00 00000000
30 00110000 31 00110001
0A 00001010
01001110 00110010 00110000 00110001 01001010 00110100 00101101 01001100
18 / 30
Version 2.0
Page 19
Doc. No.:
14074327
TVD
Model No.: N201J4 - L01
Approval
7C # 4 Padding with “Blank” character 7D # 4 Padding with “Blank” character
7E Extension flag 7F Checksum
20 00100000 20 00100000 00 00000000
A2 10100010
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max.
DCLK Frequency 1/Tc 50 77.1 82.5 MHz (2)
Vertical Total Time TV 1205 1235 1500
Vertical Active Display Period TVD 1200 1200 1200
DE
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored. (2) 2 channels LVDS input.
Vertical Active Blanking Period TVB TV-TVD 35 TV-TVD TH
Horizontal Total Time TH 1020 1040 1200
Horizontal Active Display Period THD 960 960 960 Tc (2)
Horizontal Active Blanking Period THB
TH-THD
80
TH-THD
Unit Note
TH ­TH -
Tc (2)
Tc (2)
INPUT SIGNAL TIMING DIAGRAM
www.jxlcd.com
DCLK
www.jxlcd.com
DE
TC
DE
DATA
THD
19 / 30
Version 2.0
Page 20
Doc. No.:
14074327
6.2 POWER ON/OFF SEQUENCE
Power Supply
-
Power for Lamp
Power On
Power Off
Model No.: N201J4 - L01
Approval
Restart
for LCD, Vcc
- LVDS Interface
Timing Specifications:
0.5 t1 10 ms 0 t2 50 ms 0 t3 50 ms
www.jxlcd.com
0V
0V
t4 500 ms t5 200 ms t6 200 ms
www.jxlcd.com
10%
90%
t1
OFF
50%
Valid Data
ON
90%
t6 t5
50%
t7
10%
t4
t3 t2
OFF
10%
Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be
damaged.
Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be
sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5t7300 ms.
20 / 30
Version 2.0
Page 21
Doc. No.:
14074327
Model No.: N201J4 - L01
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current IL 7.5 mA Inverter Driving Frequency FL 55 KHz Inverter NEC/Tokin D7318-B001-M1-F2
25±2
50±10
o
C
%RH
The relative measurement methods of optical characteristics are shown in 7.2. The following items should be measured under the test conditions described in 7.1 and stable environment shown in Note (6).
7.2 OPTICAL SPECIFICATIONS
Item Symbol
Red
Color Chromaticity
Center Luminance of White L Contrast Ratio CR 420 600
Response Time
White Variation
Viewing Angle
www.jxlcd.com
www.jxlcd.com
Green
Blue
White
Horizontal
Vertical
Rx Ry Gx Gy
Bx
By Wx Wy
230 270
AVG
TR TF
δW
θx+
θx-
θY+
-
θ
Y
Condition Min. Typ. Max. Unit Note
0.661
0.334
0.203
=0°, θY =0°
θ
x
Viewing Normal Angle
CR 10
Typ –
0.03
  
60 70 60 70 50 60 50 60
0.683
0.142
0.096
0.313
0.329
1.25 1.40
Typ +
0.03
cd/m
2 7 ms 8 13 ms
   
Deg.
Approval
(1), (6)
2
(4), (6) (2), (6)
(3)
(5)
(1)
21 / 30
Version 2.0
Page 22
Doc. No.:
14074327
Note (1) Definition of Viewing Angle (θx, θy):
T
ime
66.67 ms
66.67 ms
Model No.: N201J4 - L01
Approval
Note (2) Definition of Contrast Ratio (CR):
θX- = 90º
6 o’clock
θy- = 90º
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
x-
y-
Normal
θx = θy = 0º
θy- θy+
θx−
θx+
12 o’clock direction
y+
θy+ = 90º
x+
θX+ = 90º
L63: Luminance of gray level 63 L 0: Luminance of gray level 0
www.jxlcd.com
www.jxlcd.com
CR = CR (5) CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (5).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
, TF) and measurement method:
R
T
R
T
F
22 / 30
Version 2.0
Page 23
Doc. No.:
14074327
LCD
P
anel
Center of the
S
creen
W
1 2 3 4
W/4
W/2
3W/4X
Model No.: N201J4 - L01
Approval
Note (4) Definition of Center Luminance of White (L
Measure the luminance of gray level 63 at center points L
= L (5)
CEN
L (x) is corresponding to the luminance of the point X at Figure in Note (5)
Note (5) Definition of White Variation (δW):
Measure the luminance of gray level 63 at 5 points δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Vertical Line
D/4
):
CEN
Horizontal Line
D
D/2
5
3D/4
: Test Point
X=1 to 5
www.jxlcd.com
Note (6) Measurement Setup:
www.jxlcd.com
The LCD module should be stabilized at given temperature for (20) minutes to avoid abrupt temperature change during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight for (20) minutes in a windless room.
LCD Module
USB2000
Active Area
CS-1000T
Light Shield Room
23 / 30
(Ambient Luminance < 2 lux)
Version 2.0
Page 24
Doc. No.:
14074327
Model No.: N201J4 - L01
Approval
8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly. (2) To assemble or install module into user’s system can be only in clean working areas. The dust and oil
may cause electrical short or worsen the polarizer.
(3) It’s not permitted to have pressure or impulse on the module because the LCD panel and Backlight will
be damaged.
(4) Always follow the correct power sequence when LCD module is connecting and operating. This can
prevent damage to the CMOS LSI chips during latch-up. (5) Do not pull the I/F connector in or out while the module is operating. (6) Do not disassemble the module. (7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched. (8) It is dangerous that moisture come into or contacted the LCD module, because moisture may damage
LCD module when it is operating. (9) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions. (10) When ambient temperature is lower than 10ºC may reduce the display quality. For example, the
response time will become slowly, and the starting voltage of CCFL will be higher than room
temperature.
www.jxlcd.com
8.2 SAFETY PRECAUTIONS
(1) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit. (2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap. (3) After the module’s end of life, it is not harmful in case of normal operation and storage.
www.jxlcd.com
24 / 30
Version 2.0
Page 25
Doc. No.:
14074327
9. PACKING
9.1 CARTON
Model No.: N201J4 - L01
Approval
www.jxlcd.com
www.jxlcd.com
Figure. 9-1 Packing method
25 / 30
Version 2.0
Page 26
Doc. No.:
14074327
9.2 PALLET
Model No.: N201J4 - L01
Approval
www.jxlcd.com
www.jxlcd.com
Figure. 9-2 Packing method
26 / 30
Version 2.0
Page 27
Doc. No.:
14074327
N201J4
-
L01
Model No.: N201J4 - L01
Approval
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
LEOO
(a) Model Name: N201J4 - L01
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
(c) Serial ID: X X X X X X X Y M D X N N N N
Serial No. CMO Internal Use Year, Month, Date CMO Internal Use
Revision
CMO Internal Use
(d) Production Location: MADE IN XXXX. XXXX stands for production location.
(e)UL logo: LEOO especially stands for panel manufactured by CMO NingBo satisfying UL requirement.
www.jxlcd.com
The panel without LEOO mark stands for manufactured by CMO Taiwan satisfying UL requirement.
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
(b) Revision Code: cover all the change (c) Serial No.: Manufacturing sequence of product
HP CT label bar code definition:
 C: Consistent display module code AAAA: Consistent assembly code for this CMO model 00: Revision code, begin from “01” and so on when version updated DD: Production location code WW: production week XXX: serial numbers
www.jxlcd.com
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1st to 31st, exclude I , O and U
27 / 30
Version 2.0
Page 28
Doc. No.:
14074327
10.2 CARTON LABEL
(a) Production location: Made In XXXX. XXXX stands for production location.
Model No.: N201J4 - L01
Approval
www.jxlcd.com
www.jxlcd.com
28 / 30
Version 2.0
Page 29
www.jxlcd.com
www.jxlcd.com
Page 30
www.jxlcd.com
www.jxlcd.com
Loading...
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use