Page 1
Doc No.: 1406Z330
A
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
TFT LCD Preliminary Specification
MODEL NO.: N170C4 - L01
Customer :
pproved by :
Note :
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記錄 工作 審核 角色 投票
2007-06-15
10:03:01 CST
Approve by
Dept. Mgr.(QA
RA)
yuan_chan(趙俊淵/52760/54760)
Department
Manager(QA RA)
Accept
2007-06-14
08:59:34 CST
2007-06-08
17:16:54 CST
2007-06-08
14:41:32 CST
Approve by
Director
Approve by
Director
Approve by
Director
wy_li(李汪洋/44701)
kf_huang(黃崑峰
/56620/54380/14906/25075)
jy_wu(吳震乙/56360/54952)
Director Accept
Director Accept
Director Accept
1 / 30
Version 1.0
Page 2
- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATI NGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID CODE DATA STRUCTURE
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS
8.1 ASSEMBL Y AND HANDLING PRECAUTIONS
8.2 SAFETY PRECAUTIONS
9. PACKING
9.1 CARTON
9.2 PALLET
10. DEFINITION OF LABELS
10
.1 CMO MODULE LABEL
10.2 CMO CARTON LABEL
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Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
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Version 1.0
Page 3
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Version Date
Ver 1.0
Jun 07,2007 All
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Page
(New)
REVISION HISTORY
Section Description
All Preliminary Specification is first issued
3 / 30
Version 1.0
Page 4
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
1. GENERAL DESCRIPTION
1.1 OVERVIEW
N170C4 - L01 is a 17.0” TFT Liquid Crystal Display module with two CCFLs Backlight unit and 30 pins
LVDS interface. This module supports 1440 x 900 Wide-XGA+ mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and High Brightness
- WXGA+ (1440 x 900 pixels) resolution
- DE only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clo ck
- 2 CCFLs
1.3 APPLICA TION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 367.2 (H) x 229.5 (V) (17.0” diagonal) mm
Bezel Opening Area 370.7 (H) x 232.8 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1440 x R.G.B. x 900 pixel Pixel Pitch 0.255 (H) x 0.255 (V) mm Pixel Arrange ment RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treat ment Hard coating (3H), Glare Type - -
1.5 MECHANICAL SPECIFICATIONS
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
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Item Min. Typ. Max. Unit Note
Horizontal (H) 381.7 382.2 382.7 mm
Vertical (V) 247 247.5 248 mm
Depth (D) --- --- 7.0 mm
Weight --- 710 725 g -
(1)
(1)
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Version 1.0
Page 5
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient T emperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown below.
(a) 90 %RH Max. (Ta ≦ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max...
- 200/2 G/ms (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Min. Max.
Value
Unit Note
Relative Humidity (%RH)
100
90
80
60
40
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20
10
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (200G / 2ms) is half Sine Wave.
Operating Range
Storage Range
Temperature (ºC)
8060 -20 400 20-40
Note (4) 10 ~ 500 Hz, 0.5 Hr / Cycle, 1 cycles for each X, Y, Z axis.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
Version 1.0
Side Mount Fixing Screw
gap=2mm
Bracket
LCD Module
Side Mount Fixing Screw
Stage
5 / 30
Page 6
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply V oltage VCC -0.3 +4.0 V
Logic Input Voltage VIN -0.3 VCC+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL
Lamp Current IL
Lamp Frequency FL
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Co nditions.
Min. Max.
Min. Max.
－
－
－
Value
Value
Unit Note
Unit Note
2.5K V
(6.0) mA
80 KHz
(1), (2), IL = 6.0 mA
RMS
RMS
(1)
(1), (2)
Note (2) Specified values are for lamp (Refer to 3.2 for further information).
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Version 1.0
Page 7
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Power Supply V oltage Vcc 3.0 3.3 3.6 V Permissive Ripple Voltage VRP 100 mV Rush Current I
1.5 A (2)
RUSH
Initial Stage Current IIS 1.0 A (2)
Power Supply Current
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
White (450) (480) mA (3)a
Black
Icc
TH(LVDS)
TL(LVDS)
(570) (600) mA (3)b
+100 mV
-100 mV
LVDS Common Mode Voltage VCM 1.125 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 600 mV (5)
Terminating Resistor RT 100 Ohm
Power per EBL WG P
- (4.52) - W (4)
EBL
Note (1) The module should be always operated within above ranges.
Value
Unit Note
V
CM
V
CM
(5),
=1.2V
(5)
=1.2V
Note (2) I
I
: the maximum current when VCC is rising
RUSH
: the maximum current of the first 100ms after power-on
IS
Measurement Conditions: Shown as the following figure. Test pattern: black.
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(High to Low)
(Control Signal)
SW
+12V
C1
1uF
+3.3V
VR1
R1
47K
R2
1K
47K
Q1 2SK1475
FUSE
Q2
2SK1470
C2
0.01uF
Vcc rising time is 470us
C3
1uF
Vcc
(LCD Module Input)
470us
0.9Vcc
+3.3V
Vcc
100ms
0V
0.1Vcc
I
Rush
I
IS
Icc
7 / 30
Version 1.0
Page 8
Doc No.: 1406Z330
|
|
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
a. White Pattern
Active Area
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
(d) The inverter used is provided from Sumida. Please contact them for detail information. CMO
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doesn’t provide the inverter in this product.
= 60 Hz,
v
b. Black Pattern
Active Area
Note (5) The parameters of LVDS signals are defined as the following figures.
CM
Single Ended
Differential
V
0V
V
0V
V
VID|
VID|
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Version 1.0
Page 9
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Lamp Input Voltage VL (675) (750) (825) V
Lamp Current IL (2.0) (6.0) (6.5) mA
Lamp Turn On Voltage VS
Operating Frequency FL 50
Lamp Life Time LBL (12,000)
Power Consumption PL
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Min. Typ. Max.
－ －
－ －
－
Value
(1290) (25
(1560) (0
－
－ －
(9.0)
Unit Note
I
RMS
o
C) V
o
C) V
80 KHz (3)
－
RMS
(2)
RMS
(2)
RMS
Hrs (5)
W (4), IL = 6.0 mA
= 6.0 mA
L
(1)
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
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Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
Note (4) P
Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
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display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
= IL ×VL x2
L
= 25 ±2
(a) When the brightness becomes ≦ 50% of its original value.
(b) When the effective ignition length becomes ≦ 80% of its original value. (Effective ignition
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
o
C and IL = 6.0 mA
length is defined as an area that the brightness is less than 70% compared to the center point.)
until one of the following events occurs:
RMS
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
9 / 30
Version 1.0
Page 10
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
should be operated in the same manners when it is installed in your instrume nt.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
b. The distortion rate of the waveform should be within √2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
* Asymmetry rate:
I p
I -p
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| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
10 / 30
Version 1.0
Page 11
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
LVDSDisplay
Data & Clock
Vcc
GND
Data
CLK
V
EDID
VL
EDID
EDID
LVDS INPUT /
TIMING CONTROLLER
INPUT CONNECTOR
LAMP CONNECTOR
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
SCAN DRIVER IC
TFT LCD PANEL
DA TA DRIVER IC
BACKLIGHT UNIT
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4.2 BACKLIGHT UNIT
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Version 1.0
Page 12
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4 V
5 NC Non-Connection
6 CLK
7 DATA
8 RXO0- LVDS Differential Data Input (Odd) Negative
9 RXO0+ LVDS Differential Data Input (Odd) Positive
10 Vss Ground
11 RXO1- LVDS Differential Data Input (Odd) Negative
12 RXO1+ LVDS Differential Data Input (Odd) Positive
13 Vss Ground
14 RXO2- LVDS Differential Data Input (Odd) Negative
15 RXO2+ LVDS Differential Data Input (Odd) Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd) Negative
18 RXOC+ LVDS Clock Data Input (Odd) Positive
19 Vss Ground
20 RxE0- LVDS Differential Data Input (Even) Negative
21 RxE0+ LVDS Differential Data Input (Even) Positive
22 Vss Ground
23 RxE1- LVDS Differential Data Input (Even) Negative
24 RxE1+ LVDS Differential Data Input (Even) Positive
25 Vss Ground
26 RxE2- LVDS Differential Data Input (Even) Negative
27 RxE2+ LVDS Differential Data Input (Even) Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even) Negative
30 RXEC+ LVDS Clock Data Input (Even) Positive
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DDC 3.3V Power
EDID
DDC Clock
EDID
DDC Data
EDID
Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11 or equivalent
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent
Note (3) The first pixel is odd as shown in the following figure.
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Version 1.0
Page 13
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink
2 LV Ground Black
1 HV High Voltage White
2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
5.3 TIMING DIAGRAM OF LVDS IN PUT SIGNAL
RXOC+
RXO2+/-
RXO1+/-
RXO0+/-
RXEC+
RXE2+/-
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T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE OB5 OB4 OB3 OB2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
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OB1 OG4 OG3 OG2 OG1 OB0 OG5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
OG0 OR3 OR2 OR1 OR0 OR5 OR4
Signal for 1 DCLK Cycle (T)
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE EB5 EB4 EB3 EB2 Vsync Hsync
RXE1+/-
RXE0+/-
Version 1.0
IN13 IN12 IN11 IN10 IN9 IN8 IN7
EB1 EG4 EG3 EG2 EG1 EB0 EG5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
EG0 ER3 ER2 ER1 ER0 ER5 ER4
Signal for 1 DCLK Cycle (T)
13 / 30
Page 14
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Data Signal
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)
:
:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)
:
:
Green(61)
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Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)
:
:
Blue(61)
Blue(62)
Blue(63)
0
1
0
0
0
1
1
1
0
0
0
:
:
1
1
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
0
0
0
:
:
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
0
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
1
1
1
1
0
1
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
:
:
:
:
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
:
:
:
:
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
1
1
0
:
:
:
:
:
:
0
1
1
0
1
1
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Version 1.0
Page 15
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte
#(deci
mal)
10 9 EISA ID manufacturer name (Compressed ASCII)
11 0A ID product code (N170C4-L01) 06
12 0B ID product code (hex LSB first; N170C4-L01) 17
13 0C ID S/N (fixed “0”)
14 0D ID S/N (fixed “0”)
15 0E ID S/N (fixed “0”)
16 0F ID S/N (fixed “0”)
17 10 Week of manufacture (fixed week code)
18 11 Year of manufacture (fixed year code)
19 12 EDID structure version # (“1”)
20 13 EDID revision # (“3”)
21 14 Video I/P definition (“digital”)
22 15 Max H image size (“36.72 cm”)
23 16 Max V image size (“22.95 cm”)
24 17 Display Gamma (Gamma = ”2.2”)
25 18 Feature support (“Active off, RGB Color”)
26 19 Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0)
27 1A Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0)
28 1B Red-x (Rx = “0.648”)
29 1C Red-y (Ry = “0.347”)
30 1D Green-x (Gx = ”0.283”)
31 1E Green-y (Gy = ”0.611”)
32 1F Blue-x (Bx = ”0.141”)
33 20 Blue-y (By = ”0.071”)
34 21 White-x (Wx = ”0.319”)
35 22 White-y (Wy = ”0.333”)
Byte
#(hex)
1 0 Header
2 1 Header
3 2 Header
4 3 Header
5 4 Header
6 5 Header
7 6 Header
8 7 Header
9 8 EISA ID manufacturer name (“CMO”)
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Field Name and Comments
Value(
hex)
00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111
00 00000000
00 00000000
00 00000000
00 00000000
28 00101000
0C 00001100
01 00000001
03 00000011
80 10000000
25 00100101
17 00010111
78 01111000
0A 00001010
FA 11111010
1D 00011101
A5 10100101
58 01011000
48 01001000
9C 10011100
24 00100100
12 00010010
51 01010001
55 01010101
Value(binary
)
00000110
00010111
36 23 Established timings 1
37 24 Established timings 2
38 25 Manufacturer’s reserved timings
39 26 Standard timing ID # 1
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Version 1.0
00 00000000
00 00000000
00 00000000
01 00000001
Page 16
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
40 27 Standard timing ID # 1
41 28 Standard timing ID # 2
42 29 Standard timing ID # 2
43 2A Standard timing ID # 3
44 2B Standard timing ID # 3
45 2C Standard timing ID # 4
46 2D Standard timing ID # 4
47 2E Standard timing ID # 5
48 2F Standard timing ID # 5
49 30 Standard timing ID # 6
50 31 Standard timing ID # 6
51 32 Standard timing ID # 7
52 33 Standard timing ID # 7
53 34 Standard timing ID # 8
54 35 Standard timing ID # 8
55 36 Detailed timing description # 1 Pixel clock (“88.75 MHz”)
56 37 # 1 Pixel clock (hex LSB first)
57 38 # 1 H active (“1440”)
58 39 # 1 H blank (“160”)
59 3A # 1 H active : H blank (“1440 : 160”)
60 3B # 1 V active (”900”)
61 3C # 1 V blank (”26”)
62 3D # 1 V active : V blank (”900 : 26”)
63 3E # 1 H sync offset (”48”)
64 3F # 1 H sync pulse width (”32”)
65 40 # 1 V sync offset : V sync pulse width (”3 : 6”)
# 1 H sync offset : H sync pulse width : V sync of fset : V sync width (”48 : 32 :
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66 41
67 42 # 1 H image size (”367 mm”)
68 43 # 1 V image size (”230 mm”)
69 44 # 1 H image size : V image size (”367 : 230”)
70 45 # 1 H boarder (”0”)
71 46 # 1 V boarder (”0”)
72 47 # 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol Negatives
73 48 Detailed timing description # 2
74 49 # 2 Flag
75 4A # 2 Reserved
76 4B # 2 FE (hex) defines ASCII string (Model Name “N170C4-L01”, ASCII)
77 4C # 2 Flag
78 4D # 2 1st character of name (“N”)
79 4E # 2 2nd character of name (“1”)
80 4F # 2 3rd character of name (“7”)
81 50 # 2 4th character of name (“0”)
82 51 # 2 5th character of name (“C”)
83 52 # 2 6th character of name (“4”)
84 53 # 2 7th character of name (“-”)
85 54 # 2 8th character of name (“L”)
86 55 # 2 9th character of name (“0”)
87 56 # 2 10th character of name (“1”)
88 57 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
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3 : 6”)
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
AB 10101011
22 00100010
A0 10100000
A0 10100000
50 01010000
84 10000100
1A 00011010
30 00110000
30 00110000
20 00100000
36 00110110
00 00000000
6F 01101111
E6 11100110
10 00010000
00 00000000
00 00000000
18 00011000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
4E 01001110
31 00110001
37 00110111
30 00110000
43 01000011
34 00110100
2D 00101101
4C 01001100
30 00110000
31 00110001
0A 00001010
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Version 1.0
Page 17
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
89 58 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
90 59 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
91 5A Detailed timing description # 3
92 5B # 3 Flag
93 5C # 3 Reserved
94 5D # 3 FE (hex) defines ASCII string (V endor “CMO”, ASCII)
95 5E # 3 Flag
96 5F # 3 1st character of string (“C”)
97 60 # 3 2nd character of string (“M”)
98 61 # 3 3rd character of string (“O”)
99 62 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
100 63 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
101 64 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
102 65 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
103 66 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
104 67 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
105 68 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
106 69 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
107 6A (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
108 6B (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
109 6C Detailed timing description # 4
110 6D # 4 Flag
111 6E # 4 Reserved
112 6F # 4 FE (hex) defines ASCII string (Model Name“N170C4-L01”, ASCII)
113 70 # 4 Flag
114 71 # 4 1st character of name (“N”) 4E
115 72 # 4 2nd character of name (“1”) 31
116 73 # 4 3rd character of name (“7”) 37
117 74 # 4 4th character of name (“0”) 30
118 75 # 4 5th character of name (“C”) 43
119 76 # 4 6th character of name (“4”) 34
120 77 # 4 7th character of name (“-”) 2D
121 78 # 4 8th character of name (“L”) 4C
122 79 # 4 9th character of name (“0”)
123 7A # 4 10th character of name (“1”)
124 7B (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
125 7C (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
126 7D (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
127 7E Extension flag
128 7F Checksum A0 10100000
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20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
43 01000011
4D 01001101
4F 01001111
0A 00001010
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
01001110
00110001
00110111
00110000
01000011
00110100
00101101
01001100
30 00110000
31 00110001
0A 00001010
20 00100000
20 00100000
00 00000000
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Version 1.0
Page 18
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 42 44.5 52 MHz (2)
Vertical Total Time TV 910 926 980 TH -
Vertical Active Display Period TVD 900 900 900 TH -
DE
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.
(2) 2 channels LVDS input.
Vertical Active Blanking Period TVB TV-TVD 26 TV-TVD TH
Horizontal Total Time TH 760 800 880 Tc (2)
Horizontal Active Display Period THD 720 720 720 Tc (2)
Horizontal Active Blanking Period THB
TH-THD
80
TH-THD
Tc (2)
DE
DCLK
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DE
DATA
6.2 POWER ON/OFF SEQUENCE
Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of
Transmitter), V
- Power for Lamp
0V
0V
I
10%
INPUT SIGNAL TIMING DIAGRAM
TC
Power On
90%
t1
Valid Data
ONOFF OFF
T
Power Off
90%
t3 t2
t6 t5
50%50%
HD
t7
Restart
10%
t4
10%
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Version 1.0
Page 19
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Timing Specifications:
0.5 ≦ t1 ≦ 10 ms
0 ≦ t2 ≦ 50 ms
0 ≦ t3 ≦ 50 ms
t4 ≧ 500 ms
t5 ≧ 200 ms
t6 ≧ 200 ms
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5≦t7≦300 ms.
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Page 20
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
Supply Volt age VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL (6.0) mA
Inverter Driving Frequency FL (61) KHz
Inverter ( Darfon VK.12164.101)
25±2
50±10
The relative measurement methods of optical characteristics are shown in 7.2. The
following items should be measured under the test conditions described in 7.1 and stable
environment shown in Note (6).
7.2 OPTICAL SPECIFICATIONS
o
C
%RH
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR (450) (600) - - (2), (5)
Response Time
Central Luminance of White LC (240) (300) cd/m2(4), (5)
White Variation
Red
Color
Chromaticity
Viewing Angle
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Green
Blue
White
Horizontal
Vertical
TR - (3) (8) ms
- (7) (12) ms
T
F
5pts - - (1.40) - (5), (6)
δW
Rx
Ry
Gx
Gy
Bx
By
Wx
Wy
θ
+
x
θ
x
θ
Y
θ
Y
+
=0°, θY =0°
θ
x
Viewing Normal
Angle
TYP
-0.03
(60) (70) -
-
-
CR≥10
(60) (70) (50) (60) (50) (60) -
(0.643)
(0.349)
(0.281)
(0.609)
(0.142)
(0.068)
0.313
0.329
TYP
+0.03
Deg.
(3)
-
-
-
-
-
-
-
-
(1)
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Page 21
Note (1) Definition of Viewing Angle (θx, θy):
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Note (2) Definition of Contrast Ratio (CR):
θX- = 90º
6 o’clock
θ
y- = 90º
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
x-
y-
Normal
θx = θy = 0º
θy- θy+
θx−
θx+
12 o’clock direction
y+
θ
y+ = 90º
x+
θX+ = 90º
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
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CR = CR (5)
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CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (5).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
T
R
66.67 ms
, TF) and measurement method:
R
T
F
66.67 ms
Time
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Doc No.: 1406Z330
500
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6).
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 15 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 15 minutes in a windless room.
LCD Module
LCD Panel
USB2000
):
AVE
CS-1000T
Center of the Screen
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Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 63 at 5 points
= Maximum [L (1) ~ L (5)] / Minimum [L (1) ~ L (5)]
δW
5p
Vertical Line
W
W/4
W/2
3W/4
mm
Light Shield Room
(Ambient Luminance < 2 lux)
Horizontal Line
D
D/4 D/2 3D/4
12
5
3
4
X
: Test Point
X=1 to 5
Active Area
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Version 1.0
Page 23
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
8. PRECAUTIONS
8.1 ASSEMBL Y AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) To assemble or install module into user’s system can be only in clean working areas. The dust and oil
may cause electrical short or worsen the polarizer.
(3) It’s not permitted to have pressure or impulse on the module because the LCD panel and Backlight will
be damaged.
(4) Always follow the correct power sequence when LCD module is connecting and operating. This can
prevent damage to the CMOS LSI chips during latch-up.
(5) Do not pull the I/F connector in or out while the module is operating.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) It is dangerous that moisture come into or contacted the LCD module, because moisture may damage
LCD module when it is operating.
(9) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(10) When ambient temperature is lower than 10ºC may reduce the display quality. For example, the
response time will become slowly, and the starting voltage of CCFL will be higher than room
temperature.
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8.2 SAFETY PRECAUTIONS
(1) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disa ssemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washe d away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
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Page 24
9. PACKING
9.1 CARTON
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
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Figure. 9-1 Packing method
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Page 25
9.2 PALLET FOR SEA FREIGHT
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
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Figure. 9-2 Packing method
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Version 1.0
Page 26
9.3 PALLET FOR AIR FREIGHT
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
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Figure. 9-3 Packing method
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Version 1.0
Page 27
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
E207943
MADE IN TAIWAN
LEOO
01A
N141X5 - L03 Rev.XX
X X X X X X X Y M D L N N N N
-
C P 1 3 5 4 4 8 - 0 1
(a) Model Name: N170C4 - L01
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
(c) Serial ID: X X
(d) Production Location: MADE IN XXXX. XXXX stands for production location.
(e) UL logo: LEOO especially stands for panel manufactured by CMO NingBo satisfying UL requirement.
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The panel without LEOO mark stands for manufactured by CMO Taiwan satisfying UL requirement.
X X X X X Y M D X N N N N
Serial No.
CMO Internal Use
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
Month: 1~9, A~C, for Jan. ~ De c.
Day: 1~9, A~Y, for 1
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
st
to 31st, exclude I, O and U
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10.2 CARTON LABEL
Doc No.: 1406Z330
Issued Date: Jun. 07, 2007
Model No.: N170C4 - L01
Preliminary
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