Datasheet N-154I3-L02 Datasheet (Chi Mei Optoelectronics)

Page 1
Doc No.:
A
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
MODEL NO.: N154I3-L02
Customer :
pproved by :
Note :
www.jxlcd.com
www.jxlcd.com
記錄 工作 審核 角色 投票
2007-06-21 16:16:01 CST
2007-06-12 14:31:04 CST
2007-05-31 10:53:34 CST
2007-05-29 11:36:42 CST
Version 0.0
Approve by Dept. Mgr.(QA RA)
Approve by Director
Approve by Director
Approve by Director
yuan_chan(趙俊淵 /52760/54760)
jy_wu(吳震乙 /56360/54952)
ck_wei(韋忠光 /44700)
davis_wang(王銘典 /56600/54383)
1 / 30
Department Manager(QA RA)
Director Accept
Director Accept
Director Accept
Accept
Page 2
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID DATA STRUCTURE
5.6 EDID SIGNAL SPECIFICATION
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
8.2 STORAGE PRECAUTIONS
8.3 OPERATION PRECAUTIONS
9. PACKING ------------------------------------------------------- 25
9.1 CARTON
9.2 PALLET
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
10.2 CARTON LABEL
www.jxlcd.com
www.jxlcd.com
------------------------------------------------------- 3
------------------------------------------------------- 4
------------------------------------------------------- 5
------------------------------------------------------- 7
------------------------------------------------------- 11
------------------------------------------------------- 12
------------------------------------------------------- 18
------------------------------------------------------- 20
------------------------------------------------------- 24
------------------------------------------------------- 28
2 / 30
Version 0.0
Page 3
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
Version Date
Ver 0.0 May.28, 2007
www.jxlcd.com
www.jxlcd.com
Page
(New)
Section Description
All All
REVISION HISTORY
Tentative specification first issued.
3 / 30
Version 0.0
Page 4
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
1. GENERAL DESCRIPTION
1.1 OVERVIEW
N154I3-L02 is a 15.4” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins
LVDS interface. This module supports 1280 x 800 Wide-XGA mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and light weight
- WXGA (1280 x 800 pixels) resolution
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
1.3 APPLICATION
- TFT LCD Notebook
Tentative
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note Active Area 331.2 (H) x 207.0 (V) (15.4” diagonal) mm Bezel Opening Area 334.7 (H) x 210.5 (V) mm Driver Element a-si TFT active matrix - ­Pixel Number 1280 x R.G.B. x 800 pixel ­Pixel Pitch 0.2588 (H) x 0.2588 (V) mm ­Pixel Arrangement RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), Anti-glare - -
1.5 MECHANICAL SPECIFICATIONS
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
www.jxlcd.com
www.jxlcd.com
Item Min. Typ. Max. Unit Note
Horizontal(H) 343.5 344.0 344.5 mm Vertical(V) 221.5 222.0 222.5 mm Thickness(T) - 6.0 6.2 mm
Weight - 510 530 g -
(1)
(1)
4 / 30
Version 0.0
Page 5
Doc No.:
A
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) S Vibration (Non-Operating) V
Note (1) (a) 90 %RH Max. (Ta <= 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel surface should be 0 ºC min. and 50 ºC max.
Relative Humidity (%RH)
- 220/2 G/ms (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Min. Max.
Value
Unit Note
100
90 80
60
40
www.jxlcd.com
www.jxlcd.com
20 10
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave,.
Note (4) 10~500 Hz, 0.5hr/cycle 1cycle for X,Y,Z
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid
Operating Range
Storage Range
80 60 -20 400 20-40
Temperature (ºC)
enough so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
Version 0.0
Bracket
5 / 30
LCD Module
Side Mount Fixing Screw
Stage
Page 6
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 +4.0 V Logic Input Voltage VIN -0.3 Vcc+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V Lamp Current IL - 6.5 mA Lamp Frequency FL - 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).
Min. Max.
Min. Max.
Value
Value
Unit Note
(1)
Unit Note
(1), (2), IL = 6.0 mA
RMS
RMS
(1), (2)
www.jxlcd.com
www.jxlcd.com
6 / 30
Version 0.0
Page 7
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max. Power Supply Voltage Vcc 3.0 3.3 3.6 V ­Ripple Voltage VRP - - mV ­Rush Current I
- - TBD A (2)
RUSH
Initial Stage Current IIS - - 1.0 A (2)
Power Supply Current
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
White - (320) mA (3)a Black
lcc
TH(LVDS)
-100 - - mV
TL(LVDS)
- (380) mA (3)b
- - +100 mV
LVDS Common Mode Voltage VCM 1.125 - 1.375 V (5) LVDS Differential Input Voltage |VID| 100 - 600 mV (5) Terminating Resistor RT - 100 - Ohm -
Power per EBL WG P
- TBD - W (4)
EBL
Note (1) The ambient temperature is Ta = 25 ± 2 ºC.
Value
Unit Note
V
CM
V
CM
(5),
=1.2V
(5)
=1.2V
Note (2) I
Measurement Conditions: Shown as the following figure. Test pattern: black.
: the maximum current when VCC is rising
RUSH
I
: the maximum current of the first 100ms after power-on
IS
+3.3V
R1
47K
VR1
R2
1K
47K
www.jxlcd.com
www.jxlcd.com
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
Q1 2SK1475
C2
0.01uF
Q2
2SK1470
FUSE
C3 1uF
Vcc rising time is 470us
+3.3V
VCC
Vcc
(LCD Module Input)
0V
470us
0.1Vcc
I
RUSH
100ms
I
IS
ICC
7 / 30
Version 0.0
Page 8
Doc No.:
|
|
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, DC
Current and f
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
a. White Pattern
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
= 60 Hz, whereas a power dissipation check pattern below is displayed.
v
b. Black Pattern
Active Area
= 60 Hz,
v
Active Area
(c) Luminance: 60 nits.
(d) The inverter used is provided from Sumida
www.jxlcd.com
Note (5) The parameters of LVDS signals are defined as the following figures.
Single Ended
www.jxlcd.com
CM
V
0V
Differential
V
0V
V
.
VID|
VID|
8 / 30
Version 0.0
Page 9
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Lamp Input Voltage VL 630 700 770 V
Lamp Current IL
Lamp Turn On Voltage VS
Operating Frequency FL 40 - 80 KHz (5) Lamp Life Time LBL 12,000 - - Hrs (7) Power Consumption PL - 4.2 - W (6), IL = 6.0 mA
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
Min. Typ. Max.
2.0 (1),(2)
3.0
- - 1140(25
- - 1580(0
Value
(6.0) (7.0) mA
o
C) V
o
C) V
Unit Note
IL = 6.0 mA
RMS
RMS
(4)
RMS
(4)
RMS
(1),(3)
Note (2) for burst mode inverter design
Note (3) for continuous mode inverter design
Note (4) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Note (5) The lamp frequency may generate interference with horizontal synchronous frequency from the
Note (6) P
Note (7) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
LCD
Module
Otherwise the lamp may not be turned on.
display, and this may cause line flow on the display. In order to avoid interference, the lamp
www.jxlcd.com
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
www.jxlcd.com
as possible.
= I
×V
L
= 25 ±2 (a) When the brightness becomes 50% of its original value.
L
L
o
C and IL = 6.0 mA
HV (Pink)
LV (White)
until one of the following events occurs:
RMS
1
2
Current Meter
A
Inverter
(b) When the effective ignition length becomes ≦ 80% of its original value. (Effective ignition
length is defined as an area that the brightness is less than 70% compared to the center point.)
Note (8) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
The output of the inverter must have symmetrical (negative and positive) voltage waveform and
9 / 30
Version 0.0
Page 10
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter,
which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below;
b. The distortion rate of the waveform should be within 2 ± 10%;
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
* Asymmetry rate:
I p
I -p
www.jxlcd.com
www.jxlcd.com
| I
* Distortion rate
I
– I –p | / I
p
(or I –p) / I
p
rms
rms
* 100%
10 / 30
Version 0.0
Page 11
4. BLOCK DIAGRAM
)
4.1 TFT LCD MODULE
LVDS Display
Data & Clock
CLK
Vcc
GND
Data
EDID
V
EDID
EDID
INPUT CONNECTOR
VL
LAMP CONNECTOR
LVDS INPUT /
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
SCAN DRIVER IC
TFT LCD PANEL
DA TA DRIVER IC
BACKLIGHT UNIT
www.jxlcd.com
4.2 BACKLIGHT UNIT
www.jxlcd.com
1 HV (Pink)
2 LV (White
11 / 30
Version 0.0
Page 12
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground 2 Vcc Power Supply +3.3 V (typical) 3 Vcc Power Supply +3.3 V (typical) 4 V 5 NC Non-Connection 6 CLK 7 DATA 8 Rxin0- LVDS Differential Data Input Negative
9 Rxin0+ LVDS Differential Data Input Positive
10 Vss Ground
11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 Vss Ground 14 Rxin2- LVDS Differential Data Input Negative B2~B5, DE, Hsync, Vsync
15 Rxin2+ LVDS Differential Data Input Positive 16 Vss Ground 17 CLK- LVDS Clock Data Input Negative 18 CLK+ LVDS Clock Data Input Positive 19 Vss Ground 20 NC Non-Connection 21 NC Non-Connection 22 Vss Ground 23 NC Non-Connection 24 NC Non-Connection 25 Vss Ground 26 NC Non-Connection 27 NC Non-Connection 28 Vss Ground 29 NC Non-Connection 30 NC Non-Connection
Note (1) Connector Part No.: JAE-FI-XB30S-HF10 or equivalent
www.jxlcd.com
www.jxlcd.com
DDC 3.3V Power DDC 3.3V Power
EDID
DDC Clock DDC Clock
EDID
DDC Data DDC Data
EDID
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
R0~R5,G0
G1~G5, B0, B1
LVDS Level Clock
Note (2) User’s connector Part No: FI-X30M or equivalent
Note (3) The first pixel is odd as shown in the following figure.
12 / 30
Version 0.0
Page 13
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink 2 LV Ground White
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
Rxin2
Rxin1
Rxin0
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1 B0 G5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0 R3 R2 R1 R0
R5
R4
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
www.jxlcd.com
www.jxlcd.com
Signal for 1 DCLK Cycle (T)
13 / 30
Version 0.0
Page 14
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input the brighter the color. The table below provides the assignment of
color versus data input.
Data Signal
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black Red Green
Basic Colors
Gray Scale Of Red
Gray Scale Of Green
Gray Scale Of Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue Cyan Magenta Yellow White Red(0)/Dark Red(1) Red(2)
:
: Red(61) Red(62) Red(63) Green(0)/Dark Green(1) Green(2)
:
: Green(61)
www.jxlcd.com
www.jxlcd.com
Green(62) Green(63) Blue(0)/Dark Blue(1) Blue(2)
:
: Blue(61) Blue(62) Blue(63)
0 1 0 0 0 1 1 1 0 0 0
:
: 1 1 1 0 0 0
:
: 0 0 0 0 0 0
:
: 0 0 0
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0 0 0 1 1 1 0 1 0 0 0
:
: 0 0 0 0 0 0
:
: 0 0 0 0 1 0
:
: 1 0 1
14 / 30
Version 0.0
Page 15
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #(decimal)
0 0 Header
1 1 Header
2 2 Header
3 3 Header
4 4 Header
5 5 Header
6 6 Header
7 7 Header
8 8 EISA ID manufacturer name (“CMO”)
9 9 EISA ID manufacturer name (Compressed ASCII)
10 0A ID product code (N154I3-L02) 53
11 0B ID product code (hex LSB first; N154I3-L02) 15
12 0C ID S/N (fixed “0”)
13 0D ID S/N (fixed “0”)
14 0E ID S/N (fixed “0”)
15 0F ID S/N (fixed “0”)
16 10 Week of manufacture (fixed “00H”)
17 11 Year of manufacture (fixed “00H”)
18 12 EDID structure version # (“1”)
19 13 EDID revision # (“3”)
20 14 Video I/P definition (“digital”)
21 15 Max H image size (“33cm”)
22 16 Max V image size (“21cm”)
23 17 Display Gamma (Gamma = ”2.2”)
24 18 Feature support (“Active off, RGB Color”)
25 19 Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0)
26 1A Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0)
27 1B Red-x (Rx = “0.602”)
28 1C Red-y (Ry = “0.340”)
29 1D Green-x (Gx = ”0.306”)
30 1E Green-y (Gy = ”0.530”)
31 1F Blue-x (Bx = ”0.151”)
32 20 Blue-y (By = ”0.120”)
33 21 White-x (Wx = ”0.313”)
34 22 White-y (Wy = ”0.329”)
35 23 Established timings 1
36 24 Established timings 2
37 25 Manufacturer’s reserved timings
38 26 Standard timing ID # 1
39 27 Standard timing ID # 1
Byte #(hex)Field Name and Comments Value(hex) Value(binary)
00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
01 00000001
www.jxlcd.com
www.jxlcd.com
03 00000011
80 10000000
21 00100001
15 00010101
78 01111000
0A 00001010
06 00000110
A0 10100000
9A 10011010
57 01010111
4E 01001110
87 10000111
26 00100110
1E 00011110
50 01010000
54 01010100
00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
Tentative
01010011
00010101
15 / 30
Version 0.0
Page 16
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
40 28 Standard timing ID # 2
41 29 Standard timing ID # 2
42 2A Standard timing ID # 3
43 2B Standard timing ID # 3
44 2C Standard timing ID # 4
45 2D Standard timing ID # 4
46 2E Standard timing ID # 5
47 2F Standard timing ID # 5
48 30 Standard timing ID # 6
49 31 Standard timing ID # 6
50 32 Standard timing ID # 7
51 33 Standard timing ID # 7
52 34 Standard timing ID # 8
53 35 Standard timing ID # 8
Detailed timing description # 1 Pixel clock (“71MHz”, According to
54 36
55 37 # 1 Pixel clock (hex LSB first)
56 38 # 1 H active (“1280”)
57 39 # 1 H blank (“160”)
58 3A # 1 H active : H blank (“1280 : 160”)
59 3B # 1 V active (”800”)
60 3C # 1 V blank (”23”)
61 3D # 1 V active : V blank (”800 :23”)
62 3E # 1 H sync offset (”48”)
63 3F # 1 H sync pulse width ("32”)
64 40 # 1 V sync offset : V sync pulse width (”3 : 6”)
65 41
66 42 # 1 H image size (”331 mm”)
67 43 # 1 V image size (”207 mm”)
68 44 # 1 H image size : V image size (”331 : 207”)
69 45 # 1 H boarder (”0”)
70 46 # 1 V boarder (”0”)
71 47
72 48 Detailed timing description # 2
73 49 # 2 Flag
74 4A # 2 Reserved
75 4B # 2 FE (hex) defines ASCII string (Model Name “N154I3-L02”, ASCII)
76 4C # 2 Flag
77 4D # 2 1st character of name (“N”)
78 4E # 2 2nd character of name (“1”)
79 4F # 2 3rd character of name (“5”)
80 50 # 2 4th character of name (“4”)
81 51 # 2 5th character of name (“I”)
82 52 # 2 6th character of name (“3”)
83 53 # 2 7th character of name (“-”)
VESA CVT Rev1.1)
www.jxlcd.com
www.jxlcd.com
# 1 H sync offset : H sync pulse width : V sync offset : V sync width (”48: 32 : 3 : 6”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol Negatives
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
BC 10111100
1B 00011011
00 00000000
A0 10100000
50 01010000
20 00100000
17 00010111
30 00110000
30 00110000
20 00100000
36 00110110
00 00000000
4B 01001011
CF 11 001111
10 00010000
00 00000000
00 00000000
18 00011000
00 00000000
00 00000000
00 00000000
FE 1111111 0
00 00000000
4E 01001110
31 00110001
35 00110101
34 00110100
49 01001001
33 00110011
2D 00101101
16 / 30
Version 0.0
Page 17
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
84 54 # 2 8th character of name (“L”)
85 55 # 2 9th character of name (“0”)
86 56 # 2 9th character of name (“2”)
87 57 # 2 New line character indicates end of ASCII string
88 58 # 2 Padding with “Blank” character
89 59 # 2 Padding with “Blank” character
90 5A Detailed timing description # 3
91 5B # 3 Flag
92 5C # 3 Reserved
93 5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII)
94 5E # 3 Flag
95 5F # 3 1st character of string (“C”)
96 60 # 3 2nd character of string (“M”)
97 61 # 3 3rd character of string (“O”)
98 62 # 3 New line character indicates end of ASCII string
99 63 # 3 Padding with “Blank” character
100 64 # 3 Padding with “Blank” character
101 65 # 3 Padding with “Blank” character
102 66 # 3 Padding with “Blank” character
103 67 # 3 Padding with “Blank” character
104 68 # 3 Padding with “Blank” character
105 69 # 3 Padding with “Blank” character
106 6A # 3 Padding with “Blank” character
107 6B # 3 Padding with “Blank” character
108 6C Detailed timing description # 4
109 6D # 4 Flag
110 6E # 4 Reserved
111 6F # 4 FE (hex) defines ASCII string (Model Name“N154I3-L02”, ASCII)
112 70 # 4 Flag
113 71 # 4 1st character of name (“N”) 4E
114 72 # 4 2nd character of name (“1”) 31
115 73 # 4 3rd character of name (“5”) 35
116 74 # 4 4th character of name (“4”) 34
117 75 # 4 5th character of name (“I”) 49
118 76 # 4 6th character of name (“3”) 33
119 77 # 4 7th character of name (“-”) 2D
120 78 # 4 8th character of name (“L”) 4C
121 79 # 4 9th character of name (“0”)
122 7A # 4 9th character of name (“2”)
123 7B # 4 New line character indicates end of ASCII string
124 7C # 4 Padding with “Blank” character
125 7D # 4 Padding with “Blank” character
126 7E Extension flag
127 7F Checksum
www.jxlcd.com
www.jxlcd.com
4C 01001100
30 00110000
32 00110010
0A 00001010
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 1111111 0
00 00000000
43 01000011
4D 01001101
4F 01001111
0A 00001010
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 1111111 0
00 00000000
30 00110000
32 00110010
0A 00001010
20 00100000
20 00100000
00 00000000
37 00110111
01001110
00110001
00110101
00110100
01001001
00110011
00101101
01001100
17 / 30
Version 0.0
Page 18
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc - 71 MHz -
Vertical Total Time TV 823 TH -
DE
Vertical Addressing Time TVD 800 TH -
Horizontal Total Time TH 1440 Tc -
Horizontal Addressing Time THD 1280 Tc -
INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
DE
DATA
TC
www.jxlcd.com
www.jxlcd.com
T
HD
18 / 30
Version 0.0
Page 19
6.2 POWER ON/OFF SEQUENCE
Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of Transmitter), V
- Power for Lamp
0V
0V
I
10%
Power On
90%
t1
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
Restart
t7
10%
10%
t4
Valid Data
ONOFF OFF
Power Off
90%
t3 t2
t6 t5
50%50%
Timing Specifications:
0.5< t1 <= 10 msec
0 < t2 <= 50 msec
0 < t3 <= 50 msec
t4 >= 500 msec
t5 >= 200 msec
www.jxlcd.com
www.jxlcd.com
t6 >= 200 msec
Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be
damaged.
Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be
sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5ms≦t7≦300 ms.
19 / 30
Version 0.0
Page 20
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit Ambient Temperature Ta Ambient Humidity Ha Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current IL 6.0 mA Inverter Driving Frequency FL 55 KHz Inverter Sumida-H05-4915
The measurement methods of optical characteristics are shown in Section 7.2. The following items
should be measured under the test conditions described in Section 7.1 and stable environment shown in
Note (6).
25±2
50±10
7.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 280 400 - - (2), (5)
Response Time
Central Luminance of White LC 190 210 cd/m Average Luminance of White
Red
Green Color Chromaticity
Viewing Angle
White Variation of 5 Points δW5p White Variation of 13 Points δW
www.jxlcd.com
www.jxlcd.com
Blue
White
Color Gamut C.G.
Horizontal
Vertical
TR - 3 8 ms T
- 7 12 ms
F
L
AVE
Rx
Ry Gx Gy
Bx
By
Wx 0.313 ­Wy
θx+
θ
-
x
θY+
-
θ
Y
13p
θ
=0°, θY =0°
x
Viewing Normal Angle
CR10
θ
=0°, θY =0°
x
(BM-5A)
180 200 - cd/m
TBD TBD TBD
TYP.
-0.03
42 45 % (7) 40 45 ­40 45 ­15 20 ­40 45 ­80 - - %
65 - - %
TBD TBD TBD
0.329
TYP.
+0.03
o
C
%RH
(3)
2
(4), (6)
2
-
-
-
-
-
-
-
Deg. (1),(5)
(1)
(5),(6)
20 / 30
Version 0.0
Page 21
Note (1) Definition of Viewing Angle (θx, θy):
.67 ms
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
Note (2) Definition of Contrast Ratio (CR):
θX- = 90º
6 o’clock
θ
y- = 90º
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
x-
y-
Normal
θx = θy = 0º
θy- θy+
θx
θx+
y+
12 o’clock direction
θ
y+ = 90º
x+
θX+ = 90º
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
www.jxlcd.com
CR = CR (5)
www.jxlcd.com
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
T
R
66.67 ms
, TF):
R
66
Time
T
F
21 / 30
Version 0.0
Page 22
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6)
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
Center of the Screen
Field of View = 2º
AVE
):
Photometer
(CA210, CS-1000T)
www.jxlcd.com
www.jxlcd.com
500 mm
Light Shield Room (Ambient Luminance < 2 lux)
22 / 30
Version 0.0
Page 23
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 63 at 5 points
= Minimum [L (10)+ L (11)+ L (12)+ L (13)+ L (5)] / Maximum [L (10)+ L (11)+ L (12)+ L (13)+ L (5)]
δW
5p
δW
= Minimum [L (1) ~ L (13)] / Maximum [L (1) ~ L (13)]
13p
10mm
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
6
H/4
2
10mm
9
45
11
10mm 10mm
W/4 W/4 W/4 W/4
H
H/4 H/4 H/4
Note (7) Definition of color gamut (C.G%):
www.jxlcd.com
C.G%=  R G B / R
R
R, G, B
 R
www.jxlcd.com
, G0, B0 : color coordinates of red, green, and blue defined by NTSC, respectively.
0
: color coordinates of module on 63 gray levels of red, green, and blue, respectively.
0 G0 B0
: area of triangle defined by R0, G0, B0
0 G0 B0
7
1
12
W
,*100%
8
3
X
: Test Point
10
13
X=1 to 13
Active area
 R G B: area of triangle defined by R, G, B
CIE 1931
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1 0
0 0.2 0.4 0.6 0.8
Version 0.0
G
0
G
R
0
R
B
B
0
23 / 30
Page 24
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not
to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
permanently damage the polarizer due to chemical reaction.
Tentative
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
www.jxlcd.com
(11) Pins of I/F connector should not be touched directly with bare hands.
8.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
temperature.
www.jxlcd.com
8.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
24 / 30
Version 0.0
Page 25
9. PACKING
9.1 CARTON
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
www.jxlcd.com
www.jxlcd.com
Figure. 9-1 Packing method
25 / 30
Version 0.0
Page 26
9.2 PALLET FOR SEA FREIGHT
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
www.jxlcd.com
www.jxlcd.com
Figure. 9-2 Packing method
26 / 30
Version 0.0
Page 27
9.3 PALLET FOR AIR FREIGHT
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
www.jxlcd.com
www.jxlcd.com
Figure. 9-3 Packing method
27 / 30
Version 0.0
Page 28
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
-
(a) Model Name: N154I3 - L02
(b) Revision: Rev. XX, for example: C1, C2 …etc.
(c) Serial ID: X X
www.jxlcd.com
www.jxlcd.com
X X X X X Y M D L N N N N
Rev. XX
LEOO
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
st
to 31st, exclude I , O and U
28 / 30
Version 0.0
Page 29
10.2 CARTON LABEL
Doc No.:
Issued Date: May. 28, 2007
Model No.: N154I3-L02 (NF4I302901)
Tentative
www.jxlcd.com
www.jxlcd.com
29 / 30
Version 0.0
Page 30
www.jxlcd.com
www.jxlcd.com
Loading...