Page 1
www.jxlcd.com
www.jxlcd.com
Page 2
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
- CONTENTS -
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID DATA STRUCTURE
5.6 EDID SIGNAL SPECIFICATION
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
8.2 STORAGE PRECAUTIONS
8.3 OPERATION PRECAUTIONS
9. PACKING ------------------------------------------------------- 23
9.1 CARTON
9.2 PALLET
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
10.2 CARTON LABEL
www.jxlcd.com
www.jxlcd.com
------------------------------------------------------- 3
------------------------------------------------------- 4
------------------------------------------------------- 5
------------------------------------------------------- 7
------------------------------------------------------- 10
------------------------------------------------------- 11
------------------------------------------------------- 17
------------------------------------------------------- 19
------------------------------------------------------- 22
------------------------------------------------------- 24
2 / 25
Version 2.1
Page 3
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
Version Date
Mar. 14. ‘05
Jun. 06. ‘05
Jun. 30. ‘05
www.jxlcd.com
www.jxlcd.com
Ver 1.0
Ver 2.0
Ver 2.1
Page
(New)
All
7
8
14
17
19
19
REVISION HISTORY
Section Description
All
Preliminary specification first issued.
3.1
3.2
5.5
6.1
7.2
7.2
Update Electrical Characteristics Table 3.1 TFT LCD Module
Update Electrical Characteristics Table 3.2 Backlight Unit
EDID code update
Modify
Modify Optical Specification
Average Luminance spec change from min.180 typ.210 to min.170
typ.200
Input Signal Timing Specifications and Timing Diagram
Average Luminance spec from min.190 typ.220 to min.180 typ.210
Viewing Angle θ
Viewing Angle θ
+ spec from min10 / typ15 to min15 / typ20
Y
- spec from min30 / typ35 to min40 / typ45
Y
3 / 25
Version 2.1
Page 4
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
1. GENERAL DESCRIPTION
1.1 OVERVIEW
N150P5 is a 15.0” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins LVDS
interface. This module supports 1400x 1050 SXGA+ mode and can display 262,144 colors. The optimum
viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and light weight
- SXGA+ (1400 x 1050 pixels) resolution
- DE (Data Enable) only mode
- 2 channel 3.3V LVDS (Low Voltage Differential Signaling) interface
- Support EDID Structure Version 1 Revision 3
Approval
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 304.5 (H) x 228.375 (V) (15” diagonal) mm
Bezel Opening Area 308.1 (H) x 232 (V) mm
Driver Element a-si TFT active matrix - Pixel Number 1400 x R.G.B. x 1050 pixel Pixel Pitch 0.2175 (H) x 0.2175 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treatment Hardness (3H), Anti-glare (Haze 25) - -
1.5 MECHANICAL SPECIFICATIONS
Module Size
I/F connector mounting position The mounting inclination of the connector makes the screen
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
www.jxlcd.com
www.jxlcd.com
Item Min. Typ. Max. Unit Note
Horizontal(H) 316.8 317.3 317.8 mm
Vertical(V) 241.5 242.0 242.5 mm
Depth(D) - 5.7 6.0 mm
Weight - 530 550 g -
center within ±0.5mm as the horizontal.
(1)
(1)
(2)
(2) Connector mounting position
+/- 0.5mm
4 / 25
Version 2.1
Page 5
Issued Date: Jun. 30, 2005
A
Model No.: N150P5 -L02
Approval
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) S
Vibration (Non-Operating) V
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta ≦ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation .
- 220/2 G/ms (3), (5)
NOP
- 1.5 G (4), (5)
NOP
Value
Min. Max.
Unit Note
www.jxlcd.com
Note (2) The temperature of panel surface should be 0 ºC Min. and 50 ºC Max.
Note (3) Condition for 220/2 G/ms is Half Sine Wave.
www.jxlcd.com
Relative Humidity (%RH)
100
90
80
60
40
20
Operating Range
Storage Range
5
Temperature (ºC)
8060 -20 400 20-40
Note (4) 10 ~ 500 Hz, 0.5 Hr / Cycle, 1 cycles for each X, Y, Z. The fixing condition is shown as below:
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
Version 2.1
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
so that the module would not be twisted or bent by the fixture.
Bracket
5 / 25
LCD Module
Side Mount Fixing Screw
Stage
Page 6
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage Vcc -0.3 +4.0 V
Logic Input Voltage VIN -0.3 Vcc+0.3 V
2.2.2 BACKLIGHT UNIT
Item Symbol
Lamp Voltage VL - 2.5K V
Lamp Current IL - 7.0 mA
Lamp Frequency FL - 80 KHz
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Min. Max.
Min. Max.
Value
Value
Unit Note
(1)
Unit Note
(1), (2), IL = (6.0) mA
RMS
RMS
(1), (2)
Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).
www.jxlcd.com
www.jxlcd.com
6 / 25
Version 2.1
Page 7
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage Vcc 3.0 3.3 3.6 V Ripple Voltage VRP - 50 - mV Rush Current I
Power Supply Current
White - 400 450 mA (3)a
Black
- - 1.5 A (2)
RUSH
lcc
- 530 580 mA (3)b
“H” Level VIH - - +100 mV - Differential Input Voltage for
LVDS Receiver Threshold
“L” Level V
-100 - - mV -
IL
Terminating Resistor RT - 100 - Ohm -
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
Value
Unit Note
+3.3V
R1
47K
Q1 2SK1475
FUSE
C3
1uF
Vcc
(LCD Module Input)
(High to Low)
(Control Signal)
SW
www.jxlcd.com
+12V
www.jxlcd.com
C1
1uF
VR1
R2
1K
47K
0.01uF
Q2
2SK1470
C2
Vcc rising time is 470us
+3.3V
0.9Vcc
0.1Vcc
GND
470us
7 / 25
Version 2.1
Page 8
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, DC
Current and f
a. White Pattern
= 60 Hz, whereas a power dissipation check pattern below is displayed.
v
b. Black Pattern
Active Area
Active Area
3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC
Parameter Symbol
Lamp Input Voltage VL 641 675 709 V
Lamp Current IL 2.0 6.0 7.0 mA
Lamp Turn On Voltage VS
Operating Frequency FL 45 65 80 KHz (3)
Power Consumption PL - 4.05 - W (4), IL = 6.0 mA
Lamp Life Time LBL 10,000 - - Hrs (5)
Leakage Current IIN-I
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
www.jxlcd.com
www.jxlcd.com
LCD
Module
- - 1.0 mA (7)
OUT
HV (Pink)
LV (Black)
Min. Typ. Max.
- - 1150 (25
- - 1385 (0
Value
1
2
Current Meter
Unit Note
o
C) V
o
C) V
I
RMS
RMS
(2)
RMS
(2)
RMS
= 6.0 mA
L
(1)
Inverter
A
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may generate interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) P
Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta
= IL ×VL
L
= 25 ±2
(a) When the brightness becomes ≦ 50% of its original value.
(b) When the effective ignition length becomes ≦ 80% of its original value. (Effective ignition
o
C and IL = 6.0 mA
length is defined as an area that the brightness is less than 70% compared to the center point.)
until one of the following events occurs:
RMS
8 / 25
Version 2.1
Page 9
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid generating too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
Note (7) The lamp leakage current is measured by the current difference between in and out. And the
measurement condition is as below:
Approval
LCD Module
FG
Low
I
Low
www.jxlcd.com
www.jxlcd.com
GND
Current Probe
Inverter
I
Leak(RMS)
= I
Lamp
High(RMS)
- I
Low(RMS)
High
Current Probe
I
High
9 / 25
Version 2.1
Page 10
4. BLOCK DIAGRAM
)
4.1 TFT LCD MODULE
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
Rxin0(+/-)
Rxin1(+/-)
Rxin2(+/-)
CLK(+/-)
Vcc
(JAE-FI-XB30SL-HF10)
GND
Data
CLK
V
EDID
EDID
EDID
VL
LAMP CONNECTOR
4.2 BACKLIGHT UNIT
INPUT CONNECTOR
(JST-BHSR-02VS-1)
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
LVDS INPUT /
GENERATOR
EDID
EEPROM
SCAN DRIVER IC
TFT LCD PANEL
(1400x3x1050)
DATA DRIVER IC
BACKLIGHT UNIT
www.jxlcd.com
www.jxlcd.com
1 HV (Pink)
2 LV (Black
10 / 25
Version 2.1
Page 11
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 Vss Ground 2 Vcc Power Supply +3.3 V 3 Vcc Power Supply +3.3 V 4 V
5 NC Non-Connection 6 CLK
7 DATA
8 RXE0- LVDS Differential Data Input(even) Negative
9 RXE0+ LVDS Differential Data Input(even) Positive
10 Vss Ground -
11 RXE1- LVDS Differential Data Input(even) Negative
12 RXE1+ LVDS Differential Data Input(even) Positive
13 Vss Ground 14 RXE2- LVDS Differential Data Input(even) Negative
15 RXE2+ LVDS Differential Data Input(even) Positive
16 Vss Ground 17 RXEC- LVDS Clock Data Input(even) Negative
18 RXEC+ LVDS Clock Data Input(even) Positive
19 Vss Ground 20 RXO0- LVDS Differential Data Input(odd) Negative
21 RXO0+ LVDS Differential Data Input(odd) Positive
22 Vss Ground 23 RXO1- LVDS Differential Data Input(odd) Negative
24 RXO1+ LVDS Differential Data Input(odd) Positive
25 Vss Ground 26 RXO2- LVDS Differential Data Input(odd) Negative
27 RXO2+ LVDS Differential Data Input(odd) Positive
28 Vss Ground 29 RXOC- LVDS Clock Data Input(odd) Negative
30 RXOC+ LVDS Clock Data Input(odd) Positive
Note (1) The first pixel is even.
www.jxlcd.com
www.jxlcd.com
DDC +3.3V -
EDID
DDC Clock -
EDID
DDC Data -
EDID
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
R0~R5,G0
G1~G5,B0,B1
B2~B5,DE,Hsync,Vsync
LVDS Level
R0~R5,G0
G1~G5,B0,B1
B2~B5,DE,Hsync,Vsync
LVDS Level
Note (2) Connector Part No.: JAE-FI-XB30SL-HF10 or equivalent
Note (3) User’s connector Part No: JAE-FI-X30C2L or equivalen
5.2 BACKLIGHT UNIT
Pin Symbol Description Color
1 HV High Voltage Pink
2 LV Ground Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
11 / 25
Version 2.1
Page 12
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
RXEC+
T/7
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
RXE2+
RXE1+
RXE0+
RXOC+
RXO2+
RXO1+
RXO0+
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1B0 G5
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0 R3 R2 R1 R0R5 R4
Signal for 1 DCLK Cycle (T)
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1B0 G5
www.jxlcd.com
www.jxlcd.com
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0 R3 R2 R1 R0R5 R4
Signal for 1 DCLK Cycle (T)
12 / 25
Version 2.1
Page 13
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input the brighter the color. The table below provides the assignment of
color versus data input.
Data Signal
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)
:
:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)
:
:
Green(61)
www.jxlcd.com
www.jxlcd.com
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)
:
:
Blue(61)
Blue(62)
Blue(63)
0
1
0
0
0
1
1
1
0
0
0
:
:
1
1
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
1
1
1
0
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
0
1
0
:
:
1
0
1
13 / 25
Version 2.1
Page 14
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #
(decimal)
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 0A
11 0B
12 0C
13 0D
14 0E
15 0F
16 10
17 11
18 12
19 13
20 14
21 15
22 16
23 17
24 18
25 19
26 1A
27 1B
28 1C
29 1D
30 1E
31 1F
32 20
33 21
34 22
35 23
36 24
37 25
38 26
39 27
40 28
41 29
Byte #
(hex)
www.jxlcd.com
www.jxlcd.com
Field Name and Comments
Header
Header
Header
Header
Header
Header
Header
Header
EISA ID manufacturer name (“CMO”)
EISA ID manufacturer name (Compressed ASCII)
ID product code (N150P5-L02) 10
ID product code (hex LSB first; N150P5-L02) 15
ID S/N (fixed “0”)
ID S/N (fixed “0”)
ID S/N (fixed “0”)
ID S/N (fixed “0”)
Week of manufacture (fixed “00H”)
Year of manufacture (fixed “00H”)
EDID structure version # (“1”)
EDID revision # (“3”)
Video I/P definition (“digital”)
Max H image size (“30.45cm”)
Max V image size (“22.837cm”)
Display Gamma (Gamma = ”2.2”)
Feature support (“Active off, RGB Color”)
Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0)
Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0)
Red-x (Rx = “0.590”)
Red-y (Ry = “0.340”)
Green-x (Gx = ”0.318”)
Green-y (Gy = ”0.537”)
Blue-x (Bx = ”0.150”)
Blue-y (By = ”0.120”)
White-x (Wx = ”0.313”)
White-y (Wy = ”0.329”)
Established timings 1
Established timings 2
Manufacturer’s reserved timings
Standard timing ID # 1
Standard timing ID # 1
Standard timing ID # 2
Standard timing ID # 2
Value
(hex)
00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
0D 00001101
AF 10101111
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
01 00000001
03 00000011
80 10000000
1E 00011110
17 00010111
78 01111000
0A 00001010
0A 00001010
B5 10110101
97 10010111
57 01010111
51 01010001
89 10001001
26 00100110
1E 00011110
50 01010000
54 01010100
00 00000000
00 00000000
00 00000000
01 00000001
01 00000001
01 00000001
01 00000001
Value
(binary)
00010000
00010101
14 / 25
Version 2.1
Page 15
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
Byte #
(decimal)
42 2A
43 2B
44 2C
45 2D
46 2E
47 2F
48 30
49 31
50 32
51 33
52 34
53 35
54 36
55 37
56 38
57 39
58 3A
59 3B
60 3C
61 3D
62 3E
63 3F
64 40
65 41
66 42
67 43
68 44
69 45
70 46
71 47
72 48
73 49
74 4A
75 4B
76 4C
77 4D
78 4E
79 4F
80 50
81 51
82 52
83 53
84 54
Byte #
(hex)
www.jxlcd.com
www.jxlcd.com
Field Name and Comments
Standard timing ID # 3
Standard timing ID # 3
Standard timing ID # 4
Standard timing ID # 4
Standard timing ID # 5
Standard timing ID # 5
Standard timing ID # 6
Standard timing ID # 6
Standard timing ID # 7
Standard timing ID # 7
Standard timing ID # 8
Standard timing ID # 8
Detailed timing description # 1 Pixel clock (“108MHz”)
# 1 Pixel clock (hex LSB first)
# 1 H active (“1400”)
# 1 H blank (“288”)
# 1 H active : H blank (“1400 : 288”)
# 1 V active (”1050”)
# 1 V blank (”16”)
# 1 V active : V blank (”1050 :16”)
# 1 H sync offset (”48”)
# 1 H sync pulse width ("112”)
# 1 V sync offset : V sync pulse width (”3 : 4”)
# 1 H sync offset : H sync pulse width : V sync offset : V sync
width (”48: 112 : 3 : 4”)
# 1 H image size (”304.5 mm”)
# 1 V image size (”228.37 mm”)
# 1 H image size : V image size (”304 : 228”)
# 1 H boarder (”0”)
# 1 V boarder (”0”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
Negatives
Detailed timing description # 2
# 2 Flag
# 2 Reserved
# 2 FE (hex) defines ASCII string (Model Name “N150P5-L02”,
ASCII)
# 2 Flag
# 2 1st character of name (“N”)
# 2 2nd character of name (“1”)
# 2 3rd character of name (“5”)
# 2 4th character of name (“0”)
# 2 5th character of name (“P”)
# 2 6th character of name (“5”)
# 2 7th character of name (“-”)
# 2 8th character of name (“L”)
Value
(hex)
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
30 00110000
2A 00101010
78 01111000
20 00100000
51 01010001
1A 00011010
10 00010000
40 01000000
30 00110000
70 01110000
34 00110100
00 00000000
30 00110000
E4 11100100
10 00010000
00 00000000
00 00000000
18 00011000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
4E 01001110
31 00110001
35 00110101
30 00110000
50 01010000
35 00110101
2D 00101101
4C 01001100
Value
(binary)
15 / 25
Version 2.1
Page 16
Byte #
(decimal)
85 55
86 56
87 57
88 58
89 59
90 5A
91 5B
92 5C
93 5D
94 5E
95 5F
96 60
97 61
98 62
99 63
100 64
101 65
102 66
103 67
104 68
105 69
106 6A
107 6B
108 0A
109 6D
110 6E
111 6F
112 70
113 71
114 72
115 73
116 74
117 75
118 76
119 77
120 78
121 79
122 7A
123 7B
124 7C
125 7D
126 7E
127 7F
Byte #
(hex)
www.jxlcd.com
www.jxlcd.com
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Field Name and Comments
# 2 9th character of name (“0”)
# 2 10th character of name (“2”)
# 2 New line character indicates end of ASCII string
# 2 Padding with “Blank” character
# 2 Padding with “Blank” character
Detailed timing description # 3
# 3 Flag
# 3 Reserved
# 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII)
# 3 Flag
# 3 1st character of string (“C”)
# 3 2nd character of string (“M”)
# 3 3rd character of string (“O”)
# 3 New line character indicates end of ASCII string
# 3 Padding with “Blank” character
# 3 Padding with “Blank” character
# 3 Padding with “Blank” character
# 3 Padding with “Blank” character
# 3 Padding with “Blank” character
# 3 Padding with “Blank” character
# 3 Padding with “Blank” character
# 3 Padding with “Blank” character
# 3 Padding with “Blank” character
Detailed timing description # 4
# 4 Flag
# 4 Reserved
# 4 FE (hex) defines ASCII string (Model Name“N150P5-L02”,
ASCII)
# 4 Flag
# 4 1st character of name (“N”) 4E
# 4 2nd character of name (“1”) 31
# 4 3rd character of name (“5”) 35
# 4 4th character of name (“0”) 30
# 4 5th character of name (“P”) 50
# 4 6th character of name (“5”) 35
# 4 7th character of name (“-”) 2D
# 4 8th character of name (“L”) 4C
# 4 9th character of name (“0”)
# 4 10th character of name (“2”)
# 4 New line character indicates end of ASCII string
# 4 Padding with “Blank” character
# 4 Padding with “Blank” character
Extension flag
Checksum
Value
(hex)
30 00110000
32 00110010
0A 00001010
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
43 01000011
4D 01001101
4F 01001111
0A 00001010
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
30 00110000
32 00110010
0A 00001010
20 00100000
20 00100000
00 00000000
8F 10001111
Approval
Value
(binary)
01001110
00110001
00110101
00110000
01010000
00110101
00101101
01001100
16 / 25
Version 2.1
Page 17
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 51 54 57 MHz -
Vertical Total Time TV 1058 1066 2046 TH -
DE
Vertical Addressing Time TVD 1050 1050 1050 TH -
Horizontal Total Time TH 762 844 1023 Tc -
Horizontal Addressing Time THD 700 700 700 Tc -
INPUT SIGNAL TIMING DIAGRAM ( Horizontal Timing Chart )
www.jxlcd.com
www.jxlcd.com
INPUT SIGNAL TIMING DIAGRAM ( Vertical Timing Chart )
17 / 25
Version 2.1
Page 18
6.2 POWER ON/OFF SEQUENCE
Power On
90%
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
Restart
Power Off
90%
t4
Power Supply
for LCD, Vcc
- Interface Signal
(LVDS Signal of
Transmitter), V
- Power for Lamp
Timing Specifications:
470us ≦ t1 ≦ 10 msec
0 < t2 ≦ 50 msec
0 < t3 ≦ 50 msec
Note (1) Please avoid floating state of interface signal at invalid period.
www.jxlcd.com
0V
0V
I
t4 ≧ 500 msec
t5 ≧ 200 msec
t6 ≧ 200 msec
www.jxlcd.com
10%
t1
Valid Data
ONOFF OFF
10%
t3t2
t6 t5
10%
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time had better to follow t7 ≧ 5 msec
6.3 Momentary Voltage Drops
(1) When 2.4V ≦ Vcc ＜3.0V and td≦10ms , the unit must work normally when VCC return to 3.0V.
(2) When Vcc < 2.4V, momentary voltage shall conform to the input voltage sequence.
18 / 25
Version 2.1
Page 19
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta 25±2
Ambient Humidity Ha 50±10 %RH
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Inverter Current IL
Inverter Driving Frequency FL
Inverter Sumida H05-4915
The measurement methods of optical characteristics are shown in Section 7.2. The following items
should be measured under the test conditions described in Section 7.1 and stable environment shown in
Note (6).
6.0
55
o
C
mA
KHz
7.2 OPTICAL SPECIFICATIONS
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 300 400 - - (2), (5)
Response Time
Average Luminance of White L
White Variation of 5 Points δW - - 1.25 - (5), (6)
Red
Color
Chromaticity
Viewing Angle
www.jxlcd.com
www.jxlcd.com
Green
Blue
White
Horizontal
Vertical
TR
T
F
170 200 - cd/m2(4), (5)
AVE
Rx 0.590 Ry 0.340 Gx 0.318 Gy 0.537 -
Bx 0.150 -
By 0.120 Wx 0.313 Wy
θx+ 40 45 -
θ
- 40 45 -
x
θY+ 15 20 -
θ
-
Y
θ
=0°, θY =0°
x
Viewing Normal Angle
CR≥10
- 5 10 ms
- 11 16 ms
Typ.
-0.03
0.329
40 45 -
Typ.
+0.03
Deg. (1), (5)
(3)
(1), (5)
-
19 / 25
Version 2.1
Page 20
Note (1) Definition of Viewing Angle (θx, θy):
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
Note (2) Definition of Contrast Ratio (CR):
θX- = 90º
6 o’clock
θ
y- = 90º
The contrast ratio can be calculated by the following expression.
x-
y-
Normal
θx = θy = 0º
θy- θy+
θx-
θx+
y+
12 o’clock direction
θ
y+ = 90º
x+
θX+ = 90º
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
www.jxlcd.com
L 0: Luminance of gray level 0
www.jxlcd.com
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (7).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
Gray Level 63
R
T
R
, TF):
Gray Level 0
Gray Level 63
Time
T
F
66.6ms
66.6ms
20 / 25
Version 2.1
Page 21
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (7).
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
Center of the Screen
Field of View = 2º
AVE
):
Photometer
(CA210, BM-5A, CS-1000T)
www.jxlcd.com
Note (6) Definition of White Variation (δW):
www.jxlcd.com
Measure the luminance of gray level 63 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Vertical Line
500 mm
Horizontal Line
D
Light Shield Room
(Ambient Luminance < 2 lux)
5
: Test Point
=
Version 2.1
Active Area
21 / 25
Page 22
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not
to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
Approval
permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
www.jxlcd.com
(11) Pins of I/F connector should not be touched directly with bare hands.
8.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
www.jxlcd.com
temperature.
8.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
22 / 25
Version 2.1
Page 23
9. PACKING
9.1 CARTON
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
9.2 PALLET
www.jxlcd.com
www.jxlcd.com
23 / 25
Version 2.1
Page 24
Issued Date: Jun. 30, 2005
Model No.: N150P5 -L02
Approval
10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
E207943
MADE IN TAIWAN
01A
01A
N141X5 - L03 Rev .XX
X X X X X X X Y M D L N N N N
-
C P 1 3 5 4 4 8 - 0 1
(a) Model Name: N150P5 - L02
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
(c) Serial ID: X X
Serial ID includes the information as below:
www.jxlcd.com
(a) Manufactured Date: Year: 1~9, for 2001~2009
www.jxlcd.com
X X X X X Y M D X N N N N
Serial No.
CMO Internal Use
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
10.2 CARTON LABEL
Month: 1~9, A~C, for Jan. ~ Dec.
st
Day: 1~9, A~Y, for 1
to 31st, exclude I , O and U
24 / 25
Version 2.1
Page 25
www.jxlcd.com
www.jxlcd.com
Loading...