Page 1
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
TFT LCD Approval Specification
MODEL NO.: N089L6 - L03
Customer : ASUS
Approved by :
Note : 18G240804502
www.jxlcd.com
www.jxlcd.com
16:58:59 CST
記錄 工作 審核 角色 投票
2009-03-16
PMMD III
Director
annie_hsu(徐凡琇
Director Accept
/56522 / 54873)
1 / 29
Version 3.1
Page 2
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
- CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3
1. GENERAL DESCRIPTION ------------------------------------------------------- 4
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 RELIABILITY TEST
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
2.3.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM ------------------------------------------------------- 10
4.1 TFT LCD MODULE
5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 11
5.1 TFT LCD MODULE
5.2 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.3 COLOR DATA INPUT ASSIGNMENT
5.4 EDID CODE DATA STRUCTURE
6. CONVERTER SPECIFICATION ------------------------------------------------------- 17
6.1 ABSOLUTE MAXIMUM RATINGS
6.2 RECOMMENDED OPERATING RATINGS
6.3 LED BACKLIGHT CONTROLL POWER SEQUENCE
7. INTERFACE TIMING ------------------------------------------------------- 18
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
7.2 POWER ON/OFF SEQUENCE
8. OPTICAL CHARACTERISTICS ------------------------------------------------------- 20
8.1 TEST CONDITIONS
8.2 OPTICAL SPECIFICATIONS
9. PRECAUTIONS ------------------------------------------------------- 24
9.1 SYSTEM MATCHING PRECAUTIONS
9.2 HANDLING PRECAUTIONS
9.3 STORAGE PRECAUTIONS
9.4 OPERATION PRECAUTIONS
9.5 OTHER PRECAUTIONS
10. PACKING ------------------------------------------------------- 25
10.1 CARTON
10.2 PALLET
11. DEFINITION OF LABELS ------------------------------------------------------- 27
11.1 CMO MODULE LABEL
11.2 CMO CARTON LABEL
www.jxlcd.com
www.jxlcd.com
2 / 29
Version 3.1
Page 3
Version Date
Ver. 3.0
Ver. 3.1
Feb.17, 2009
Mar. 11, 2009
www.jxlcd.com
www.jxlcd.com
Page
(New)
4
5
7
17
27
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
REVISION HISTORY
Section Description
1.4
2.1
2.2
3.1
6.2
11.1
General Specifications revised.
Absolute ratings of environment revised.
Reliability test added.
Logical power consumption added.
Recommended operating ratings revised.
CMO module label revised.
3 / 29
Version 3.1
Page 4
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
1. GENERAL DESCRIPTION
1.1 OVERVIEW
N089L6 - L03 is a 8.9” TFT Liquid Crystal Display module with LED Backlight unit and 40 pins LVDS
interface. This module supports 1024 x 600 Wide-SVGA mode and can display 262,144 colors. The
optimum viewing angle is at 6 o’clock direction. The converter module for Backlight is built in.
1.2 FEATURES
- WSVGA (1024 x 600 pixels) resolution
- Thin, light and low power consumption
- DE only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock
- Build in LED Converter
Approval
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATIONS
Item Specification Unit Note
Active Area 195.072(H) x 113.4(V) mm
Bezel Opening Area 198.27(H) x 116.6(V) mm
Driver Element a-si TFT active matrix - Pixel Number 1024 x R.G.B. x 600 pixel Pixel Pitch 0.1905(H) X 0.189(V) mm Pixel Arrangement RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treatment Hard coating (3H), Anti-glare Type - Power Consumption 2.2 typ./ 2.4 max @ Black Pattern Watt
1.5 MECHANICAL SPECIFICATIONS
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
www.jxlcd.com
www.jxlcd.com
Item Min. Typ. Max. Unit Note
Horizontal (H) 213.06 213.36 213.66 mm
Vertical (V) 129.25 129.55 129.85 mm
Depth (D) --- 4.60 4.90 mm
Weight --- 145 155 g -
(1)
(1)
4 / 29
Version 3.1
Page 5
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta ≦ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.
Min. Max.
Value
Unit Note
2.2 Reliability Test
No. Test Item Test Condition Note
www.jxlcd.com
www.jxlcd.com
-40
Relative Humidity (%RH)
100
90
80
60
40
20
10
Operating Range
Storage Range
Temperature (ºC)
80 60 -20 40 0 20
1 High Temperature Storage 60 , 240 hours℃
2 Low Temperature Storage -20 , 240 hours℃
3 Thermal Shock Storage {(-20 , 0.5 hour) (60 , 0.5 hour)}, 100 cycles℃℃
4 High Temperature Operating 50 , 300 hours℃
5 Low Temperature Operating 0 , 300 ℃ hours
6 High Temperature & High Humidity Operating 50 , 80% RH, 300hours℃
7 Shock (Non-Operating) 220G, 2ms (3)(5)
8 Vibration (Non-Operating) 1.5G, 10 to 500 Hz (4)(5)
150pF/330Ω
9 ESD test (Operation)
Contact Discharge : ±8KV
150pF/330Ω
Air Discharge : ±15KV
5 / 29
Version 3.1
(1) (2)
(6)
(7)
Page 6
Doc No.: 400029983
A
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
Note (1) There should be no condensation on the surface of panel during test.
Note (2) Temperature of panel display surface area should be 60 ºC Max.
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave
Note (4) 10 ~ 500 Hz, Sine wave, 30 min/cycle, 1 cycle for each X, Y, Z axis
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture. The fixing condition is shown as
below:
t Room Temperature
Side Mount Fixing Screw
Gap=2mm
Note (6) According to IEC 61000-4-2, ESD test criteria, class B: Some performance degradation allowed.
No data lost. Self-recoverable. No hardware failure.
Note (7) According to IEC 61000-4-2, ESD test criteria, class C: Temporary performance degradation.
Recovery by operator is acceptable. No hardware failures.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Power Supply Voltage VCC -0.3 +4.0 V
Logic Input Voltage VIN -0.3 VCC+0.3 V
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
www.jxlcd.com
www.jxlcd.com
Item Symbol
Bracket
Min. Max.
LCD Module
Side Mount Fixing Screw
Stage
Value
Unit Note
(1)
should be restricted to the conditions described under Normal Operating Conditions.
2.3.2 BACKLIGHT UNIT
Item Symbol
LED Light Bar Power Supply
Voltage
LED Light Bar Power Supply
Current
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for LED (Refer to 3.2 for further information).
V
-35 23.8 V
L
I
0 75 mA
L
Min. Max.
Value
6 / 29
Unit Note
(1), (2)
Version 3.1
Page 7
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage VCC 3.0 3.3 3.6 V Ripple Voltage VRP - 50 - mV Rush Current I
- - 1.5 A (2)
RUSH
Initial Stage Current IIS - - 1.0 A (2)
Power Supply Current
Logical Power Consumption
LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
White - 155 170 mA (3)a
Black
White - 0.511 - (3)a
Black
Icc
TH(LVDS)
TL(LVDS)
- 200 220 mA (3)b
- 0.660 -
- - +100 mV
-100 - - mV
LVDS Common Mode Voltage VCM 1.125 - 1.375 V (5)
LVDS Differential Input Voltage |VID| 100 - 600 mV (5)
Terminating Resistor RT - 100 - Ohm Power per EBL WG P
- 1.04 - W (4)
EBL
Note (1) The ambient temperature is Ta = 25 ± 2 ºC.
Value
Unit Note
W
V
CM
V
CM
(3)b
(5),
=1.2V
(5)
=1.2V
Note (2) I
I
: the maximum current when VCC is rising
RUSH
: the maximum current of the first 100ms after power-on
IS
Measurement Conditions: Shown as the following figure. Test pattern: black.
+3.3V
www.jxlcd.com
www.jxlcd.com
R1
47K
Q1
2SK147
5
FUSE
(High to Low)
(Control Signal)
SW
+12V
C1
R2
1K
VR1
1u
F
47K
0.01uF
Q2
2SK1470
C
2
C3
1uF
Vcc
(LCD Module Input)
7 / 29
Version 3.1
Page 8
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
Hz, whereas a power dissipation check pattern below is displayed.
a. White Pattern
Vcc rising time is 470us
b. Black Pattern
= 60
v
www.jxlcd.com
Note (4) The specified power are the sum of LCD panel electronics input power and the converter input
www.jxlcd.com
Active Area
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
= 60 Hz,
v
Active Area
8 / 29
Version 3.1
Page 9
Note (5) The parameters of LVDS signals are defined as the following figures.
|
|
CM
V
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
VID|
Single Ended
Differential
0V
V
VID|
0V
V
3.2 BACKLIGHT UNIT
Parameter Symbol
LED Light Bar Power
Supply Voltage
LED Light Bar Power
Supply Current
Power Consumption PL 1.197 1.344 1.499 W (3), (Duty 100%)
LED Life Time LBL 12000 -- -- Hrs (4)
Note (1) LED light bar configuration is shown as below.
www.jxlcd.com
www.jxlcd.com
V
21 22.4 23.8 V
L
I
57 60 63 mA
L
Min. Typ. Max.
Value
Ta = 25 ± 2 ºC
Unit Note
(1),(2) (Duty 100%)
Note (2) For better LED light bar driving quality, it is recommended to utilize the adaptive boost converter with current
balancing function to drive LED light-bar.
Note (3) P
Note (4) The lifetime of LED is defined as the time when it continues to operate under the conditions at Ta = 25 ±2
= I
L
L
and I
= 20 mA(Per EA) until the brightness becomes ≦ 50% of its original value.
L
×V
Light Bar Feedback
Channels
L
V
L, IL
LED
Light Bar
o
C
9 / 29
Version 3.1
Page 10
4. BLOCK DIAGRAM
p
4.1 TFT LCD MODULE
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
LVDS Display
Data & Clock
Converter
ut Signals
In
Data
CLK
V
EDID
VCC
GND
EDID
EDID
LVDS INPUT / TIMING
CONTROLLER
INPUT CONNECTOR
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
www.jxlcd.com
www.jxlcd.com
EDID
EEPROM
LED
CONVERTER
SCAN DRIVER IC
BACKLIGHT UNIT
TFT LCD PANEL
DA TA DRIVER IC
10 / 29
Version 3.1
Page 11
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol Description Polarity Remark
1 GND Ground
2 VCC Power Supply (+3.3V typ.)
3 VCC Power Supply (+3.3V typ.)
4 V
5 NC
6 CLK
7 DATA
8 Rxin0- LVDS Differential Data Input Negative
9 Rxin0+ LVDS Differential Data Input Positive
10 GND Ground
11 Rxin1- LVDS Differential Data Input Negative
12 Rxin1+ LVDS Differential Data Input Positive
13 GND Ground
14 Rxin2- LVDS Differential Data Input Negative
15 Rxin2+ LVDS Differential Data Input Positive
16 GND Ground
17 CLK- LVDS Clock Data Input Negative
18 CLK+ LVDS Clock Data Input Positive
19 GND Ground
20 NC No Connection
21
22 GND Ground
23 NC No Connection
24 NC No Connection
25 GND Ground
26 NC No Connection
27 NC No Connection
28 GND Ground
29 LED_VCCS LED Power
30 LED_VCCS LED Power
31 LED_GND LED Ground
32 LED_GND LED Ground
33 LED_GND LED Ground
34 NC No Connection
35 NC No Connection
36 NC No Connection
37 NC No Connection
38 LED_PWM PWM Control Signal of LED Converter (3)
39 NC No Connection
40 NC No Connection
Note (1) Connector Part No.: STM MSAK24024P40 or equivalent
EDID
EDID
EDID
NC
www.jxlcd.com
www.jxlcd.com
EDID power (+3.3V typ.) DDC 3.3V Power
No Connection (Reserved for CMO
test)
EDID clock DDC Clock
EDID data DDC Data
No Connection
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
R0~R5,G0
G1~G5,B0,B1
B2~B5,DE,Hsync,Vsync
LVDS Level Clock
Note (2) User’s connector Part No: I-PEX 20345-040T-31 or equivalent
Note (3) BLU brightness is proportion to the duty of LED_PWM signal.
Note (4) The first pixel is odd as shown in the following figure.
11 / 29
Version 3.1
Page 12
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
5.2 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
Rxin2
Rxin1
Rxin0
T/7
IN20 IN19 IN18 IN17 IN16 IN15 IN14
DE B5 B4 B3 B2 Vsync Hsync
IN13 IN12 IN11 IN10 IN9 IN8 IN7
B1 G4 G3 G2 G1 B0 G5
www.jxlcd.com
www.jxlcd.com
IN6 IN5 IN4 IN3 IN2 IN1 IN0
G0 R3 R2 R1 R0 R5 R4
Signal for 1 DCLK Cycle (T)
12 / 29
Version 3.1
Page 13
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
5.3 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Data Signal
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)
:
:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)
:
:
Green(61)
www.jxlcd.com
www.jxlcd.com
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)
:
:
Blue(61)
Blue(62)
Blue(63)
0
1
0
0
0
1
1
1
0
0
0
:
:
1
1
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
Red Green Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
1
1
1
0
1
0
0
0
:
:
0
0
0
0
0
0
:
:
0
0
0
0
1
0
:
:
1
0
1
13 / 29
Version 3.1
Page 14
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
5.4 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte #
(decimal)
10 0A ID product code (N089L6-L03) 09 00001001
11 0B ID product code (hex LSB first; N089L6-L03) 03 00000011
12 0C ID S/N (fixed “0”) 00 00000000
13 0D ID S/N (fixed “0”) 00 00000000
14 0E ID S/N (fixed “0”) 00 00000000
15 0F ID S/N (fixed “0”) 00 00000000
16 10 Week of manufacture (fixed week code) 2D 00101101
17 11 Year of manufacture (fixed year code) 12 00010010
18 12 EDID structure version # (“1”) 01 00000001
19 13 EDID revision # (“3”) 03 00000011
20 14 Video I/P definition (“digital”) 90 10010000
21 15 Max H image size (“21.3cm”) 15 00010101
22 16 Max V image size (“12.9cm”) 0C 00001100
23 17 Display Gamma (Gamma = ”2.2”) 78 01111000
24 18 Feature support (“Active off, RGB Color”) 0A 00001010
25 19 Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0 B9 10111001
26 1A Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0 85 10000101
27 1B Rx=0.584 95 10010101
28 1C Ry=0.362 5C 01011100
29 1D Gx=0.350 59 01011001
30 1E Gy=0.583 95 10010101
31 1F Bx=0.154 27 00100111
32 20 By=0.105 1B 00011011
33 21 Wx=0.313 50 01010000
34 22 Wy=0.329 54 01010100
35 23 Established timings 1 00 00000000
36 24 Established timings 2 00 00000000
37 25 Manufacturer’s reserved timings 00 00000000
38 26 Standard timing ID # 1 01 00000001
39 27 Standard timing ID # 1 01 00000001
40 28 Standard timing ID # 2 01 00000001
41 29 Standard timing ID # 2 01 00000001
Byte #
(hex)
0 0 Header 00 00000000
1 1 Header FF 11111111
2 2 Header FF 11111111
3 3 Header FF 11111111
4 4 Header FF 11111111
5 5 Header FF 11111111
6 6 Header FF 11111111
7 7 Header 00 00000000
8 8 EISA ID manufacturer name (“CMO”) 0D 00001101
9 9 EISA ID manufacturer name (Compressed ASCII) AF 10101111
www.jxlcd.com
www.jxlcd.com
Field Name and Comments
Value
(hex)
Value
(binary)
14 / 29
Version 3.1
Page 15
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
Byte #
(decimal)
42 2A Standard timing ID # 3 01 00000001
43 2B Standard timing ID # 3 01 00000001
44 2C Standard timing ID # 4 01 00000001
45 2D Standard timing ID # 4 01 00000001
46 2E Standard timing ID # 5 01 00000001
47 2F Standard timing ID # 5 01 00000001
48 30 Standard timing ID # 6 01 00000001
49 31 Standard timing ID # 6 01 00000001
50 32 Standard timing ID # 7 01 00000001
51 33 Standard timing ID # 7 01 00000001
52 34 Standard timing ID # 8 01 00000001
53 35 Standard timing ID # 8 01 00000001
54 36
55 37 # 1 Pixel clock (hex LSB first) 11 00010001
56 38 # 1 H active (“1024”) 00 00000000
57 39 # 1 H blank (“176”) B0 10110000
58 3A # 1 H active : H blank (“1024 : 176”) 40 01000000
59 3B # 1 V active (”600”) 58 01011000
60 3C # 1 V blank (”25”) 19 00011001
61 3D # 1 V active : V blank (”600 :25”) 20 00100000
62 3E # 1 H sync offset (”53”) 35 00110101
63 3F # 1 H sync pulse width ("35”) 23 00100011
64 40 # 1 V sync offset : V sync pulse width (”3 : 6”) 36 00110110
65 41
66 42 # 1 H image size (”195 mm”) C3 11000011
67 43 # 1 V image size (”113mm”) 71 01110001
68 44 # 1 H image size : V image size (”195 : 113”) 00 00000000
69 45 # 1 H boarder (”0”) 00 00000000
70 46 # 1 V boarder (”0”) 00 00000000
71 47
72 48 Detailed timing description # 2 00 00000000
73 49 # 2 Flag 00 00000000
74 4A # 2 Reserved 00 00000000
75 4B
76 4C # 2 Flag 00 00000000
77 4D # 2 1st character of name (“N”) 4E 01001110
78 4E # 2 2nd character of name (“0”) 30 00110000
79 4F # 2 3rd character of name (“8”) 38 00111000
80 50 # 2 4th character of name (“9”) 39 00111001
81 51 # 2 5th character of name (“L”) 4C 01001100
82 52 # 2 6th character of name (“6”) 36 00110110
83 53 # 2 7th character of name (“-”) 2D 00101101
84 54 # 2 8th character of name (“L”) 4C 01001100
Byte #
(hex)
Detailed timing description # 1 Pixel clock (“45MHz”, According to
VESA CVT Rev1.1)
www.jxlcd.com
# 1 H sync offset : H sync pulse width : V sync offset : V sync width
www.jxlcd.com
(”53: 35 : 3 : 6”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
Negatives
# 2 FE (hex) defines ASCII string (Model Name “N089L6-L03”,
ASCII)
Field Name and Comments
Value
(hex)
94 10010100
00 00000000
18 00011000
FE 11111110
Value
(binary)
15 / 29
Version 3.1
Page 16
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
Byte #
(decimal)
85 55
86 56 # 2 10th character of name (“3”) 33 00110011
87 57 # 2 New line character indicates end of ASCII string 0A 00001010
88 58 # 2 Padding with “Blank” character 20 00100000
89 59 # 2 Padding with “Blank” character 20 00100000
90 5A Detailed timing description # 3 00 00000000
91 5B # 3 Flag 00 00000000
92 5C # 3 Reserved 00 00000000
93 5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII) FE 11111110
94 5E # 3 Flag 00 00000000
95 5F # 3 1st character of string (“C”) 43 01000011
96 60 # 3 2nd character of string (“M”) 4D 01001101
97 61 # 3 3rd character of string (“O”) 4F 01001111
98 62 # 3 New line character indicates end of ASCII string 0A 00001010
99 63 # 3 Padding with “Blank” character 20 00100000
100 64 # 3 Padding with “Blank” character 20 00100000
101 65 # 3 Padding with “Blank” character 20 00100000
102 66 # 3 Padding with “Blank” character 20 00100000
103 67 # 3 Padding with “Blank” character 20 00100000
104 68 # 3 Padding with “Blank” character 20 00100000
105 69 # 3 Padding with “Blank” character 20 00100000
106 6A # 3 Padding with “Blank” character 20 00100000
107 6B # 3 Padding with “Blank” character 20 00100000
108 6C Detailed timing description # 4 00 00000000
109 6D # 4 Flag 00 00000000
110 6E # 4 Reserved 00 00000000
111 6F
112 70 # 4 Flag 00 00000000
113 71 # 4 1st character of name (“N”) 4E 01001110
114 72 # 4 2nd character of name (“0”) 30 00110000
115 73 # 4 3rd character of name (“8”) 38 00111000
116 74 # 4 4th character of name (“9”) 39 00111001
117 75 # 4 5th character of name (“L”) 4C 01001100
118 76 # 4 6th character of name (“6”) 36 00110110
119 77 # 4 7th character of name (“-”) 2D 00101101
120 78 # 4 8th character of name (“L”) 4C 01001100
121 79 # 4 9th character of name (“0”) 30 00110000
122 7A # 4 10th character of name (“3”) 33 00110011
123 7B # 4 New line character indicates end of ASCII string 0A 00001010
124 7C # 4 Padding with “Blank” character 20 00100000
125 7D # 4 Padding with “Blank” character 20 00100000
126 7E Extension flag 00 00000000
127 7F Checksum 84 10000100
Byte #
(hex)
# 2 9th character of name (“0”) 30 00110000
www.jxlcd.com
www.jxlcd.com
# 4 FE (hex) defines ASCII string (Model Name“N089L6-L03”,
ASCII)
Field Name and Comments
Value
(hex)
FE 11111110
Value
(binary)
16 / 29
Version 3.1
Page 17
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
6. CONVERTER SPECIFICATION
6.1 ABSOLUTE MAXIMUM RATINGS
Symbol Ratings
LED_VCCS -0.3V ~ 6.0V
LED_PWM -0.3V ~ 6.0V
6.2 RECOMMENDED OPERATING RATINGS
Parameter Symbol
Converter Input power supply voltage LED_VCCS 4.5 5.0 5.5 V
PWM Control Level
PWM Control Duty Ratio 0 - 100 %
PWM Control Frequency f
PWM Control Permissive Ripple Voltage
Converter Input Current
Note (1) The specified LED power supply current is under the conditions at “LED_VCCS = Min, Typ, Max”,
PWM High Level 2.4 - 5.0 V
PWM Low Level
Vin=Min. 355 375 395 mA (1)
Vin=Typ. 310 329 350 mA (1)
Vin=Max.
LED_PWM
200 210 40K Hz
PWM
VPWM_pp
I
LED
Min. Typ. Max.
0 - 0.5 V
100 mV
280 296 310 mA (1)
Value
Unit Note
Approval
Ta = 25 ± 2 ºC, f
= 200 Hz, Duty=100%.
PWM
6.3 LED BACKLIGHT CONTROLL POWER SEQUENCE
www.jxlcd.com
www.jxlcd.com
Power On Power Off
100%
LED_VCCS
0V
TA
TB
Timing Specifications:
Note (1) Please follow the LED backlight power sequence as above. If the customer could not follow, it might
LED_PWM
T
≧ 0ms
A
T
≧ 0ms
B
0V
cause backlight flash issue during display ON/OFF or damage the LED backlight controller
17 / 29
Version 3.1
Page 18
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
7. INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
DCLK Frequency 1/Tc 40.5 45 47.25 MHz -
Vertical Total Time TV 610 625 768 TH -
Vertical Active Display Period TVD 600 600 600 TH -
DE
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.
(2) 1 channel LVDS input.
Vertical Active Blanking Period TVB TV-TVD 25 TV-TVD TH
Horizontal Total Time TH 1100 1200 1344 Tc (2)
Horizontal Active Display Period THD 1024 1024 1024 Tc (2)
Horizontal Active Blanking Period THB
TH-THD
176
TH-THD
Tc (2)
Approval
INPUT SIGNAL TIMING DIAGRAM
DE
DCLK
www.jxlcd.com
www.jxlcd.com
DE
DATA
TC
T
HD
18 / 29
Version 3.1
Page 19
7.2 POWER ON/OFF SEQUENCE
Power On
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
Restart
Power Off
- Power Supply
for LCD, Vcc
- LVDS Interface
- Power for Backlight
Timing Specifications:
0.5 ≦t1 ≦10 ms
0 ≦ t2 ≦ 50 ms
0 ≦ t3 ≦ 50 ms
Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be
www.jxlcd.com
0V
0V
t4 ≧ 500 ms
t5 ≧ 200 ms
t6 ≧ 200 ms
www.jxlcd.com
10%
90%
t1
90%
Valid Data
t6 t5
50% 50%
ON OFF OFF
t7
10%
t4
t3 t2
10%
damaged.
Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be
sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight converter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight converter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To avoid
this phenomenon, we suggest that the Vcc falling time is better to follow 50us t7≦≦10 ms.
19 / 29
Version 3.1
Page 20
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
8. OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta 25±2
Ambient Humidity Ha 50±10 %RH
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Light Bar Input Current IL
60
The measurement methods of optical characteristics are shown in Section 8.2. The following items
should be measured under the test conditions described in Section 8.1 and stable environment shown in
o
C
mA
Note (5).
8.2 OPTICAL SPECIFICATIONS
The relative measurement methods of optical characteristics are shown in 8.2. The following items
should be measured under the test conditions described in 8.1 and stable environment shown in Note (5).
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 300 400 - - (2), (5)
Response Time
Average Luminance of White L5p 160 200 - cd/m2(4), (5)
Luminance Non-Uniformity δW
Red
www.jxlcd.com
www.jxlcd.com
Color
Chromaticity
Viewing Angle
Green
Blue
White
Horizontal
Vertica l
TR - 3 8 ms
- 7 12 ms
T
F
-
5p
θ
=0°, θY =0°
Rx 0.571 Ry 0.360 Gx 0.351 Gy
Bx 0.156 By 0.118 -
Wx 0.313 -
Wy
θ
+ 60 70 -
x
θ
- 60 70 -
x
θ
+ 50 60 -
Y
θ
-
Y
x
Viewing Normal
Angle
TYP
-0.05
CR≥10
50 60 -
-
0.573
0.329
1.4 (5), (6)
TYP
+0.05
-
-
Deg.
(3)
(1), (5)
20 / 29
Version 3.1
Page 21
Note (1) Definition of Viewing Angle (θx, θy):
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
Note (2) Definition of Contrast Ratio (CR):
θX- = 90º
6 o’clock
θ
y- = 90º
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
x-
y-
Normal
θx = θy = 0º
θy- θy+
θx−
θx+
12 o’clock direction
y+
θ
y+ = 90º
x+
θX+ = 90º
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
www.jxlcd.com
CR = CR (1)
www.jxlcd.com
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
R
T
R
66.67 ms
, TF):
T
F
66.67 ms
Time
21 / 29
Version 3.1
Page 22
Doc No.: 400029983
500
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6)
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
USB2000
AVE
):
CS-1000T
Center of the Screen
www.jxlcd.com
www.jxlcd.com
Light Shie ld Room
mm
(Ambient Luminance < 2 lux)
22 / 29
Version 3.1
Page 23
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 63 at 5 points
δW = { Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
Horizontal Line
Vertical Line
H/4
H/2
H
3H/4
www.jxlcd.com
www.jxlcd.com
W/4 W/2 3W/4
2 3
4
W
1
Active Area
: Test Point
X
X=1 to 5
5
23 / 29
Version 3.1
Page 24
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
9. PRECAUTIONS
9.1 SYSTEM MATCHING PRECAUTIONS
(1) Refer to the drawing.
(2) To avoid wireless noise interference, please keep the antenna away from LCD control board.
9.2 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not
to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
www.jxlcd.com
(10) Do not pull or fold the lamp wire.
(11) Pins of I/F connector should not be touched directly with bare hands.
9.3 STORAGE PRECAUTIONS
www.jxlcd.com
Approval
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
temperature.
9.4 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with converter. Do not disassemble the module or insert anything into the Backlight unit.
9.5 OTHER PRECAUTIONS
(1) When fixed patterns are displayed for a long time, remnant image is likely to occur.
24 / 29
Version 3.1
Page 25
10. PACKING
10.1 CARTON
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
LDPE04LDPE04LDPE
04
www.jxlcd.com
www.jxlcd.com
LDPE04LDPE04LDPE
04
Figure. 10-1 Packing method
25 / 29
Version 3.1
Page 26
10.2 PALLET
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
www.jxlcd.com
www.jxlcd.com
Figure. 10-2 Packing method
26 / 29
Version 3.1
Page 27
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
11. DEFINITION OF LABELS
11.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
N089L6-L03
XXXXX
H/W: XX
F/W: XX
(a) Model Name: N089L6 - L03
(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.
(c) Serial ID: X X
(d) Production Location: MADE IN XXXX. XXXX stands for production location.
www.jxlcd.com
Serial ID includes the information as below:
(a) Manufactured Date: Year: 1~9, for 2001~2009
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
ASUS revision code definitions as below:
www.jxlcd.com
X X X X X Y M D X N N N N
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1
st
Serial No.
CMO Internal Use
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
to 31st, exclude I , O and U
(a) Revision for H/W: XX, for example: A1, …, C1, C2 …etc.
(b) Revision for F/W: XX, for example: A1, …, C1, C2 …etc.
27 / 29
Version 3.1
Page 28
11.2 CMO CARTON LABEL
(a) Production location: Made In XXXX. XXXX stands for production location.
Doc No.: 400029983
Issued Date: Mar. 11, 2009
Model No.: N089L6 - L03
Approval
www.jxlcd.com
www.jxlcd.com
28 / 29
Version 3.1
Page 29
www.jxlcd.com
www.jxlcd.com
Loading...