Calling Line Identifier with VMWI 12 CMX612 Advance Information
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When no signal is present on the telephone line, RD will be at VSS and RT pulled to VDD by R5 so the output
of the Schmitt trigger 'B' will be low.
The ring signal is usually applied at the subscriber's exchange as an AC voltage inserted in series with one of
the telephone wires and will pass through either C3 and R3 or C4 and R4 to appear at the top end of R1
(point X in Figure 11) in a rectified and attenuated form.
The signal at point X will be further attenuated by the potential divider formed by R1 and R2 before being
applied to the CMX612 input RD. If the amplitude of the signal appearing at RD is greater than the input
threshold (Vt
HI
) of Schmitt trigger 'A' then the N transistor connected to RT will be turned on, pulling the
voltage at RT to V
SS
by discharging the external capacitor C5. The output of the Schmitt trigger 'B' will then
go high, activating the DET and/or
IRQ
outputs depending on the states of the MODE 1 and MODE 2 inputs.
The minimum amplitude ringing signal that is certain to be detected is:
RMSHI
V707.0
2R
3R2R1R
Vt7.0
¸
¹
·
¨
©
§
where Vt
HI
is the high-going threshold voltage of the Schmitt trigger A (see Section 6.1.3).
With R1, R3 and R4 all at 470k:, as Figure 2, setting R2 to 68k: will guarantee detection of ringing signals of
40V
RMS
and above for VDD over the range 2.7 to 5.5V.
A line polarity reversal may be detected using the same circuit but there will be only one pulse at RD. The
British Telecom specification SIN242 says that the circuit must detect a +15V to -15V reversal between the
two lines slewing in 30ms. For a linearly changing voltage at the input to C3 (or C4), then the voltage
appearing at the RD pin will be:
2Re13C
dt
dV
T
t
¸
¸
¹
·
¨
¨
©
§
where T = C3 x (R1 + R2 + R3) and dV/dt is the input slew rate.
For dV/dt = 500V/sec (15V in 30ms), R1, R3 and R4 all 470k: and C3, C4 both 0.1PF as Figure 2, then
setting R2 to 390k: will guarantee detection at V
DD
= 5.5V.
If the time constant of R5 and C5 is large enough then the voltage on RT will remain below the threshold of
the 'B' Schmitt trigger keeping the DET and/or
IRQ
outputs active for the duration of a ring cycle.
The time for the voltage on RT to charge from V
SS
towards VDD can be derived from the formula:
¸
¸
¹
·
¨
¨
©
§
5C5R
t
DDRT
e1VV
As the Schmitt trigger high-going input threshold voltage (Vt
HI
) has a minimum value of 0.56 x VDD, then the
Schmitt trigger B output will remain high for a time of at least 0.821 x R5 x C5 following a pulse at RD.
Using the values given in Figure 2 (470k: and 0.33PF) gives a minimum time of 100 ms (independent of
V
DD
), which is adequate for ring frequencies of 10Hz or above.
If necessary, the PC can distinguish between a ring and a reversal by timing the length of the
IRQ
or DET
output.
4.10 Xtal Osc and Clock Dividers
Frequency and timing accuracy of the CMX612 is determined by a 3.579545MHz clock present at the XTAL
pin. This may be generated by the on-chip oscillator inverter using the external components C1, C2 and X1
of Figure 2, or may be supplied from an external source to the XTAL input, in which case C1, C2 and X1
should not be fitted.
The oscillator is turned off in 'Zero-Power' mode.
If the clock is provided by an external source which is not always running, then the MODE 1 input must be set
high and the MODE 2 input must be set low when the clock is not available. Failure to observe this rule may
cause a significant rise in the supply current drawn by CMX612 as well as generating undefined states of the
RXD, DET and
IRQ
outputs.