Datasheet MX27C8000MC-10, MX27C8000MC-12, MX27C8000MC-15, MX27C8000PC-10, MX27C8000PC-12 Datasheet (MXIC)

FEATURES

MX27C8000

8M-BIT [1M x8] CMOS EPROM

• 1M x 8 organization

• Single +5V power supply

• +12.5V programming voltage

• Fast access time: 100/120/150 ns

• Totally static operation

• Completely TTL compatible

GENERAL DESCRIPTION

The MX27C8000 is a 5V only, 8M-bit, One Time
Programmable Read Only Memory. It is organized as 1M
words by 8 bits per word, operates from a single +5 volt
supply, has a static standby mode, and features fast
single address location programming. All programming
signals are TTL levels, requiring a single pulse. For
programming outside from the system, existing EPROM

PIN CONFIGURATIONS

32 PDIP/SOP

A19
A16
A15
A12

GND

A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23

MX27C8000

22
21
20
19
18
17

BLOCK DIAGRAM

VCC
A18
A17
A14
A13
A8
A9
A11
OE/VPP
A10
CE
Q7
Q6
Q5
Q4
Q3

32 PLCC

A12

A15

4

5

A7
A6
A5
A4

9

A3
A2
A1
A0
Q0

MX27C8000

13

14 17 20

Q1

Q2

A16

1

GND

A19

VCC

32

Q3Q4Q5

A18

A17

30

29

25

21

• Operating current: 60mA

• Standby current: 100uA

• Package type:

- 32 pin plastic DIP

- 32 pin PLCC/SOP

- 32 pin TSOP

programmers may be used. The MX27C8000 supports
a intelligent fast programming algorithm which can result
in programming time of less than two minutes.

This EPROM is packaged in industry standard 32 pin
dual-in-line packages, 32 lead PLCC, 32 lead TSOP and
32 lead SOP packages.

32 TSOP

32

1

A11

2

A9

3
A13
A14
A17
A18

VCC

A19
A16
A15
A12

A8

4

5

6

7

8

9

10

11

12

13

A7

14

A6

15

A5

16

A4

MX27C8000

A14
A13
A8
A9
A11
OE/VPP
A10
CE
Q7

Q6

PIN DESCRIPTION

OE/VPP

31

A10

30

CE

29

Q7

28

Q6

27

Q5

26

Q4

25

Q3

24

GND

23

Q2

22

Q1

21

Q0

20

A0

19

A1

18

A2

17

A3

CE

OE/VPP

A0~A19

ADDRESS

INPUTS

VCC
GND

P/N: PM00259

.
.
.
.
.
.
.
.

CONTROL

LOGIC

Y-DECODER

X-DECODER

OUTPUT

BUFFERS

Q0~Q7

SYMBOL PIN NAME

A0~A19 Address Input
Q0~Q7 Data Input/Output

.

Y-SELECT

.
.
.

8M BIT

.
.
.
.

CELL

MAXTRIX

CE Chip Enable Input
OE/VPP Output Enable Input/Program Supply Voltage
VCC Power Supply Pin (+5V)
GN D Ground Pin

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REV. 3.5, AUG. 20, 2001

MX27C8000

FUNCTIONAL DESCRIPTION

THE PROGRAMMING OF THE MX27C8000

When the MX27C8000 is delivered, or it is erased, the
chip has all 8M bits in the "ONE" or HIGH state. "ZEROs"
are loaded into the MX27C8000 through the procedure of
programming.

For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.

Vcc must be applied simultaneously or before Vpp, and
removed simultaneously or after Vpp. When
programming an MXIC EPROM, a 0.1uF capacitor is
required across Vpp and ground to suppress spurious
voltage transients which may damage the device.

FAST PROGRAMMING

The device is set up in the fast programming mode when
the programming voltage OE/VPP = 12.75V is applied,
with VCC = 6.25 V (Algorithm is shown in Figure 1). The
programming is achieved by applying a single TTL low
level 50us pulse to the CE input after addresses and data
line are stable. If the data is not verified, an additional
pulse is applied for a maximum of 25 pulses. This
process is repeated while sequencing through each
address of the device. When the programming mode is
completed, the data in all address is verified at VCC = 5V
± 10%.

PROGRAM INHIBIT MODE

Programming of multiple MX27C8000s in parallel with
different data is also easily accomplished by using the
Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX27C8000 may be common. A
TTL low-level program pulse applied to an MX27C8000
CE input with OE/VPP = 12.5 ± 0.5 Vwill program that
MX27C8000. A high-level CE input inhibits the other
MX27C8000s from being programmed.

PROGRAM VERIFY MODE

Verification should be performed on the programmed bits
to determine that they were correctly programmed. The
verification should be performed with OE /VPPand CE,
at VIL, data should be verified tDV after the falling edge
of CE.

AUTO IDENTIFY MODE

The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of automatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25°C ± 5°C ambient temperature range
that is required when programming the MX27C8000.

To activate this mode, the programming equipment must
force 12.0 ± 0.5 V on address line A9 of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line A0 from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.

Byte 0 ( A0 = VIL) represents the manufacturer code, and
byte 1 (A0 = VIH), the device identifier code. For the
MX27C8000, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
device codes will possess odd parity, with the MSB (Q7)
defined as the parity bit.

READ MODE

The MX27C8000 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to
the output pins, independent of device selection.
Assuming that addresses are stable, address access
time (tACC) is equal to the delay from CE to output (tCE).
Data is available at the outputs tOE after the falling edge
of OE's, assuming that CE has been LOW and addresses
have been stable for at least tACC - tOE.

STANDBY MODE

The MX27C8000 has a CMOS standby mode which
reduces the maximum VCC current to 100 uA. It is
placed in CMOS standby when CE is at VCC ± 0.3 V. The
MX27C8000 also has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mA. It is
placed in TTL-standby when CE is at VIH. When in
standby mode, the outputs are in a high-impedance
state, independent of the OE input.

P/N: PM00259

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REV. 3.5, AUG. 20, 2001

MX27C8000

TWO-LINE OUTPUT CONTROL FUNCTION

To accommodate multiple memory connections, a two­line control function is provided to allow for:

SYSTEM CONSIDERATIONS

During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude

1. Low memory power dissipation,

2. Assurance that output bus contention will not
occur.

of these transient current peaks is dependent on the
output capacitance loading of the device. At a minimum,
a 0.1 uF ceramic capacitor (high frequency, low inherent

inductance) should be used on each device between
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular

VCC and GND to minimize transient effects. In addition,

to overcome the voltage drop caused by the inductive

effects of the printed circuit board traces on EPROM

arrays, a 4.7 uF bulk electrolytic capacitor should be

used between VCC and GND for each eight devices. The

location of the capacitor should be close to where the

power supply is connected to the array.
memory device.

MODE SELECT TABLE

PINS

MODE CE OE/VPP A0 A9 OUTPUTS

Read VIL VIL X X DOUT
Output Disable VIL VIH X X High Z
Standby (TTL) VIH X X X High Z
Standby (CMOS) VCC±0.3V X X X High Z
Program VIL VPP X X DIN
Program Verify VIL VIL X X DOUT
Program Inhibit VIH VPP X X High Z
Manufacturer Code(3) VIL VIL VIL VH C2H
Device Code(3) VIL VIL VIH VH 80H

NOTES: 1. VH = 12.0 V ± 0.5 V

2. X = Either VIH or VIL

P/N: PM00259

3. A1 - A8 = A10 - A19 = VIL(For auto select)

4. See DC Programming Characteristics for VPP voltage during
programming.

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REV. 3.5, AUG. 20, 2001

FIigure 1. FAST PROGRAMMING FLOW CHART

ADDRESS = FIRST LOCATION

VCC = 6.25V

OE/VPP = 12.75V

PROGRAM ONE 50 us PULSE

MX27C8000

START

INCREMENT ADDRESS

INCREMENT ADDRESS

NO

LAST

ADDRESS ?

YES

PASS

NO

ADDRESS = FIRST LOCATION

PROGRAM ONE 50us PULSE

LAST

ADDRESS ?

X = 0

VERIFY BYTE

VCC = 5.25V

OE/VPP = VIL

COMPARE

ALL BYTES

TO ORIGINAL

DATA

DEVICE PASSED

YES

PASS

FAIL

NO

FAIL

INCREMENT X

X = 25 ?

YES

DEVICE FAILED

P/N: PM00259

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REV. 3.5, AUG. 20, 2001

SWITCHING TEST CIRCUITS

MX27C8000

DEVICE
UNDER

TEST

CL = 100 pF including jig capacitance(60pF for 100ns parts)

SWITCHING TEST WAVEFORMS

AC driving levels

AC TESTING: AC driving levels are 2.4V/0.4V for commercial grade.

CL

6.2K ohm

2.0V
TEST POINTS

0.8V

INPUT

Input pulse rise and fall times are < 10ns.

1.8K ohm
+5V

DIODES = IN3064
OR EQUIVALENT

2.0V

0.8V
OUTPUT

P/N: PM00259

5

REV. 3.5, AUG. 20, 2001

MX27C8000

ABSOLUTE MAXIMUM RATINGS

RATING VALUE

Ambient Operating Temperature 0oC to 70oC
Storage Temperature -65oC to 125oC
Applied Input Voltage -0.5V to 7.0V
Applied Output Voltage -0.5V to VCC + 0.5V
VCC to Ground Potential -0.5V to 7.0V
V9 & VPP -0.5V to 13.5V

NOTICE:

Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended period may affect reliability.

NOTICE:

Specifications contained within the following tables are subject to
change.

DC/AC Operating Condition for Read Operation

MX27C8000

-10 -12 -15

Operationg Temperature Commercial 0°C to 55°C0°C to 70 °C0°C to 70°C
Vcc Power Supply 5V ± 10% 5V ± 10% 5V ± 10%

DC CHARACTERISTICS

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

VO H Output High Voltage 2.4 V IOH = -0.4mA
VOL Output Low Voltage 0.4 V IOL = 2.1mA
VIH Input High Voltage 2.0 VCC + 0.5 V
VIL Input Low Voltage -0.3 0.8 V
ILI Input Leakage Current -10 10 uA VIN = 0 to 5.5V
ILO Output Leakage Current -10 1 0 uA VOUT = 0 to 5.5V
ICC3 VCC Power-Down Current 100 uA CE = VCC ± 0.3V
ICC2 VCC Standby Current 1.5 mA CE = VIH
ICC1 VCC Active Current 60 mA CE = VIL, f=5MHz, Iout = 0mA
IPP VPP Supply Current Read 10 uA CE = OE = VIL, VPP = 5.5V

CAPACITANCE TA = 25

SYMBOL PARAMETER TYP. MAX. UNIT CONDITIONS

CIN Input Capacitance 8 12 pF VIN = 0V
COUT Output Capacitance 8 12 p F VOUT = 0V
CVPP VPP Capacitance 18 25 pF VPP = 0V

P/N: PM00259

o

C, f = 1.0 MHz (Sampled only)

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REV. 3.5, AUG. 20, 2001

MX27C8000

AC CHARACTERISTICS

27C8000-10 27C8000-12 27C8000-15

SYMBOL PARAMETER MIN. MAX. MIN. MAX. MIN. MAX. UNIT CONDITIONS

tACC Address to Output Delay 100 120 150 ns CE = OE = VIL
tCE Chip Enable to Output Delay 100 120 150 ns OE = VIL
tOE Output Enable to Output Delay 40 50 65 ns CE = VIL
tDF OE High to Output Float, 0 30 0 35 0 50 ns

or CE High to Output Float

tO H Output Hold from Address, 0 0 0 n s

CE or OE which ever occurred first

DC PROGRAMMING CHARACTERISTICS TA = 25

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

VO H Output High Voltage 2.4 V IOH = -0.40mA
VOL Output Low Voltage 0.4 V IOL = 2.1mA
VIH Input High Voltage 2.0 VCC + 0.5 V
VIL Input Low Voltage -0.3 0.8 V
ILI Input Leakage Current -10 1 0 uA VIN = 0 to 5.5V
VH A9 Auto Select Voltage 11.5 12.5 V
ICC3 VCC Supply Current (Program & Verify) 50 mA
IPP2 VPP Supply Current(Program) 30 mA CE = VIL
VCC1 Fast Programming Supply Voltage 6.00 6.50 V
VPP1 Fast Programming Voltage 12.5 13.0 V

AC PROGRAMMING CHARACTERISTICS TA = 25

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

tAS Address Setup Time 2.0 us
tDS Data Setup Time 2.0 us
tAH Address Hold Time 0 us
tDH Data Hold Time 2.0 us
tDFP Chip Enable to Output Float Delay 0 130 ns
tVPS VPP Setup Time 2.0 us
tPW CE Program Pulse Width 50 us
tVCS VCC Setup Time 2.0 u s
tDV Data Valid from CE 150 n s
tOEH OE/VPP Hold Time 2.0 us
tVR OE/VPP Recovery Time 2.0 u s

o

C ± 5oC

o

C ± 5oC

P/N: PM00259

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REV. 3.5, AUG. 20, 2001

WAVEFORMS

READ CYCLE

MX27C8000

ADDRESS

INPUTS

tACC

DATA ADDRESS

CE

tCE

OE

DATA

OUT

tOE

FAST PROGRAMMING ALGORITHM WAVEFORMS

PROGRAM

Addresses

VIH

VIL

tAS

tDF

VALID DATA

tOH

PROGRAM VERIFY

Hi-z

DATA

OE/VPP

CE

VCC

VPP1

VIL

VIH

VIL

VCC1

VCC

tDS

tVPS

tVCS

tPW

tDH

tVPS

tVR

tDV

DATA OUT VALID

tDFP

tAH

P/N: PM00259

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REV. 3.5, AUG. 20, 2001

MX27C8000

ORDERING INFORMATION

PLASTIC PACKAGE

PART NO. ACCESS TIME(ns) OPERATING CURRENT MAX.(mA) STANDBY CURRENT MAX.(uA) PACKAGE

MX27C8000PC-10 100 60 100 32 Pin DIP
MX27C8000QC-10 100 60 100 32 Pin PLCC
MX27C8000MC-10 100 60 100 32 Pin SOP
MX27C8000TC-10 100 60 100 32 Pin TSOP
MX27C8000PC-12 120 60 100 32 Pin DIP
MX27C8000QC-12 120 60 100 32 Pin PLCC
MX27C8000MC-12 120 60 100 32 Pin SOP
MX27C8000TC-12 120 60 100 32 Pin TSOP
MX27C8000PC-15 150 60 100 32 Pin DIP
MX27C8000QC-15 150 60 100 32 Pin PLCC
MX27C8000MC-15 150 60 100 32 Pin SOP
MX27C8000TC-15 150 60 100 32 Pin TSOP

P/N: PM00259

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REV. 3.5, AUG. 20, 2001

PACKAGE INFORMATION

32-PIN PLASTIC DIP(600 mil)

MX27C8000

P/N: PM00259

10

REV. 3.5, AUG. 20, 2001

32-PIN PLASTIC SOP(450 mil)

MX27C8000

P/N: PM00259

11

REV. 3.5, AUG. 20, 2001

32-PIN PLASTIC LEADED CHIP CARRIER (PLCC)

MX27C8000

P/N: PM00259

12

REV. 3.5, AUG. 20, 2001

32-PIN PLASTIC TSOP

MX27C8000

P/N: PM00259

13

REV. 3.5, AUG. 20, 2001

MX27C8000

REVISION HISTORY

Revision No. Description Page Date

2.0 1) Eliminate Interactive Programming Mode. 5/30/1997

2) Programming pulse change from 100us to 50us.

3.0 1)Partial specification change for 100ns speed grade 7/18/1997
1-1) SWITCHING TEST Condition CL = 100pF---> CL = 60pF
1-2) Operating Temperature 0°C to 70°C ----> 0°C to 55°C
1-3) Vcc, 5V ± 10%----> 5V ± 5%

2)IPP1 100uA ----> 10uA.

3.1 1)Partial specification change for 100ns speed grade, 12/19/1997
VCC:5V ± 5% ----->5V ± 10%

3.2 Added 32pin TSOP package type P1,12 OCT/20/1999

3.3 Correcting Ordering Information P9 OCT/21/1999

3.4 Cancel ceramic DIP package type P1,2,9,10 MAR/02/2000

3.5 Cancel "Ultraviolet Erasable" wording in General Description P1 AUG/20/2001
To modify Package Information P10~13

P/N: PM00259

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REV. 3.5, AUG. 20, 2001

MX27C8000

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