Datasheet MX27C8000AMC-10, MX27C8000AMC-12, MX27C8000AMC-15, MX27C8000AMC-90, MX27C8000AMI-10 Datasheet (MXIC)

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FEATURES
ADVANCE INFORMATION
MX27C8000A
8M-BIT [1M x8] CMOS EPROM
1M x 8 organization
+12.5V programming voltage
Fast access time: 90/100/120/150 ns
Totally static operation
Completely TTL compatible
GENERAL DESCRIPTION
The MX27C8000A is a 5V only, 8M-bit, ultraviolet Eras­able Programmable Read Only Memory. It is organized as 1M words by 8 bits per word, operates from a single +5 volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming outside from the system, existing EPROM
PIN CONFIGURATIONS 32 PDIP/SOP
A19 A16 A15 A12
GND
A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
MX27C8000A
VCC
32
A18
31
A17
30
A14
29
A13
28
A8
27
A9
26
A11
25
OE/VPP
24
A10
23
CE
22
Q7
21
Q6
20
Q5
19
Q4
18
Q3
17
Operating current: 60mA
Standby current: 100uA
Package type:
- 32 pin plastic DIP
- 32 pin PLCC
- 32 pin SOP
- 32 pin TSOP
programmers may be used. The MX27C8000A supports a intelligent fast programming algorithm which can result in programming time of less than two minutes.
This EPROM is packaged in industry standard 32 pin dual-in-line packages, 32 lead PLCC, 32 lead SOP and 32 lead TSOP packages.
32 PLCC
A12
A15
A16
A19
VCC
A18
A17
4
5
A7 A6 A5 A4
9
A3 A2 A1 A0
13
Q0
14 17 20
Q1
1
32
MX27C8000A
Q2
Q3Q4Q5
GND
30
A14
29
A13 A8 A9 A11
25
OE/VPP A10 CE Q7
21
Q6
32 TSOP
A11
A13 A14 A17 A18
VCC
A19 A16 A15 A12
P/N: PM00764
1 2
A9
3
A8
4 5 6 7 8 9 10 11 12 13
A7
14
A6
15
A5
16
A4
MX27C8000A
PIN DESCRIPTION
32
OE/VPP
31
A10
30
CE
29
Q7
28
Q6
27
Q5
26
Q4
25
Q3
24
GND
23
Q2
22
Q1
21
Q0
20
A0
19
A1
18
A2
17
A3
SYMBOL PIN NAME
A0~A19 Address Input Q0~Q7 Data Input/Output CE Chip Enable Input OE/VPP Output Enable Input/Program Supply
Voltage VC C Power Supply Pin (+5V) GN D Ground Pin
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MX27C8000A
BLOCK DIAGRAM
CE
OE/VPP
A0~A19
ADDRESS
INPUTS
VCC GND
. . . . . . . .
CONTROL
LOGIC
Y-DECODER
X-DECODER
OUTPUT
BUFFERS
.
Y-SELECT
. . .
8M BIT
. . . .
CELL
MAXTRIX
Q0~Q7
FUNCTIONAL DESCRIPTION
THE PROGRAMMING OF THE MX27C8000A
When the MX27C8000A is delivered, or it is erased, the chip has all 8M bits in the "ONE" or HIGH state. "ZEROs" are loaded into the MX27C8000A through the procedure of programming.
For programming, the data to be programmed is applied with 8 bits in parallel to the data pins.
Vcc must be applied simultaneously or before Vpp, and removed simultaneously or after Vpp. When programming an MXIC EPROM, a 0.1uF capacitor is required across Vpp and ground to suppress spurious voltage transients which may damage the device.
FAST PROGRAMMING
PROGRAM INHIBIT MODE
Programming of multiple MX27C8000As in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE and OE, all like inputs of the parallel MX27C8000A may be common. A TTL low-level program pulse applied to an MX27C8000A CE input with OE/VPP = 12.5 ± 0.5 Vwill program that MX27C8000A. A high-level CE input inhibits the other MX27C8000As from being programmed.
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits to determine that they were correctly programmed. The verification should be performed with OE /VPPand CE, at VIL, data should be verified tDV after the falling edge of CE.
AUTO IDENTIFY MODE
The auto identify mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and device type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the MX27C8000A.
To activate this mode, the programming equipment must force 12.0 ± 0.5 V on address line A9 of the device. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto identify mode.
The device is set up in the fast programming mode when the programming voltage OE/VPP = 12.75V is applied, with VCC = 6.25 V (Algorithm is shown in Figure 1). The programming is achieved by applying a single TTL low level 50us pulse to the CE input after addresses and data line are stable. If the data is not verified, an additional pulse is applied for a maximum of 25 pulses. This process is repeated while sequencing through each address of the device. When the programming mode is completed, the data in all address is verified at VCC = 5V ± 10%.
P/N: PM00764
Byte 0 ( A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device identifier code. For the MX27C8000A, these two identifier bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (Q7) defined as the parity bit.
READ MODE
The MX27C8000A has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and
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MX27C8000A
should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs tOE after the falling edge of OE's, assuming that CE has been LOW and addresses have been stable for at least tACC - tOE.
STANDBY MODE
The MX27C8000A has a CMOS standby mode which reduces the maximum VCC current to 100 uA. It is placed in CMOS standby when CE is at VCC ± 0.3 V. The MX27C8000A also has a TTL-standby mode which reduces the maximum VCC current to 1.5 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input.
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a two­line control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 uF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and GND to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 uF bulk electrolytic capacitor should be used between VCC and GND for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array.
MODE SELECT TABLE
PINS
MODE CE OE/VPP A0 A9 OUTPUTS
Read VI L VIL X X DOUT Output Disable VIL VIH X X High Z Standby (TTL) VIH X X X High Z Standby (CMOS) VCC ±0.3V X X X High Z Program VIL VPP X X DIN Program Verify VIL VIL X X DOUT Program Inhibit VIH VPP X X High Z Manufacturer Code(3) VIL VIL VIL VH C2 H Device Code(3) VIL VIL VIH VH 02 H
NOTES:
1. VH = 12.0 V ± 0.5 V
2. X = Either VIH or VIL
3. A1 - A8 = A10 - A19 = VIL (For auto select)
4. See DC Programming Characteristics for VPP voltage during programming
P/N: PM00764
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FIigure 1. FAST PROGRAMMING FLOW CHART
ADDRESS = FIRST LOCATION
VCC = 6.25V
OE/VPP = 12.75V
PROGRAM ONE 50 us PULSE
MX27C8000A
START
INCREMENT ADDRESS
INCREMENT ADDRESS
NO
LAST
ADDRESS ?
YES
PASS
NO
ADDRESS = FIRST LOCATION
PROGRAM ONE 50us PULSE
LAST
ADDRESS ?
X = 0
VERIFY BYTE
VCC = 5.25V
OE/VPP = VIL
COMPARE
ALL BYTES
TO ORIGINAL
DATA
DEVICE PASSED
YES
PASS
FAIL
NO
FAIL
INCREMENT X
X = 25 ?
YES
DEVICE FAILED
P/N: PM00764
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SWITCHING TEST CIRCUITS
MX27C8000A
DEVICE UNDER
TEST
SWITCHING TEST WAVEFORMS
AC driving levels
AC TESTING: AC driving levels are 2.4V/0.4V for commercial grade.
CL
6.2K ohm
CL = 100 pF including jig capacitance
2.0V TEST POINTS
0.8V
INPUT
Input pulse rise and fall times are < 10ns.
1.8K ohm +5V
DIODES = IN3064 OR EQUIVALENT
2.0V
0.8V OUTPUT
P/N: PM00764
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MX27C8000A
ABSOLUTE MAXIMUM RATINGS
RATING VALUE
Ambient Operating Temperature -40oC to 85oC Storage Temperature -65oC to 125oC Applied Input Voltage -0.5V to 7.0V Applied Output Voltage -0.5V to VCC + 0.5V VCC to Ground Potential -0.5V to 7.0V A9 & VPP -0.5V to 13.5V
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.
NOTICE:
Specifications contained within the following tables are sub­ject to change.
DC/AC OPERATING CONDITION FOR READ OPERATION
MX27C8000A
-90 -10 -12 -15
Operating Temperature Industrial -40°C to 85°C -40°C to 85°C -40°C to 85°C -40°C to 85°C Vcc Power Supply 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%
DC CHARACTERISTICS
SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS
VOH Output High Voltage 2.4 V IOH = -0.4mA VOL Output Low Voltage 0.4 V IOL = 2.1mA VIH Input High Voltage 2 .0 VCC + 0.5 V VIL Input Low Voltage -0.3 0.8 V ILI Input Leakage Current -10 10 uA VIN = 0 to 5.5V ILO Output Leakage Current -10 10 uA VOUT = 0 to 5.5V ICC3 VCC Power-Down Current 100 uA CE = VCC ± 0.3V ICC2 VCC Standby Current 1.5 mA CE = VIH ICC1 VCC Active Current 60 mA CE = VIL, f=5MHz, Iout = 0mA IPP VPP Supply Current Read 10 uA CE = OE = VIL, VPP = 5.5V
CAPACITANCE TA = 25
o
C, f = 1.0 MHz (Sampled only)
SYMBOL PARAMETER TYP. MAX. UNIT CONDITIONS
CIN Input Capacitance 8 12 pF VIN = 0V COUT Output Capacitance 8 12 pF VOUT = 0V CVPP VPP Capacitance 18 25 pF VPP = 0V
P/N: PM00764
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MX27C8000A
AC CHARACTERISTICS
27C8000A-90 27C8000A-10 27C8000A-12 27C8000A-15
Symbol PARAMETER MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. Unit Conditions
tACC Address to Output Delay 90 1 0 0 120 1 5 0 n s CE=OE=VIL tCE Chip Enable to Output Delay 9 0 1 00 12 0 15 0 ns OE=VIL tOE Output Enable to Output Delay 40 40 5 0 6 5 ns CE=VIL tDF OE High to Output Float, 0 30 0 30 0 35 0 50 ns
or CE High to Output Float
tOH Output Hold from Address,CE or 0 0 0 0 n s
OE which ever occurred first
o
DC PROGRAMMING CHARACTERISTICS TA = 25
SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS
VOH Output High Voltage 2.4 V IOH = -0.40mA VOL Output Low Voltage 0.4 V IOL = 2.1mA VIH Input High Voltage 2.0 VCC + 0.5 V VIL Input Low Voltage -0.3 0.8 V ILI Input Leakage Current -10 10 uA VIN = 0 to 5.5V VH A9 Auto Select Voltage 11.5 12.5 V ICC3 VCC Supply Current (Program & Verify) 5 0 mA IPP2 VPP Supply Current(Program) 30 mA CE = VIL VCC1 Fast Programming Supply Voltage 6.00 6.50 V VPP1 Fast Programming Voltage 12.5 13.0 V
C
±±
± 5oC
±±
o
AC PROGRAMMING CHARACTERISTICS TA = 25
C
±±
± 5oC
±±
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
tAS Address Setup Time 2.0 us tDS Data Setup Time 2.0 us tAH Address Hold Time 0 us tD H Data Hold Time 2.0 us tDFP Chip Enable to Output Float Delay 0 13 0 ns tVPS VPP Setup Time 2.0 us tPW CE Program Pulse Width 10 5 0 us tVCS VCC Setup Time 2.0 us tDV Data Valid from CE 15 0 ns tOEH OE/VPP Hold Time 2.0 us tVR OE/VPP Recovery Time 2.0 us
P/N: PM00764
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WAVEFORMS
READ CYCLE
MX27C8000A
ADDRESS
INPUTS
tACC
DATA ADDRESS
CE
tCE
OE
DATA
OUT
tOE
FAST PROGRAMMING ALGORITHM WAVEFORMS
PROGRAM
Addresses
VIH
VIL
tAS
tDF
VALID DATA
tOH
PROGRAM VERIFY
Hi-z
OE/VPP
P/N: PM00764
DATA
CE
VCC
VPP1
VIL
VIH
VIL
VCC1
VCC
tDS
tVPS
tVCS
tPW
tDH
tVPS
tDV
tVR
8
DATA OUT VALID
tDFP
tAH
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MX27C8000A
ORDERING INFORMATION
PLASTIC PACKAGE
PART NO. ACCESS TIME OPERATING STANDBY OPERATING PACKAGE
(ns) Current MAX.(mA) Current MAX.(uA) TEMPERATURE
MX27C8000APC-90 90 30 100 0°C to 70°C 32 Pin DIP MX27C8000AQC-90 90 3 0 100 0°C to 70°C 32 Pin PLCC MX27C8000AMC-90 90 30 100 0°C to 70°C 32 Pin SOP MX27C8000ATC-90 90 30 100 0°C to 70°C 32 Pin TSOP MX27C8000APC-10 1 0 0 30 100 0°C to 70°C 32 Pin DIP MX27C8000AQC-10 100 30 100 0°C to 70°C 32 Pin PLCC MX27C8000AMC-10 100 30 100 0°C to 70°C 32 Pin SOP MX27C8000ATC-10 100 30 100 0°C to 70°C 32 Pin TSOP MX27C8000APC-12 1 2 0 30 100 0°C to 70°C 32 Pin DIP MX27C8000AQC-12 120 30 100 0°C to 70°C 32 Pin PLCC MX27C8000AMC-12 120 30 100 0°C to 70°C 32 Pin SOP MX27C8000ATC-12 120 30 100 0°C to 70°C 32 Pin TSOP MX27C8000APC-15 1 5 0 30 100 0°C to 70°C 32 Pin DIP MX27C8000AQC-15 150 30 100 0°C to 70°C 32 Pin PLCC MX27C8000AMC-15 150 30 100 0°C to 70°C 32 Pin SOP MX27C8000ATC-15 150 30 100 0°C to 70°C 32 Pin TSOP MX27C8000API-90 90 30 1 00 -40°C to 85°C 32 Pin DIP MX27C8000AQI-90 90 30 100 -40°C to 85°C 32 Pin PLCC MX27C8000AMI-90 9 0 3 0 10 0 -40°C to 85°C 32 Pin SOP MX27C8000ATI-90 90 3 0 100 -40°C to 85 °C 32 Pin TSOP MX27C8000API-10 100 30 1 00 -40°C to 85°C 32 Pin DIP MX27C8000AQI-10 100 30 100 -40°C to 85°C 32 Pin PLCC MX27C8000AMI-10 10 0 30 1 00 -40°C to 85°C 32 Pin SOP MX27C8000ATI-10 10 0 30 100 -40°C to 85 °C 32 Pin TSOP MX27C8000API-12 120 30 1 00 -40°C to 85°C 32 Pin DIP MX27C8000AQI-12 120 30 100 -40°C to 85°C 32 Pin PLCC MX27C8000AMI-12 12 0 30 1 00 -40°C to 85°C 32 Pin SOP MX27C8000ATI-12 12 0 30 100 -40°C to 85 °C 32 Pin TSOP MX27C8000API-15 150 30 1 00 -40°C to 85°C 32 Pin DIP MX27C8000AQI-15 150 30 100 -40°C to 85°C 32 Pin PLCC MX27C8000AMI-15 15 0 30 1 00 -40°C to 85°C 32 Pin SOP MX27C8000ATI-15 15 0 30 100 -40°C to 85 °C 32 Pin TSOP
P/N: PM00764
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PACKAGE INFORMATION
32-PIN PLASTIC DIP(600 mil)
MX27C8000A
P/N: PM00764
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32-PIN PLASTIC LEADED CHIP CARRIER (PLCC)
MX27C8000A
P/N: PM00764
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32-PIN PLASTIC SOP (450 mil)
MX27C8000A
P/N: PM00764
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32-PIN PLASTIC TSOP
MX27C8000A
P/N: PM00764
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MX27C8000A
REVISION HISTORY
Revision No. Description Page Date
1.1 To change data sheet title to Advance Information P 1 MAR/15/2001 To added access time 90ns and 32SOP/TSOP type package P1,6,7,9,11 To changed ID Code from 35H to 02H P6
1.2 To modify Package Information P10~13 JUL/19/2001
P/N: PM00764
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MX27C8000A
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