Datasheet MX27C512TA-12, MX27C512TA-90, MX27C512TC-12, MX27C512TC-15, MX27C512TC-45 Datasheet (MXIC)

• Operating current: 30mA

• Standby current: 100uA

• Package type:

- 28 pin plastic DIP

- 32 pin PLCC

- 28 pin 8 x 13.4 mm TSOP(I)

1

PIN CONFIGURATIONS

PDIP

GENERAL DESCRIPTION

The MX27C512 is a 5V only, 512K-bit, ultraviolet Eras­able Programmable Read Only Memory. It is organized
as 64K words by 8 bits per word, operates from a single
+5volt supply, has a static standby mode, and features
fast single address location programming. All program­ming signals are TTL levels, requiring a single pulse. For
programming outside from the system, existing EPROM

programmers may be used. The MX27C512 supports
intelligent fast programming algorithm which can result
in programming time of less than fifteen seconds.

This EPROM is packaged in industry standard 28 pin
dual-in-line packages 32 lead PLCC, and 28 lead
TSOP(I) packages.

FEATURES

• 64K x 8 organization

• Single +5V power supply

• +12.5V programming voltage

• Fast access time: 45/55/70/90/100/120/150ns

• Totally static operation

• Completely TTL compatible

P/N: PM0235

REV. 4.5, NOV. 09, 2001

BLOCK DIAGRAM

PIN DESCRIPTION

PLCC

8 x 13.4mm 28TSOP(I)

SYMBOL PIN NAME

A0~A15 Address Input
Q0~Q7 Data Input/Output
CE Chip Enable Input
OE/VPP Output Enable Input/Program Supply

Voltage
NC No Internal Connection
VCC Power Supply Pin (+5V)
GND Ground Pin

MX27C512

512K-BIT [64Kx8] CMOS EPROM

1
2
3
4
5
6
7
8
9
10
11
12
13
14

A15
A12

A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2

GND

28
27
26
25
24
23
22
21
20
19
18
17
16
15

VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE
Q7
Q6
Q5
Q4
Q3

MX27C512

1

4

5

9

13

14 17 20

21

25

29

32

30

A8
A9
A11
NC
OE/VPP
A10
CE
Q7
Q6

A6
A5
A4
A3
A2
A1

A0
NC
Q0

Q1

Q2

GND

NC

Q3Q4Q5

A7

A12

A15NCVCC

A14

A13

MX27C512

OE/VPP

A11

A9

A8
A13
A14

VCC

A15
A12

A7

A6

A5

A4

A3

22
23
24
25
26
27
28
1
2
3
4
5
6
7

A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A1
A2

21
20
19
18
17
16
15
14
13
12
11
10

9
8

MX27C512

CONTROL

LOGIC

OUTPUT

BUFFERS

Q0~Q7

CE

OE/VPP

A0~A15

ADDRESS

INPUTS

Y-DECODER

X-DECODER

Y-SELECT

512K BIT

CELL

MAXTRIX

VCC
GND

.
.
.
.
.
.
.
.

.
.
.
.
.
.
.
.

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REV. 4.5, NOV. 09, 2001

MX27C512

AUTO IDENTIFY MODE

The auto identify mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of
automatically matching the device to be programmed
with its corresponding programming algorithm. This
mode is functional in the 25°C ± 5°C ambient
temperature range that is required when programming
the MX27C512.

To activate this mode, the programming equipment
must force 12.0 ± 0.5(VH) on address line A9 of the
device. Two identifier bytes may then be sequenced
from the device outputs by toggling address line A0 from
VIL to VIH. All other address lines must be held at VIL
during auto identify mode.

Byte 0 ( A0 = VIL) represents the manufacturer code,
and byte 1 (A0 = VIH), the device identifier code. For the
MX27C512, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
device codes will possess odd parity, with the MSB (Q7)
defined as the parity bit.

READ MODE

The MX27C512 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable
(OE) is the output control and should be used to gate
data to the output pins, independent of device selection.
Assuming that addresses are stable, address access
time (tACC) is equal to the delay from CE to output (tCE).
Data is available at the outputs tOE after the falling edge
of OE, assuming that CE has been LOW and addresses
have been stable for at least tACC - tOE.

STANDBY MODE

The MX27C512 has a CMOS standby mode which
reduces the maximum VCC current to 100uA . It is
placed in CMOS standby when CE is at VCC ± 0.3 V.
The MX27C512 also has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mA. It is
placed in TTL-standby when CE is at VIH. When in
standby mode, the outputs are in a high-impedance
state, independent of the OE input.

FUNCTIONAL DESCRIPTION

THE PROGRAMMING OF THE MX27C512

When the MX27C512 is delivered, or it is erased, the
chip has all 512K bits in the "ONE" or HIGH state.
"ZEROs" are loaded into the MX27C512 through the
procedure of programming.

For programming, the data to be programmed is applied
with 8 bits in parallel to the data pins.

Vcc must be applied simultaneously or before Vpp, and
removed simultaneously or after Vpp. When
programming an MXIC EPROM, a 0.1uF capacitor is
required across Vpp and ground to suppress spurious
voltage transients which may damage the device.

FAST PROGRAMMING

The device is set up in the fast programming mode when
the programming voltage OE/VPP = 12.75V is applied,
with VCC = 6.25 V, (Algorithm is shown in Figure 1). The
programming is achieved by applying a single TTL low
level 100us pulse to the CE input after addresses and
data line are stable. If the data is not verified, an
additional pulse is applied for a maximum of 25 pulses.
This process is repeated while sequencing through
each address of the device. When the programming
mode is completed, the data in all address is verified at
VCC = 5V ± 10%.

PROGRAM INHIBIT MODE

Programming of multiple MX27C512s in parallel with
different data is also easily accomplished by using the
Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX27C512 may be common. A
TTL low-level program pulse applied to an MX27C512
CE input with OE/VPP = 12.5 ± 0.5V will program that
MX27C512. A high-level CE input inhibits the other
MX27C512s from being programmed.

PROGRAM VERIFY MODE

Verification should be performed on the programmed
bits to determine that they were correctly programmed.
The verification should be performed with OE/VPP and
CE, at VIL. Data should be verified tDV after the falling
edge of CE.

3

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MX27C512

NOTES: 1. VH = 12.0 V ± 0.5 V

2. X = Either VIH or VIL

3. A1 - A8 = A10 - A15 = VIL(For auto select)

4. See DC Programming Characteristics for VPP voltage during
programming.

MODE SELECT TABLE

PINS

MODE CE OE/VPP A0 A9 OUTPUTS

Read VIL VIL X X DOUT
Output Disable VIL VIH X X High Z
Standby (TTL) VIH X X X High Z
Standby (CMOS) VCC±0.3V X X X High Z
Program VIL VPP X X DIN
Program Verify VIL VIL X X DOUT
Program Inhibit VIH VPP X X High Z
Manufacturer Code(3) VIL VIL VIL VH C2H
Device Code(3) VIL VIL V IH VH 91H

TWO-LINE OUTPUT CONTROL FUNCTION

To accommodate multiple memory connections, a two­line control function is provided to allow for:

1. Low memory power dissipation,

2. Assurance that output bus contention will not
occur.

It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.

SYSTEM CONSIDERATIONS

During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude
of these transient current peaks is dependent on the
output capacitance loading of the device. At a minimum,
a 0.1 uF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 uF bulk electrolytic capacitor should be
used between VCC and GND for each eight devices.
The location of the capacitor should be close to where
the power supply is connected to the array.

4

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REV. 4.5, NOV. 09, 2001

MX27C512

Figure1. FAST PROGRAMMING FLOW CHART

START

ADDRESS = FIRST LOCATION

VCC = 6.25V

OE/VPP = 12.75V

PROGRAM ONE 100us PULSE

X = 0

LAST

ADDRESS ?

VERIFY BYTE

VCC = 5.25V

DEVICE PASSED

COMPARE

ALL BYTES

TO ORIGINAL

DATA

DEVICE FAILED

INCREMENT ADDRESS

FAIL

PASS

NO

NO

YES

YES

ADDRESS = FIRST LOCATION

LAST

ADDRESS ?

INCREMENT ADDRESS

FAIL

PASS

INCREMENT X

X = 25 ?

NO

OE/VPP = VIL

YES

PROGRAM ONE 100us PULSE

5

P/N:PM0235

REV. 4.5, NOV. 09, 2001

MX27C512

SWITCHING TEST CIRCUITS

SWITCHING TEST WAVEFORMS

DEVICE
UNDER

TEST

DIODES = IN3064
OR EQUIVALENT

CL = 100 pF including jig capacitance (30pF for 45/55/70 ns parts)

6.2K ohm

1.8K ohm
+5V

CL

2.0V

0.8V

TEST POINTS

INPUT

2.0V

0.8V
OUTPUT

AC TESTING: AC driving levels are 2.4V/0.4V for commercial grade, 3.0V/0V for industrial grade.

Input pulse rise and fall times are < 10ns.

AC driving levels

1.5V

TEST POINTS

INPUT

1.5V

OUTPUT

AC TESTING: (1) AC driving levels are 3.0V/0V for both commercial grade and industrial grade.

Input pulse rise and fall times are < 10ns.
(2) For MX27C1000-45, MX27C1000/1001-55, MX27C1000/1001-70.

AC driving levels

6

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REV. 4.5, NOV. 09, 2001

MX27C512

ABSOLUTE MAXIMUM RATINGS

RATING VALUE

Ambient Operating Temperature -40oC to 125oC
Storage Temperature -65oC to 125oC
Applied Input Voltage -0.5V to 7.0V
Applied Output Voltage -0.5V to VCC + 0.5V
VCC to Ground Potential -0.5V to 7.0V
A9 & Vpp -0.5V to 13.5V

NOTICE:

Stresses greater than those listed under ABSOLUTE
MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for
extended period may affect reliability.

NOTICE:

Specifications contained within the following tables are sub­ject to change.

DC/AC Operating Conditions for Read Operation

MX27C512

-45 -55 -70 -90 -10 -12 -15

Operating Commercial 0°C to 55°C0°C to 70°C0°C to 70°C0°C to 70°C0°C to 70°C0°C to 70°C0°C to 70°C
Temperature Industrial -40°C to 85°C -40°C to 85°C -40°C to 85°C -40°C to 85°C -40°C to 85°C -40°C to 85°C -40°C to 85°C

Automotive -40°C to 125°C -40°C to 125°C -40°C to 125°C -40°C to 125°C

Vcc Power Supply 5V ± 5% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%

DC CHARACTERISTICS

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

VOH Output High Voltage 2.4 V IOH = -0.4mA
VOL Output Low Voltage 0.4 V IOL = 2.1mA
VIH Input High Voltage 2.0 VCC + 0.5 V
VIL Input Low Voltage -0.2 0.8 V
ILI Input Leakage Current -10 10 uA VIN = 0 to 5.5V
ILO Output Leakage Current -10 10 uA VOUT = 0 to 5.5V
ICC3 VCC Power-Down Current 100 uA CE = VCC ± 0.3V
ICC2 VCC Standby Current 1.5 mA CE = VIH
ICC1 VCC Active Current 30 mA CE = VIL, f=5MHz, Iout =0mA
IPP VPP Supply Current Read 10 uA CE = VIL, VPP = 5.5V

CAPACITANCE TA = 25

o

C, f = 1.0 MHz (Sampled only)

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

CIN Input Capacitance 8 12 pF VIN = 0V
COUT Output Capacitance 8 12 pF VOUT = 0V
Vpp VPP Capacitance 18 25 pF VPP = 0V

7

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MX27C512

DC PROGRAMMING CHARACTERISTICS TA = 25

o

C ± 5°C

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

VOH Output High Voltage 2.4 V IOH = -0.40mA
VOL Output Low Voltage 0.4 V IOL = 2.1mA
VIH Input High Voltage 2.0 VCC + 0.5 V
VIL Input Low Voltage -0.2 0.8 V
ILI Input Leakage Current -10 10 uA VIN = 0 to 5.5V
VH A9 Auto Select Voltage 11.5 12.5 V
ICC3 VCC Supply Current(Program & Verify) 40 mA
IPP2 VPP Supply Current(Program) 30 mA CE = VIL
VCC1 Fast Programming Supply Voltage 6.00 6.50 V
VPP1 Fast Programming Voltage 12.5 13.0 V

27C512-10 27C512-12 27C512-15

SYMBOL PARAMETER MIN. MAX. MIN. MAX. MIN. MAX. UNIT CONDITIONS

tACC Address to Output Delay 100 120 150 ns CE = OE = VIL
tCE Chip Enable to Output Delay 100 120 150 ns OE = VIL
tOE Output Enable to Output 45 50 65 ns CE = VIL

Delay

tDF OE High to Output Float, 0 30 0 35 0 50 ns

or CE High to Output Float

tOH Output Hold from Address, 0 0 0 n s

CE or OE which ever occurred
first

AC CHARACTERISTICS

27C512-45 27C512-55 27C512-70 27C512-90

SYMBOL PARAMETER MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. UNIT CONDITIONS

tACC Address to Output Delay 45 55 70 90 ns CE = OE = VIL
tCE Chip Enable to Output Delay 45 55 70 90 ns OE = VIL
tOE Output Enable to Output 25 30 35 40 ns CE = VIL

Delay

tDF OE High to Output Float, 0 17 0 20 0 20 0 25 ns

or CE High to Output Float

tOH Output Hold from Address, 0000 ns

CE or OE which ever occurred
first

8

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MX27C512

AC PROGRAMMING CHARACTERISTICS TA = 25

o

C ± 5°C

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

tAS Address Setup Time 2 us
tDS Data Setup Time 2 us
tAH Address Hold Time 0 us
tDH Data Hold Time 2 us
tDFP Chip Enable to Output Float Delay 0 130 ns
tVPS VPP Setup Time 2 us
tPW CE Program Pulse Width 95 105 us
tVCS Vcc Setup Time 2 us
tDV Data Valid from CE 150 ns
tOEH OE/VPP Hold Time 2 ns
tVR OE/VPP Recovery Time 2 ns

9

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MX27C512

WAVEFORMS

READ CYCLE

FAST PROGRAMMING ALGORITHM WAVEFORM

ADDRESS

INPUTS

DATA

OUT

OE

CE

DATA ADDRESS

VALID DATA

tDF

tACC

tCE

tOE

tOH

Addresses

CE

OE/VPP

DATA

VCC

VIH

VIL

VPP1

VIL

VCC1

VCC

VIH

VIL

DATA OUT VALID

Hi-z

tAS

tVPS

tVCS

tDV

tPW

tDS

tDH

tVR

tVPS

tAH

tDFP

PROGRAM VERIFY

PROGRAM

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MX27C512

ORDERING INFORMATION

PLASTIC PACKAGE

PART NO. ACCESS TIME OPERATING STANDBY OPERATING PACKAGE

(ns) CURRENT MAX.(mA) CURRENT MAX.(uA) TEMPERATURE

MX27C512PC-45 45 30 100 0°C to 70°C 28 Pin DIP
MX27C512QC-45 45 30 100 0°C to 70°C 32 Pin PLCC
MX27C512TC-45 45 30 100 0°C to 70°C 28 PinTSOP(I)
MX27C512PC-55 55 30 100 0°C to 70°C 28 Pin DIP
MX27C512QC-55 55 30 100 0°C to 70°C 32 Pin PLCC
MX27C512TC-55 55 30 100 0°C to 70°C 28 Pin TSOP(I)
MX27C512PC-70 70 30 100 0°C to 70°C 28 Pin DIP
MX27C512QC-70 70 30 100 0°C to 70°C 32 Pin PLCC
MX27C512TC-70 70 30 100 0°C to 70°C 28 Pin TSOP(I)
MX27C512PC-90 90 30 100 0°C to 70°C 28 Pin DIP
MX27C512QC-90 90 30 100 0°C to 70°C 32 Pin PLCC
MX27C512TC-90 90 30 100 0°C to 70°C 28 Pin TSOP(I)
MX27C512PC-12 120 30 100 0°C to 70°C 28 Pin DIP
MX27C512QC-12 120 30 100 0°C to 70°C 32 Pin PLCC
MX27C512TC-12 120 30 100 0°C to 70°C 28 Pin TSOP(I)
MX27C512PC-15 150 30 100 0°C to 70°C 28 Pin DIP
MX27C512QC-15 150 30 100 0°C to 70°C 32 Pin PLCC
MX27C512TC-15 150 30 100 0°C to 70°C 28 Pin TSOP(I)
MX27C512PI-45 45 30 100 -40°C to 85°C 28 Pin DIP
MX27C512QI-45 45 30 100 -40°C to 85°C 32 Pin PLCC
MX27C512TI-45 45 30 100 -40°C to 85°C 28 PinTSOP(I)
MX27C512PI-55 55 30 100 -40°C to 85°C 28 Pin DIP
MX27C512QI-55 55 30 100 -40°C to 85°C 32 Pin PLCC
MX27C512TI-55 55 30 100 -40°C to 85°C 28 Pin TSOP(I)
MX27C512PI-70 70 30 100 -40°C to 85°C 28 Pin DIP
MX27C512QI-70 70 30 100 -40°C to 85°C 32 Pin PLCC
MX27C512TI-70 70 30 100 -40°C to 85°C 28 Pin TSOP(I)
MX27C512PI-90 90 30 100 -40°C to 85°C 28 Pin DIP
MX27C512QI-90 90 30 100 -40°C to 85°C 32 Pin PLCC
MX27C512TI-90 90 30 100 -40°C to 85°C 28 Pin TSOP(I)
MX27C512PI-12 120 30 100 -40°C to 85°C 28 Pin DIP
MX27C512QI-12 120 30 100 -40°C to 85°C 32 Pin PLCC
MX27C512TI-12 120 30 100 -40°C to 85°C 28 Pin TSOP(I)
MX27C512PI-15 150 30 100 -40°C to 85°C 28 Pin DIP
MX27C512QI-15 150 30 100 -40°C to 85°C 32 Pin PLCC
MX27C512TI-15 150 30 100 -40°C to 85°C 28 Pin TSOP(I)
MX27C512TA-90 90 30 100 -40°C to 125°C 28 Pin TSOP(I)
MX27C512TA-120 120 30 100 -40°C to 125°C 28 Pin TSOP(I)

11

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MX27C512

PACKAGE INFORMATION

28-PIN PLASTIC DIP (600 mil)

12

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REV. 4.5, NOV. 09, 2001

MX27C512

32-PIN PLASTIC LEADED CHIP CARRIER (PLCC)

13

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REV. 4.5, NOV. 09, 2001

MX27C512

8 x 13.4mm 28-PIN PLASTIC TSOP

14

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REV. 4.5, NOV. 09, 2001

MX27C512

REVISION HISTORY

Revision # Description Page Date

3.3 Programming Flow Chart corrected, programming verify after whole
array programmed with 1 pulse.

4.0 1) Reduce operating current change from 40mA to 30mA.

2) Add 28-TSOP(I) and 28-SOP packages offering.

3) Eliminate Interactive Programming Mode.

4.1 IPP 100uA --> 10uA 08/07/1997

4.2 CDIP 70/90/100/120/150ns speed grades deleted from ordering 05/07/1998
information.

4.3 Cancel ceramic DIP package type P1,2,10,12 MAR/02/2000

4.4 Remove 28-pin SOP Package P1,10 SEP/19/2001
Package Information format changed P11~13

4.5 Add automotive grade P6,10 NOV/09/2001

MX27C512

15

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