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MX23L6422
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NC
A0
A1
A2
A3
A4
A5
NC
NC
VCC
D0
D16
D1
D17
VSS
VCC
D2
D18
D3
D19
NC
NC
D4
D20
D5
D21
VSS
VCC
D6
D22
D7
D23
VSS
A6
A7
A8
A9
A10
A11
A12
A13
NC
NC
NC
NC
NC
NC
A20
WORD
OE
CE
NC
VSS
NC
D31/A-1
D15
D30
D14
VSS
VCC
D29
D13
D28
D12
NC
D27
D11
D26
D10
VSS
VCC
D25
D9
D24
D8
VCC
A19
A18
A17
A16
A15
A14
NC
NC
NC
NC
MX23L6422
3.3 Volt 64M-BIT (4M x 16 / 2M x 32) Mask ROM with Page Mode
FEATURES
• Bit organization
- 4M x 16 (byte mode)
- 2M x 32 (double word mode)
• Fast access time
- Random access: 110ns (max.) for 3.15~3.6V
120ns (max.) for 3.0~3.6V
- Page access: 30ns (max.)
• Page Size
- 8 double words per page
• Current
- Operating: 60mA (max.)
- Standby: 20uA (max.)
• Supply voltage
- 3.3V±10%
• Package
- 70 pin SSOP
- 86 pin TSOP(2)
PIN CONFIGURATION
70 SSOP
ORDER INFORMATION
Part No. Access Page Access Package
Time Time
MX23L6422MC-11 110ns 30ns 70 pin SSOP
MX23L6422MC-12 120ns 50ns 70 pin SSOP
MX23L6422YC-12 120ns 50ns 86 pin TSOP
86 TSOP(2)
70
A0
2
A1
3
A2
4
VCC
D16
D17
VSS
VCC
D18
D19
D20
D21
VSS
VCC
D22
D23
VSS
A10
A11
A12
A3
5
A4
6
A5
7
8
D0
9
10
D1
11
12
13
14
D2
15
16
D3
17
18
D4
19
20
D5
D6
D7
A6
A7
A8
A9
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
MX23L6422
P/N:PM0410 REV. 2.7, OCT. 19, 2001
NC
69
NC
68
A20
67
WORD
66
OE
65
CE
64
VSS
63
D31/A-1
62
D15
61
D30
60
D14
59
VSS
58
VCC
57
D29
56
D13
55
D28
54
D12
53
D27
52
D11
51
D26
50
D10
49
VSS
48
VCC
47
D25
46
D9
45
D24
44
D8
43
VCC
42
A19
41
A18
40
A17
39
A16
38
A15
37
A14
36
A13
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MX23L6422
PIN DESCRIPTION
Symbol Pin Function
A0~A20 Address Inputs
D0~D30 Data Outputs
D31/A-1 D31 (Double W ord Mode)/ LSB Address
(Word Mode)
CE Chip Enable Input
OE Output Enable Input
WORD Double Word/ W ord Mode Selection
VC C Po wer Supply Pin
VSS Ground Pin
N C No Connection
MODE SELECTION
CE OE WORD D31/A-1 D0~D15 D16~D31 Mode Po wer
H X X X High Z High Z - Stand-by
L H X X High Z High Z - Active
L L H Output D0~D15 D16~D31 Double W ord Active
L L L Input D0~D15 High Z Word Active
BLOCK DIAGRAM
A0/(A-1)
A2
A3
A20
CE
WORD
OE
Address
Buffer
Memory
Array
Page
Buffer
Page
Decoder
Double
Word/
Word
Output
Buffer
D31/(D15)
D0
P/N:PM0410
REV. 2.7, OCT. 19, 2001
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MX23L6422
ABSOLUTE MAXIMUM RATINGS
Item Symbol Ratings
V oltage on an y Pin Relative to VSS VIN -1.3V to 4.1V
Ambient Operating Temperature T opr 0°C to 70°C
Storage T emperature Tstg -65°C to 125°C
Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions , inputs may undershoot VSS to -
1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage
transitions, input may ov ershoot VCC to VCC+2.0V f or periods of up to 20ns.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)
Item Symbol MIN. MAX. Conditions
Output High Voltage VOH 2.4V - IOH = -0.4mA
Output Low Voltage VOL - 0.4V IOL = 1.6mA
Input High Voltage VIH 2.2V VCC+0.3V
Input Low Voltage VIL -0.3V 0.8V
Input Leakage Current ILI - 10uA 0V, VCC
Output Leakage Current ILO - 10uA 0V , VCC
Operating Current ICC1 - 60mA tRC = 110ns, all output open,
with normal sequential access
testing pattern
Standby Current (TTL) ISTB1 - 1mA CE = VIH
Standby Current (CMOS) ISTB2 - 20uA CE>VCC-0.2V
Input Capacitance CIN - 10pF Ta = 25°C, f = 1MHZ
Output Capacitance COUT - 10pF Ta = 25°C, f = 1MHZ
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)
Item Symbol 23L6422-11* 23L6422-12
MIN. MAX. MIN. MAX.
Read Cycle Time t RC 110ns - 120ns Address Access Time tAA - 100ns - 120ns
Chip Enable Access Time tACE - 110ns - 120ns
Page Mode Access Time tPA - 30ns - 50ns
Output Enable Time tOE - 30ns - 50ns
Output Hold After Address tOH 0ns - 0ns Output High Z Delay tHZ - 20ns - 20ns
Note: Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by
design over the full voltage and temperature operating range - not tested.
* 110ns for 3.15~3.6V
P/N:PM0410
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REV. 2.7, OCT. 19, 2001
Page 4
AC T est Conditions
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
DOUT
C<100pF
IOL (load)=1.6mA
IOH (load)=-0.4mA
Input Pulse Levels 0.4V~ 2.4V
Input Rise and Fall Times 10ns
Input Timing Level 1.4V
Output Timing Level 1.4V
Output Load See Figure
TIMING DIAGRAM
RANDOM READ
MX23L6422
ADD
CE
OE
DATA
PAGE READ
(A-1),A0,A1,A2
A3-A20
ADD ADD ADD
tAA
tRC
tOH
VALID ADD
3'rd ADD
tACE
tOE
1'st ADD
VALID VALID VALID
2'nd ADD
tHZ
tAA
DATA
P/N:PM0410
Note: CE, OE are enable.
Page size is 8 double words in 32-bit mode, 16 words in 16-bit mode.
VALID
tPA
VALID
4
VALID
REV. 2.7, OCT. 19, 2001
Page 5
MX23L6422
REVISION HISTORY
REVISION DESCRIPTION PAGE DATE
2.1 AC CHARACTERISTICS tOH 10ns-->0ns P4 JAN/29/1999
2.2 Add new 86pin TSOP(2) pac kage P1 APR/09/1999
Add 100ns speed grade P1,2
Delete 115ns speed grade P4
2.3 Change 100ns speed grade to 110ns P4 SEP/14/1999
2.4 Add 110ns(max.) for 3.15~3.6V ; 120ns(max.) for 3.0~3.6V P1 DEC/29/1999
2.5 Modify Operating Current : 40mA-->60mA P1,3 JAN/13/2000
2.6 Modify Pin Configuration--100 TQFP D31-->D31/A-1; P2 DEC/26/2000
86 TSOP NC-->D31/A-1
2.7 Delete package:100 pin TQFP P1,2 OCT/19/2001
P/N:PM0410
REV. 2.7, OCT. 19, 2001
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MX23L6422
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-6688
FAX:+886-3-563-2888
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TEL:+32-2-456-8020
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MACRONIX AMERICA, INC.
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CHICAGO OFFICE:
TEL:+1-847-963-1900
FAX:+1-847-963-1909
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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