Datasheet MX23L3211MC-10, MX23L3211TC-10, MX23L3211RC-10, MX23L3211MC-12, MX23L3211TC-12 Datasheet (MXIC)
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MX23L3211
32M-BIT MASK ROM (8/16-BIT OUTPUT)
FEATURES
• Bit organization
- 4M x 8 (byte mode)
- 2M x 16 (word mode)
• Fast access time
- Random access: 100ns (max.)
- Page access: 30ns (max.)
• Page Size
- 8 words per page
• Current
- Operating:40mA
- Standby:5uA
• Supply voltage
- 100ns @3.0V ~ 3.6V
- 120ns @2.7V ~ 3.6V
• Package
- 44 pin SOP (500mil)
- 48 pin TSOP (12mm x 20mm)
PIN CONFIGURATION
44 SOP
NC
A18
A17
CE
VSS
OE
D10
D11
2
3
4
A7
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12
13
14
15
D0
16
D8
17
D1
18
D9
19
D2
20
21
D3
22
44
A20
43
A19
42
A8
41
A9
40
A10
39
A11
38
A12
37
A13
36
A14
35
A15
34
A16
33
BYTE
32
MX23L3211
VSS
31
D15/A-1
30
D7
29
D14
28
D6
27
D13
26
D5
25
D12
24
D4
23
VCC
ORDER INFORMATION
Part No. Access Page Access Package
Time Time
MX23L3211MC-10 100ns 30ns 44 pin SOP
MX23L3211MC-12 120ns 50ns 44 pin SOP
MX23L3211TC-10 100ns 30ns 48 pin TSOP
MX23L3211TC-12 120ns 50ns 48 pin TSOP
MX23L3211RC-10 100ns 30ns 48 pin TSOP
(Reverse type)
MX23L3211RC-12 120ns 50ns 48 pin TSOP
(Reverse type)
PIN DESCRIPTION
Symbol Pin Function
A0~A20 Address Inputs
D0~D14 Data Outputs
D15/A-1 D15 (Word Mode)/ LSB Address
(Byte Mode)
CE Chip Enable Input
OE Output Enable Input
Byte W ord/ Byte Mode Selection
VCC Po wer Supply Pin
VSS Ground Pin
NC No Connection
MODE SELECTION
CE OE Byte D15/A-1 D0~D7 D8~D15 Mode Power
H X X X High Z High Z - Stand-by
L H X X High Z High Z - Active
L L H Output D0~D7 D8~D15 Word Active
L L L Input D0~D7 High Z Byte Active
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48 TSOP (Normal Type)
MX23L3211
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BYTE
A16
A15
A14
A13
A12
A11
A10
A19
VSS
A20
A18
A17
CE
48 TSOP (Reverse T ype)
MX23L3211
(Normal T ype)
48
VSS
47
VSS
46
D15/A-1
45
D7
44
D14
43
D6
42
D13
41
D5
40
D12
39
D4
38
VCC
37
VCC
36
NC
35
D11
34
D3
33
D10
32
D2
31
D9
30
D1
29
D8
28
D0
27
OE
26
VSS
25
VSS
P/N:PM0411
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX23L3211
(Reverse Tp ye)
1
BYTE
2
A16
3
A15
4
A14
5
A13
6
A12
7
A11
8
A10
9
A9
10
A8
11
A19
12
VSS
13
A20
14
A18
15
A17
16
A7
17
A6
18
A5
19
A4
20
A3
21
A2
22
A1
23
A0
24
CE
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MX23L3211
BLOCK DIAGRAM
A0/(A-1)
A2
A3
A20
CE
BYTE
OE
Address
Buffer
Memory
Array
Page
Buffer
ABSOLUTE MAXIMUM RATINGS
Item Symbol Ratings
V oltage on any Pin Relativ e to VSS VIN -1.3V to VCC+2.0V (Note)
Ambient Operating Temperature T opr 0°C to 70°C
Storage T emperature Tstg -65°C to 125°C
Page
Decoder
Word/
Byte
Output
Buffer
D0
D15/(D7)
Note: Minimum DC v oltage on input or I/O pins is -0.5V.
During voltage transitions, inputs may undershoot VSS
to -1.3V for periods of up to 20ns. Maximum DC voltage
on input or I/O pins is VCC+0.5V. During v oltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.0V~3.6V)
Item Symbol MIN. MAX. Conditions
Output High Voltage VOH 2.4V - IOH = -400uA
Output Low Voltage VOL - 0.4V IOL = 1.6mA
Input High Voltage VIH 2.2V VCC+0.3V
Input Low Voltage VIL -0.3V 0.8V
Input Leakage Current ILI - 5uA 0V, VCC
Output Leakage Current ILO - 5uA 0V , VCC
Operating Current ICC1 - 40mA tRC = 100ns, all output open
Standby Current (TTL) ISTB1 - 1mA CE = VIH
Standby Current (CMOS) ISTB2 - 5uA CE>VCC-0.2V
Input Capacitance CIN - 10pF Ta = 25°C , f = 1MHZ
Output Capacitance COUT - 10pF Ta = 25°C, f = 1MHZ
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AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3V±10%)
Item Symbol 23L3211-10 23L3211-12
MIN. MAX. MIN. MAX.
Read Cycle Time tRC 100ns - 120ns Address Access Time tAA - 100ns - 120ns
Chip Enable Access Time tACE - 100ns - 120ns
Page Mode Access Time tPA - 30ns - 50ns
Output Enable Time tOE - 30ns - 50ns
Output Hold After Address tOH 0ns - 0ns Output High Z Delay tHZ - 20ns - 20ns
Note:Output high-impedance delay (tHZ) is measured
from OE or CE going high, and this parameter guaranteed by design over the full v oltage and temperature operating range - not tested.
MX23L3211
AC T est Conditions
Input Pulse Levels 0.4V~ 2.6V
Input Rise and Fall Times 10ns
Input Timing Level 1.4V
Output Timing Level 1.4V
Output Load See Figure
IOH (load)=-0.4mA
DOUT
IOL (load)=1.6mA
Note:
No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
C<100pF
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TIMING DIAGRAM
RANDOM READ
MX23L3211
ADD
DATA
PA GE READ
(A-1),A0,A1,A2
CE
OE
A3-A20
ADD ADD ADD
tACE
tOE
VALID VALID VALID
1'st ADD
tRC
tAA
2'nd ADD
tOH
VALID ADD
3'rd ADD
tHZ
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tAA
DATA
Note: CE, OE are enable.
Page size is 8 double words in 32-bit mode, 16 words in 16-bit mode.
VALID
tPA
VALID
5
VALID
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PACKAGE INFORMATION
44-PIN PLASTIC SOP
MX23L3211
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48-PIN PLASTIC TSOP
MX23L3211
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MX23L3211
REVISION HISTORY
REVISION DESCRIPTION PA GE DATE
2.0 Output hold after address (tOH) spec is revised as 0ns(min.) P4 JAN/22/1999
120ns speed grade's voltage range is revised as 2.7V~3.6V P1
2.1 Modify Package Information P6~7 JUL/17/2001
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MX23L3211
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-6688
FAX:+886-3-563-2888
EUROPE OFFICE:
TEL:+32-2-456-8020
FAX:+32-2-456-8021
JAPAN OFFICE:
TEL:+81-44-246-9100
FAX:+81-44-246-9105
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TEL:+65-348-8385
FAX:+65-348-8096
TAIPEI OFFICE:
TEL:+886-2-2509-3300
FAX:+886-2-2509-2200
MACRONIX AMERICA, INC.
TEL:+1-408-453-8088
FAX:+1-408-453-8488
CHICAGO OFFICE:
TEL:+1-847-963-1900
FAX:+1-847-963-1909
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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