Datasheet MX23L3210YC-12, MX23L3210MC-12, MX23L3210RC-12, MX23L3210TC-10, MX23L3210TC-15 Datasheet (MXIC)

MX23L3210

32M-BIT (4M x 8 / 2M x 16) Mask ROM

FEATURES

• Bit organization

- 4M x 8 (byte mode)

- 2M x 16 (word mode)

• Fast access time

- Random access:100ns (max.) for 3.0V~3.6V

150ns (max.) for 2.7V~3.6V

• Current

- Operating:40mA

- Standby:15uA

• Supply voltage

- 2.7V~3.6V

• Package

- 44 pin SOP (500mil)

- 48 pin TSOP (12mm x 20mm)

- 44 pin TSOP (Type II)

PIN CONFIGURATION

ORDER INFORMATION

Part No. Access Time Pac ka ge

MX23L3210MC-10 100ns 44 pin SOP
MX23L3210MC-12 120ns 44 pin SOP
MX23L3210MC-15 150ns 44 pin SOP
MX23L3210TC-10 100ns 48 pin TSOP
MX23L3210TC-12 120ns 48 pin TSOP
MX23L3210TC-15 150ns 48 pin TSOP
MX23L3210RC-10 100ns 48 pin TSOP

(Reverse type)

MX23L3210RC-12 120ns 48 pin TSOP

(Reverse type)

MX23L3210RC-15 150ns 48 pin TSOP

(Reverse type)
MX23L3210YC-10 100ns 44 pin TSOP
MX23L3210YC-12 120ns 44 pin TSOP

PIN DESCRIPTION

44 SOP/ 44 TSOP

NC
A18
A17

A7
A6
A5
A4
A3
A2
A1
A0

CE

VSS

OE

D0
D8
D1
D9
D2

D10

D3

D11

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

44

A20

43

A19

42

A8

41

A9

40

A10

39

A11

38

A12

37

A13

36

A14

35

A15

34

A16

33

BYTE

32

MX23L3210

VSS

31

D15/A-1

30

D7

29

D14

28

D6

27

D13

26

D5

25

D12

24

D4

23

VCC

Symbol Pin Function

A0~A20 Address Inputs
D0~D14 Data Outputs
D15/A-1 D15 (Word Mode)/ LSB Address

(Byte Mode)
CE Chip Enable Input
OE Output Enab le Input
Byte Word/ Byte Mode Selection
VCC Po wer Supply Pin
VSS Ground Pin
NC No Connection

MODE SELECTION

CE OE Byte D15/A-1 D0~D7 D8~D15 Mode Power

H X X X High Z High Z - Stand-by
L H X X High Z High Z - Active
L L H Output D0~D7 D8~D15 Word Active
L L L Input D0~D7 High Z Byte Active

P/N:PM0370 REV. 2.8, JUL. 17, 2001

1

48 TSOP (Normal Type)

MX23L3210

BYTE

A16
A15
A14
A13
A12
A11
A10

A9
A8

A19

VSS

A20
A18
A17

A7
A6
A5
A4
A3
A2
A1
A0

CE

48 TSOP (Reverse T ype)

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

MX23L3210

(Normal T ype)

48

VSS

47

VSS

46

D15/A-1

45

D7

44

D14

43

D6

42

D13

41

D5

40

D12

39

D4

38

VCC

37

VCC

36

NC

35

D11

34

D3

33

D10

32

D2

31

D9

30

D1

29

D8

28

D0

27

OE

26

VSS

25

VSS

VSS
VSS

D15/A-1

D7

D14

D6

D13

D5

D12

D4
VCC
VCC

NC

D11

D3

D10

D2

D9

D1

D8

D0

OE
VSS
VSS

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

MX23L3210

(Reverse Tp ye)

1

BYTE

2

A16

3

A15

4

A14

5

A13

6

A12

7

A11

8

A10

9

A9

10

A8

11

A19

12

VSS

13

A20

14

A18

15

A17

16

A7

17

A6

18

A5

19

A4

20

A3

21

A2

22

A1

23

A0

24

CE

P/N:PM0370

REV. 2.8, JUL. 17, 2001

2

BLOCK DIAGRAM

MX23L3210

A0/(A-1)

A20

CE

BYTE

OE

Address

Buffer

Memory

Array

Sense

Amplifier

Word/

Byte

ABSOLUTE MAXIMUM RATINGS

Item Symbol Ratings

V oltage on any Pin Relativ e to VSS VIN -0.3V to 3.9V
Ambient Operating Temperature T opr 0°C to 70°C
Storage T emperature Tstg -65°C to 125°C

Output

Buffer

D0

D15/(D7)

DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)

Item Symbol MIN. MAX. Conditions

Output High Voltage VOH 2.3V - IOH = -0.4mA
Output Low Voltage VOL - 0.4V IOL = 1.6mA
Input High Voltage VIH 2.1V VCC+0.3V
Input Low Voltage VIL -0.3V 0.2xVCC
Input Leakage Current ILI - 5uA 0V, VCC
Output Leakage Current ILO - 5uA 0V, VCC
Operating Current ICC1 - 40mA tRC = 120ns, all output open
Standby Current (TTL) ISTB1 - 1mA CE = VIH
Standby Current (CMOS) ISTB2 - 15uA CE>VCC-0.2V
Input Capacitance CIN - 10pF Ta = 25°C, f = 1MHZ
Output Capacitance COUT - 10pF Ta = 25°C, f = 1MHZ

P/N:PM0370

3

REV. 2.8, JUL. 17, 2001

MX23L3210

AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)

Item Symbol 23L3210-10* 23L3210-12* 23L3210-15

MIN. MAX. MIN. MAX. MIN. MAX.

Read Cycle Time tRC 100ns - 120ns - 150ns ­Address Access Time tAA - 100ns - 120ns - 150ns
Chip Enable Access Time tACE - 100ns - 120ns - 150ns
Output Enable Time tOE - 50ns - 60ns - 70ns
Output Hold After Address tOH 0ns - 0ns - 0ns ­Output High Z Delay tHZ - 20ns - 20ns - 20ns

Note:Output high-impedance delay (tHZ) is measured
from OE going high, and this parameter guaranteed by
design over the full voltage and temperature operating
range - not tested.
* 100/120ns for 3.0V~3.6V

AC T est Conditions

Input Pulse Levels 0.4V~2.4V
Input Rise and Fall Times 10ns
Input Timing Level 1.4V
Output Timing Level 1.4
Output Load See Figure

IOH (load)=-0.4mA

DOUT

IOL (load)=1.6mA

C<100pF

TIMING DIAGRAM

RANDOM READ

ADD

CE#

OE#

DATA

P/N:PM0370

Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.

ADD ADD ADD

tAA

tRC

tOH

4

tACE

tOE

VALID VALID VALID

tHZ

REV. 2.8, JUL. 17, 2001

PACKAGE INFORMATION

44-PIN PLASTIC SOP

MX23L3210

P/N:PM0370

REV. 2.8, JUL. 17, 2001

5

48-PIN PLASTIC TSOP

MX23L3210

P/N:PM0370

REV. 2.8, JUL. 17, 2001

6

44-PIN TSOP (Type II)

MX23L3210

P/N:PM0370

REV. 2.8, JUL. 17, 2001

7

MX23L3210

REVISION HISTORY

REVISION DESCRIPTION PAGE DATE

2.5 AC CHARACTERISTICS tOH 10ns-->0ns P4 JAN/29/1999

2.6 Add 120ns (max.) for 3.0V~3.6V ; 150ns(max.) for 2.7V~3.6V P1 Dec/24/1999
DC characteristics Standby current (ISTB2):5uA-->15uA P1,3
AC characteristics 120ns for 3.0V~3.6V P4

2.7 1.Added access time:100ns P1,4 JUN/28/2001

2.Modify Package Inf ormation P5,6

2.8 1.Added 44-pin TSOP(II) P1,7 JUL/17/2001

P/N:PM0370

REV. 2.8, JUL. 17, 2001

8

MX23L3210

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