Serial (MX214) and Parallel (MX224)
Loading Options
32 Programmable Split Points
Half-Duplex Capability
POWERSAVE
LOAD / LA TC H
SERIAL CLOCK
ENABLE / MUTE
CLEAR / SCRAMBLE
Rx / (SER / PAR)Tx
A0
A1
A2
A3
A4
(SERIAL DATA IN)
Rx IN
Tx IN
PS
PS
INPUT LATCHES
BIAS
BIAS
ENRx⋅⋅PS
Rx
MUTE
Tx ⋅ PS
Tx ⋅ PS
BIAS
CK
FILTER 3
CK
3
A
EN / MUTE
CLEAR / SCRAMBLE
Rx / Tx
CTCSS
C
5
Rx
Tx
C6
ROM
Mobile Radio Voice Security
Cellular Telephone Voice
Security
1MHz
OSC
1MHz
PS
3
PS EN Tx⋅⋅
Tx
SCRAMBLE
CLOCK
DIVIDER
CK
B
CLOCK
SWITCHING
Tx
Rx
BIAS
CLOCK
DIVIDER
FC1F
CK
C2
A
CK
Rx
Rx
FILTER 4
FILTER 2FILTER 1
CK4
CK
4
CK
A
CK
B
F
C2
F
C1
Rx
Tx
Inverter
CK
B
Rx / Tx
Σ
CK
4
CLEAR
PS + EN Rx⋅
XTAL / CLOCK
PS + EN Tx⋅
BIAS
PS MUTE Rx⋅⋅
BIAS
BIAS
XTAL
V
DD
V
BIAS
V
SS
Tx OUT
Rx OUT
The MX214/224 Variable Split Band Inverters are designed for mobile and cellular radio voice security
applications. Digital control functions are loaded serially into the MX214. The MX224 is loaded in parallel.
The MX214/224 ICs include a highpass filter that rejects subaudio frequencies, ensuring full CTCSS
compatibility. This CTCSS filter is not included on the earlier generation MX204 VSB Inverter.
The MX214/224 splits the voiceband (300-2700Hz) into upper and lower subbands, and inverts each subband
about itself. The ‘split point’ (defined as the frequency where the voice band is subdivided), is externally
programmable to 32 distinct values in the 300 to 3000Hz range. In the ‘fixed code’ mode, a single point is
used. Fixed mode operation nets approximately 4 mutually exclusive secure channels.
In ‘rolling code’ mode, the split point is changed many times per second, usually under control of a
microprocessor. Rolling code scrambling requires synchronization, offers higher security than fixed code
operation, and provides a much greater number of mutually exclusive secure channels.
The MX214/224 offers a recovered audio product close to that of a telephone. The on-chip ‘ Mute’ function is
useful when implementing rolling code continuous synchronization schemes. ‘Powersave’ and
‘Clear/Scramble’ controls are also included on-chip. Timing and filter clocks are derived internally from an
on-chip 1MHz reference oscillator driven by a 1MHz crystal or clock pulse input.
The MX214 and the MX224 operate from a single 5.0V supply and available in the following packges:
22-pin CDIP (MX214J/MX224J), 22-pin PDIP (MX214P/MX224P), and 24-pin PLCC (MX214LH/MX224LH).
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Page 4
Variable Split Band Inverter4MX214/224
2. Signal List
MX214
Pin No.
MX224
Pin No.
Signal NameDescription
J/PLHJ/PLH
7111Xtal/ClockInput to the clock oscillator inverter. A 1MHz crystal
input or externally derived 1MHz clock is injected
here.
8222
Xtal
Output of the clock oscillator inverter.
93Serial Data InputThis pin is used to input an 8-bit word representing
the digital control functions. This word is loaded
using the serial data clock and in input in the
following sequence: MUTE, CLEAR,
A1, A2, A3, A4. The
is operated on the
Latch/Load
Tx/Rx, A0,
completion. Reference the timing diagram in Figure
8.
3 – A4
4 – A3
5 – A2
6 – A1
7 – A0
3 – A4
4 – A3
5 – A2
6 – A1
7 – A0
88
Programming
Inputs
Tx/Rx
In parallel mode, these five digital inputs define the
split point frequency. Each of the 5 input pins has a
1M internal pull-up resistor. See Table 4 for
programming information.
This digital input selects the Receive and Transmit
paths and configures upperband and lowerband
filter bandwidths while setting the CTCSS highpass
filter position on the signal path. See Table 2,
Figure 6, and Figure 7. 1M internal pull-up resistor
(Rx).
138
Serial/Parallel
This pin must be connected to V
for serial loading.
SS
Internal 1M pull-up resistor.
99Clear/ScrambleThis digital input puts the device into ‘Clear’ or
‘Scramble’ mode by controlling the application of
carrier frequency to the Upper and Lower band
balanced modulators. In ‘Scramble’ mode, the
balanced modulator carrier frequency values are
selected by the split point address A0-A4. See
Table 4. In ‘Clear’ mode, the carriers are disabled
and the balanced modulators are bypassed
internally, i.e. the lower band signal is not added to
the output signal. 1MHz internal pull-up resistor
(Clear).
1010Enable/MuteThis digital function is used to disable the Receive or
the Transmit signal paths for rolling code
synchronization while maintaining bias conditions.
Synchronization data can be transmitted during the
Mute periods, as is done in the MX1204 VSB
Scrambler Module. 1M Internal pull-up resistor
(Enable)
1410Serial Clock
Input
This is the externally applied data clock frequency
used to shift input data along in devices wired in the
Serial-loading mode. One full data clock cycle is
required to shift one data bit completely into the
register. See Timing Diagram Figure 8. 1M
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Page 5
Variable Split Band Inverter5MX214/224
MX214
Pin No.
MX224
Pin No.
Signal NameDescription
J/PLHJ/PLH
15111111
Latch/Load
This pin controls the loading of the 8 digital function
inputs (ENABLE, CLEAR, A0-A4) into the internal
register. When this pin is at a logic ‘1’, all eight
inputs are transparent and new data acts directly.
For controlled changing of parameters in the
parallel,
Latch/Load must be kept at logic ‘0’ while
a new function is loaded, then strobed 0-1-0 to latch
the inputs in. For serial loading, the serial data
should be loaded with the
and then the
Latch/Load strobed 0-1-0 on
Latch/Load at logic ‘0’
completion of data loading. Internal 1M pull-up
resistor (Load). See Figure 8.
16121212PowersaveThis digital input is used to place the MX214/224
into Powersave mode where all parts of the device
except the 1MHz oscillator are shut down. All signal
input and output lines are made open circuit, free of
all bias. This allows signal paths to be routed
externally around the device, while reducing current
consumption. A logic ‘0’ at this input enables the
device to work normally as shown in Table 2.
Internal 1M pull-up resistor.
17131313V
SS
Negative supply (GND)
18141414Internal connectionThis pin is internally connected. Leave open circuit.
19151515Rx OutputThis is the processed received audio signal output.
This pin is held at a DC ‘bias’ voltage for all
functions except Powersave. This buffered output is
driven by the summing circuit in the Rx mode.
Signal paths and bias levels are detailed in Table 2
and Figure 7.
20161616Tx OutputThis is the processed audio output for the
transmission channel. This pin is held at a DC ‘bias’
voltage for all functions except Powersave. This
summed and buffered signal is passed through the
CTCSS high pass Filter to the output pin in the Tx
Mode. Signal paths and bias levels are detailed in
Table 2 and Figure 6.
21171717V
BIAS
Normally at VDD/2, this pin requires an external
decoupling capacitor (C7) to V
SS
.
22181818Rx InputThis is the analog received signal input. This pin is
held at a DC ‘bias’ voltage by a 300k on-chip bias
resistor, which is selected for all functions except
Powersave. It must be connected to external
circuitry by capacitor C3. See Figure 2 and Figure
3. This input is routed through the CTCSS High
Pass Filter in Rx mode to remove subaudio
frequencies from the voiceband. Signal paths and
bias levels are detailed in Table 2 and Figure 7.
1191919Highband Filter
Output
The output of the Input Filter of the Upperband limit.
The
Tx/Rx functions sets the lowpass filter at
3400Hz or 2700Hz respectively. This output must
be connected to the Highband Balanced modulator
input via capacitor C5. See Figure 2 and Figure 3.
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Page 6
Variable Split Band Inverter6MX214/224
MX214
Pin No.
MX224
Pin No.
Signal NameDescription
J/PLHJ/PLH
2202020Highband Balanced
Modulator Input
The input to the Balanced Modulator of the
Upperband limit. This input must be connected to
the Highband Filter Output via capacitor C5. See
Figure 2 and Figure 3.
3212121Lowband Balanced
Modulator Input
The input to the Balanced Modulator of the
Lowerband limit. This input must be connected to
the Lowband Filter Output via capacitor C6. See
Figure 2 and Figure 3.
4222222Tx inputThis analog ‘Clear’ audio input for the VSB
Scrambler. This pin is held at a DC ‘bias’ voltage by
a 300k on-chip bias resistor, which is selected for
all functions except powersave. In must be
connected to external circuitry by capacitor C4. See
Figure 2 and Figure 3. This input, in Tx mode, is
connected to Upper and Lowerband input filters.
Signal paths and bias levels are detailed in Table 2
and Figure 6.
5232323Lowband Filter
Output
The output of the Input filter of the lowerband limit.
The
Tx/Rx function determines which filter is used
(Filter 1 or 2). See Figure 6 and Figure 7. This
output must be connected to the Lowband balanced
modulator input via capacitor C6. See Figure 7.
6242424V
10,
11,
4, 5, 6,
7, 9
DD
N/CNo Connection
A single 5.0V supply is required.
12
Table 1: Signal List
TxRx/ = 1TxRx/ = 0
MUTE = 0POWERSAVE
Rx PathEnabledDisabledDisabledDisabled
Rx Out LevelBiasBiasBiasHigh Impedance
Tx PathDisabledEnabledDisabledDisabled
Tx Out LevelBiasBiasBiasHigh impedance
1. C5 and C6 are coupling capacitors between filter outputs and balanced modulator inputs.
2. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at
least 40% of V
, peak to peak. Tuning fork crystals generally cannot meet this requirement. To
DD
obtain crystal oscillator design assistance, consult your crystal manufacturer.
4. General Description
The MX214/224 Variable Split Band Inverters are designed for mobile and cellular radio voice security
applications. Digital control functions are loaded serially into the MX214. The MX224 is loaded in parallel.
The MX214/224 ICs include a highpass filter that rejects subaudio frequencies, ensuring full CTCSS
compatibility. This CTCSS filter is not included on the earlier generation MX204 VSB Inverter.
The MX214/224 splits the voiceband (300-2700Hz) into upper and lower subbands, and inverts each subband
about itself. The ‘split point’ (defined as the frequency where the voice band is subdivided), is externally
programmable to 32 distinct values in the 300 to 3000Hz range. In the ‘fixed code’ mode, a single point is
used. Fixed mode operation nets approximately 4 mutually exclusive secure channels.
In ‘rolling code’ mode, the split point is changed many times per second, usually under control of a
microprocessor. Rolling code scrambling requires synchronization, offers higher security than fixed code
operation, and provides a much greater number of mutually exclusive secure channels.
The MX214/224 offers a recovered audio product close to that of a telephone. The on-chip ‘ Mute’ function is
useful when implementing rolling code continuous synchronization schemes. ‘Powersave’ and
‘Clear/Scramble’ controls are also included on-chip. Timing and filter clocks are derived internally from an
on-chip 1MHz reference oscillator driven by a 1MHz crystal or clock pulse input.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USAAll trademarks and service marks are held by their respective companies.
Page 9
Variable Split Band Inverter9MX214/224
5. Application
The MX214 represents both the MX214 and the MX224 throughout this section.
Recommended external components are shown in Figure 2 and Figure 3. In ‘Scramble’ mode, split point
frequencies are selected and set in accordance with the ROM address code present at the inputs A0-A4. See
Table 4. In ‘Clear’ mode, both upper and Lowerband filter limits are used (see Figure 6 and Figure 7), the
carrier frequencies are turned off, and the balanced modulators are bypassed internally. The Lowband audio
is removed from the output signal prior to summing.
The MUTE function disables the MX214/224’s audio outputs to allow periodic transmission of synchronization
data. A logic ‘0’ at this input isolates the device while leaving the audio input and output ins at bias level (See
Table 2). When the MX21/224 is in Powersave mode, audio signals may be hardwired around the device
since the input and output pins are open circuit. See Table 2.
5.1 Audio Quality
Figure 4 shows the recommended basic audio system layout using pre- and de-emphasis circuitry to maintain
good recovered speech quality. The Transmit mode,
Do Not
In the Receive mode, de-emphasis should be used after the MX214.
Amplitude
Control
(Optional)
Pre-emphasisMX214TxRxMX214De-emphasis
Flat Amplitude
Channel
300-3400Hz
Frequency
Inverter
Figure 4: Recommended Basic Communication Audio System Layout
Figure 5 shows the recommended basic audio system layout if it is necessary to install the MX214 within a
radio having pre- and de-emphasis circuitry as a standard. This is where post-emphasis access is not
possible in the transmitter.
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Variable Split Band Inverter10MX214/224
Amplitude
Pre-emphasisMX214TxRxMX214De-emphasis
De-emphasis
Pre-emphasis
Control
Flat Amplitude
Channel
300-3400Hz
(Additional)
Frequency
Inverter
(Additional)
(Fitted)
Frequency
Inverter
(Optional)(Fitted)
Figure 5: Recommended Basic Radio Communication Audio System Layout.
During the Transmit function the low pass and CTCSS filters are configured automatically as shown in Figure
6, with cut-off frequencies (-3dB) indicated.
F
CK
3
C
C2
5
CK
3
CK
B
CTCSS
300Hz
PS + ENABLE Tx⋅
Tx OUT
BIAS
Tx IN
BIAS
CK
Σ
CLEAR
4
FILTER 4
3400Hz
2700Hz
PS
BIAS
2900Hz
2900Hz
FILTER 1
CK
A
CLEAR
SCRAMBLE
SCRAMBLE
CLEAR
C
6
F
C1
FILTER 3
3400Hz
3400Hz
2600Hz
2600Hz
FILTER 2
CK
A
SCRAMBLE
Figure 6: Basic Tx Path
During the Receive function the Low Pass and CTCSS filters are configured automatically as shown in Figure
7, with cut-off frequencies (-3dB) indicated.
Passband Gain0dB
Output Lower 3dB Point (Rx or Tx)300Hz
Output Upper 3dB Point (Rx or Tx)3400Hz
Scramble-Descramble5
Received Signal Passband Gain60dB
Received Signal Lower 3dB Point400Hz
Received Signal Upper 3dB Point2700Hz
Transmitted Signal Lower 3dB Point300Hz
Transmitted Signal Upper 3dB Point3400Hz