Datasheet MTP5103N3 Datasheet (CYStech) [ru]

CYStech Electronics Corp.

P-Channel Enhancement Mode MOSFET

Spec. No. : C400N3
Issued Date : 2011.11.28
Revised Date : 2012.04.18
Page No. : 1/8

BVDSS -30V

ID -4.5A

MTP5103N3

Features

Low gate charge

•

Compact and low profile SOT-23 package

•

Advanced trench process technology

•

High density cell design for ultra low on resistance

•

Pb-free lead plating and halogen-free package

•

Equivalent Circuit Outline

MTP5103N3 SOT-23

RDSON(TYP)

VGS=-10V, ID=-4.5A

VGS=-4.5V, ID=-3.5A

D

41mΩ

60mΩ

G：Gate
S：Source
D：Drain

Absolute Maximum Ratings (Ta=25°C)

Parameter Symbol Limits Unit

Drain-Source Voltage VDS -30 V
Gate-Source Voltage VGS ±20 V

Continuous Drain Current @TA=25°C
Continuous Drain Current @TA=70°C
Pulsed Drain Current @VGS=10V (Notes 1, 2) IDM -20 A

Maximum Power Dissipation (Note 3)

TA=25°C

TA=75°C

Operating Junction and Storage Temperature Tj, Tstg -55~+150

Note : 1. Pulse width limited by maximum junction temperature.

2. Pulse width≤ 300μs, duty cycle≤2%.

3. Surface mounted on 1 in² copper pad of FR-4 board.

G

S

ID -4.5 A
ID -3.5 A

1.38 W

PD

0.83 W

°C

MTP5103N3 CYStek Product Specification

Spec. No. : C400N3

CYStech Electronics Corp.

Issued Date : 2011.11.28
Revised Date : 2012.04.18
Page No. : 2/8

Thermal Performance

Parameter Symbol Limit Unit

Thermal Resistance, Junction-to-Ambient Rth,ja 90

°C/W

Note : Surface mounted on 1 in² copper pad of FR-4 board, 270°C/W when mounted on minimum copper pad.

Electrical Characteristics (Tj=25°C, unless otherwise specified)

Symbol Min. Typ. Max. Unit Test Conditions

Static

BV
V

*R

-30 - - V VGS=0, ID=-250µA

DSS

-1.0 -1.4 -2.5 V VDS=VGS, ID=-250µA

GS(th)

I

- - ±100 nA VGS=±20V, VDS=0

GSS

I

- - -1 µA VDS=-24V, VGS=0

DSS

I

- - -10 µA VDS=-24V, VGS=0, Tj=125°C

DSS

- 41 50 ID=-4.5A, VGS=-10V

DS(ON)

- 60 70

mΩ

ID=-3.5A, VGS=-4.5V

*GFS - 4.3 - S VDS=-10V, ID=-4.5A

Dynamic

Ciss - 885 -

Coss - 86 -

pF VDS=-10V, VGS=0, f=1MHz

Crss - 81 -

*t

*t

- 8 -

d(ON)

*tr - 12 -

- 30 -

d(OFF)

ns

V

=-15V, ID=-1A, VGS=-10V, RD=15Ω,

DS

RG=6Ω

*tf - 23 -

*Qg - 15 -

*Qgs - 3 -

nC VDS=-15V, ID=-4.5A, VGS=-10V

*Qgd - 7 -

Source-Drain Diode

*IS - - -4.5

*ISM - - -18

A

*VSD - - -1.2 V VGS=0V, IS=-1A

*trr - 32 - ns

*Qrr - 13.5 - nC

IF=-4.5A, dIF/dt=100A/μs

*Pulse Test : Pulse Width ≤300µs, Duty Cycle≤2%

Ordering Information

Device Package Shipping Marking

MTP5103N3

(Pb-free lead plating and halogen-free package)

SOT-23

3000 pcs / Tape & Reel 5103

MTP5103N3 CYStek Product Specification

5V

2.5V

GS

Typical Characteristics

Typical Output Characteristics

25

10V

9V
8V

20

7V
6V

15

-VGS=4.5V

-VGS=4V

CYStech Electronics Corp.

Brekdown Voltage vs Ambient Temperature

40

38

-VGS=3.5V

36

(V)

Spec. No. : C400N3
Issued Date : 2011.11.28
Revised Date : 2012.04.18
Page No. : 3/8

10

, Drain Current (A)

D

-I

5

0

012345678910

, Drain-Source Voltage(V)

-V

DS

-VGS=3V

-V=

34

, Drain-Source Breakdown Voltage

32

DSS

-BV

ID=-250μA,
V

30

-75 -50 -25 0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)

=0V

Static Drain-Source On-State resistance vs Drain Current

1000

VGS=-3V

VGS=-2.5V

100

Resistance(mΩ)

, Static Drain-Source On-State

DS(on)

R

VGS=-4V

VGS=-10V

10

0.001 0.01 0.1 1 10 100
, Drain Current(A)

-I

D

Static Drain-Source On-State Resistance vs Gate-Source

Voltage

200

180

160

140

120

100

80

, Static Drain-Source On-

60

State Resistance(mΩ)

DS( ON)

40

R

ID=-4.5A

=-3.5A

I

D

20

0

024681

-V

, Gate-Source Voltage(V)

GS

VGS=-4.5V

, Source-Drain Voltage(V)

SD

-V

, Static Drain-Source On-State

DS( ON)

R

0

1.2

0.8

0.6

0.4

0.2

Resistance(mΩ)

Reverse Drain Current vs Source-Drain Voltage

VGS=0V

1

024681

, Reverse Drain Current (A)

-I

DR

Drain-Source On-State Resistance vs Junction Tempearture

Tj=25°C

Tj=150°C

0

90
85
80
75

VGS=-4.5V, ID=-4A

70
65
60
55
50
45
40

VGS=-10V, ID=-5A

35
30
25
20

-60 -20 20 60 100 140 180
Tj, Junction Temperature(°C)

MTP5103N3 CYStek Product Specification

CYStech Electronics Corp.

Typical Characteristics(Cont.)

Capacitance vs Drain-to-Source Voltage

10000

1000

C

oss

100

Capacitance---(pF)

Crss

Ciss

,Threshold Voltage-(V)

GS( th)

-V

2.2

1.8

1.6

1.4

1.2

Spec. No. : C400N3
Issued Date : 2011.11.28
Revised Date : 2012.04.18
Page No. : 4/8

Threshold Voltage vs Junction Tempearture

2

ID=-250uA

1

10

0.1 1 10 100
, Drain-Source Voltage(V)

-V

DS

Forward Transfer Admittance vs Drain Current

10

1

0.1

, Forward Transfer Admittance-(S)

FS

G

0.01

0.001 0.01 0.1 1 10

-I

, Drain Current(A)

D

Maximum Safe Operating Area

100

VDS=-10V
Pulsed
Ta=25°C

0.8

-60 -40 -20 0 20 40 60 80 100 120 140 160

Tj, Junction Temperature(°C)

Gate Charge Characteristics

12

10

8

VDS=-15V

=-4.5A

I

D

6

4

, Gate-Source Voltage(V)

GS

2

-V

0

0246810121416

Maximum Drain Current vs JunctionTemperature

6

Qg, Total Gate Charge(nC)

R

10

DS( ON)

Limited

1

, Drain Current (A)

D

-I

0.1

0.01

0.01 0.1 1 10 100

-V

, Drain-Source Voltage(V)

DS

100μs

1ms

10ms

100ms

DC

5

4

3

2

, Maximum Drain Current(A)

D

1

-I

TA=25°C, VGS=-10V

0

25 50 75 100 125 150 175

Tj, Junction Temperature(°C)

MTP5103N3 CYStek Product Specification

CYStech Electronics Corp.

p

Typical Characteristics(Cont.)

Power Derating Curve

1.6

Spec. No. : C400N3
Issued Date : 2011.11.28
Revised Date : 2012.04.18
Page No. : 5/8

1.4

1.2

1

0.8

0.6

, Power Dissipation(W)

D

0.4

P

0.2

0

0 20 40 60 80 100 120 140 160

T

1

D=0.5

0.2

0.1

0.1

0.05

Mounted on FR-4 board
with 1 in²

, Ambient Temperature(℃)

A

ad area

Transient Thermal Response Curves

JA

1.R

(t)= r(t)*R

θ

2.Duty Factor, D=t1/t

3.TJM-TC=PDM*Z

4.R

θJA

=90

°C/W

θJA

2

JC

(t)

θ

0.02

Normalized Transient Thermal Resistance

0.01

Single Pulse

0.01

1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 1.E+01 1.E+02

t

, Square Wave Pulse Duration(s)

1

MTP5103N3 CYStek Product Specification

Reel Dimension

CYStech Electronics Corp.

Spec. No. : C400N3
Issued Date : 2011.11.28
Revised Date : 2012.04.18
Page No. : 6/8

Carrier Tape Dimension

MTP5103N3 CYStek Product Specification

CYStech Electronics Corp.

Recommended wave soldering condition

Product Peak Temperature Soldering Time

Spec. No. : C400N3
Issued Date : 2011.11.28
Revised Date : 2012.04.18
Page No. : 7/8

Pb-free devices

260 +0/-5 °C

Recommended temperature profile for IR reflow

5 +1/-1 seconds

Profile feature Sn-Pb eutectic Assembly

Average ramp-up rate

(Tsmax to Tp)

Preheat

−Temperature Min(T

S min)

−Temperature Max(TS max)

−Time(ts min to ts max)

Time maintained above:

−Temperature (TL)

− Time (tL)

Peak Temperature(TP)

Time within 5°C of actual peak

temperature(tp)

Ramp down rate

Time 25 °C to peak temperature

Note : All temperatures refer to topside of the package, measured on the package body surface.

3°C/second max. 3°C/second max.

100°C
150°C

60-120 seconds

183°C

60-150 seconds

240 +0/-5 °C 260 +0/-5 °C

10-30 seconds 20-40 seconds

6°C/second max. 6°C/second max.

6 minutes max. 8 minutes max.

Pb-free Assembly

150°C
200°C

60-180 seconds

217°C

60-150 seconds

MTP5103N3 CYStek Product Specification

SOT-23 Dimension

CYStech Electronics Corp.

Spec. No. : C400N3
Issued Date : 2011.11.28
Revised Date : 2012.04.18
Page No. : 8/8

A

L

3

S

B

1

V

C

D

DIM

Min. Max. Min. Max.

G

Inches

2

H

Millimeters Inches Millimeters

K

J

DIM

Marking:

5103

3-Lead SOT-23 Plastic

Surface Mounted Package

CYStek Package Code: N3

Style : Pin 1.Gate 2.Source 3.Drain

Min. Max. Min. Max.
A 0.1102 0.1204 2.80 3.04 J 0.0035 0.0071 0.09 0.18
B 0.0472 0.0669 1.20 1.70 K 0.0276 REF 0.70 REF
C 0.0335 0.0512 0.89 1.30 L 0.0374* 0.95*
D 0.0118 0.0197 0.30 0.50 S 0.0830 0.1161 2.10 2.95

G 0.0669 0.0910 1.70 2.30 V 0.0098 0.0256 0.25 0.65

H 0.0004 0.0040 0.01 0.10

Notes : 1.Controlling dimension : millimeters.

Material :

• Lead : Pure tin plated.

• Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0.

2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.

3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.

Important Notice:

• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.

• CYStek reserves the right to make changes to its products without notice.

• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.

• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.

*:Typical

MTP5103N3 CYStek Product Specification