Datasheet MTP3403AN3, MTP3413N3 Datasheet (CYStech) [ru]

Page 1
CYStech Electronics Corp.
P-Channel Logic Level Enhancement Mode MOSFET
Spec. No. : C394N3 Issued Date : 2012.01.19 Revised Date : Page No. : 1/8
MTP3413N3
Features
1.8V gate rated
Advanced trench process technology
High density cell design for ultra low on resistance
Pb-free lead plating and halogen-free package
Equivalent Circuit Outline
MTP3413N3
BVDSS -20V ID -4.9A
RDSON(TYP)
VGS=-4.5V, ID=-4.3A VGS=-2.5V, ID=-2.5A VGS=-1.8V, ID=-2A
SOT-23
D
39mΩ 50mΩ 65mΩ
GGate SSource DDrain
G
S
Absolute Maximum Ratings (Ta=25°C)
Parameter Symbol Limits Unit Drain-Source Voltage VDS -20 V Gate-Source Voltage VGS ±8 V
Continuous Drain Current @TC=25°C Continuous Drain Current @TC=100°C Pulsed Drain Current (Note 1&2) IDM -35 A Maximum Power Dissipation @TA=25°C
Maximum Power Dissipation @TA=70°C
Operating Junction and Storage Temperature Tj, Tstg -55~+150
Note : 1. Pulse width limited by maximum junction temperature.
ID -4.9 A ID -3.1 A
PD
1.38 W
0.88
°C
2. Pulse width≤300μs, duty cycle≤2%
Page 2
Spec. No. : C394N3
CYStech Electronics Corp.
Thermal Performance
Parameter Symbol Limit Unit
Thermal Resistance, Junction-to-Ambient (Note) Rth,ja 90
Issued Date : 2012.01.19 Revised Date : Page No. : 2/8
°C/W
Note : Surface mounted on 1 in² copper pad of FR-4 board, 270°C/W when mounted on minimum copper pad.
Electrical Characteristics (Tj=25°C, unless otherwise specified)
Symbol Min. Typ. Max. Unit Test Conditions
Static
BV V
-20 - - V VGS=0, ID=-250µA
DSS
-0.4 -0.6 -0.95 V VDS=VGS, ID=-250µA
GS(th)
I
- - ±100 nA VGS=±8V, VDS=0
GSS
I
DSS
- - -1 µA VDS=-20V, VGS=0
- - -10 µA VDS=-20V, VGS=0, Tj=55°C
- 39 50 VGS=-4.5V, ID=-4.3A
*R
DS(ON)
- 50 60 VGS=-2.5V, ID=-2.5A
- 65 75
mΩ
VGS=-1.8V, ID=-2.0A
Dynamic
Ciss - 1220 -
Coss - 103 -
pF VDS=-10V, VGS=0, f=1MHz
Crss - 92 -
*t
*t
- 12.5 -
d(ON)
*tr - 12 -
- 70 -
d(OFF)
ns
VDS=-10V, ID=-1A, VGS=-4.5V, RD=10Ω,
=6Ω
R
G
*tf - 20 -
*Qg - 10 -
*Qgs - 1.9 -
nC VDS=-10V, ID=-4.3A, VGS=-4.5V
*Qgd - 2.7 -
Source-Drain Diode
*ISD - - -1.3 *ISM - - -35
A
*VSD - -0.76 -1 V VGS=0V, IS=-1.3A
*trr - 23 - ns
*Qrr - 8.5 - nC
IS=-1.3A, VGS=0V, dI/dt=100A/µs
*Pulse Test : Pulse Width 300µs, Duty Cycle≤2%
Ordering Information
Device Package Shipping
MTP3413N3
(Pb-free lead plating and halogen-free package)
SOT-23
3000 pcs / Tape & Reel
Page 3
V
V
V
GS
Typical Characteristics
Typical Output Characteristics
20
5V
4.5 4V
15
3.5 3V
2.5
10
Drain Current (A)
,
D
-I 5
0
012345
Static Drain-Source On-State resistance vs Drain Current
1000
-V
Drain-Source Voltage(V)
,
DS
CYStech Electronics Corp.
Brekdown Voltage vs Ambient Temperature
30
28
26
-VGS=1.8V
-VGS=1.5V
(V)
24
, Drain-Source Breakdown Voltage
22
DSS
-BV
20
-75 -50 -25 0 25 50 75 100 125 150 175
Reverse Drain Current vs Source-Drain Voltage
1.2
Spec. No. : C394N3 Issued Date : 2012.01.19 Revised Date : Page No. : 3/8
Tj, Junction Temperature(°C)
ID=-250μA,
=0V
V
100
VGS=-1.8V
VGS=-2.5V
VGS=0V
1
0.8
Tj=25°C
Tj=150°C
0.6
Resistance(mΩ)
, Static Drain-Source On-State
DS (on)
R
VGS=-4.5V
10
0.001 0.01 0.1 1 10
D
, Drain Curre nt(A)
-I
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
200
180
160
140
120
, Static Drain-Source On-
DS( ON)
R
State Resistance(mΩ)
100
80
60
40
ID=-4.3A
=-2.5A
I
D
=-0.2A
I
D
20
0
024681
-V
, Gate-Source Voltage(V)
GS
VGS=-10V
0
, Source-Drain Voltage(V)
SD
0.4
-V
0.2 024681
, Reverse Drain Current (A)
-I
Drain-Source On-State Resistance vs Junction Tempearture
DR
0
100
90
80
VGS=-1.8V, ID=-2A
VGS=-2.5V, ID=-2.5A
70
60
50
Resistance(mΩ)
, Static Drain-Source On-State
40
DS( ON)
30
R
VGS=-4.5V, ID=-4.3A
20
-60 -20 20 60 100 140 180 Tj, Junction Temperature(°C)
Page 4
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Capacitance vs Drain-to-Source Voltage
10000
1000
Ciss
0.8
0.7
0.6
Spec. No. : C394N3 Issued Date : 2012.01.19 Revised Date : Page No. : 4/8
Threshold Voltage vs Junction Tempearture
ID=-250μA
100
Capacitance---(pF)
Crss
10
0.1 1 10 100 , Drain-Source Voltage(V)
-V
DS
Forward Transfer Admittance vs Drain Current
10
1
0.1
, Forward Transfer Admittance-(S)
FS
G
0.01
0.001 0.01 0.1 1 10
-I
, Drain Current(A)
D
C
oss
VDS=-10V Pulsed Ta=25°C
0.5
,Threshold Voltage-(V)
0.4
GS( th)
-V
0.3
0.2
-60 -40 -20 0 20 40 60 80 100 120 140 160
Tj, Junction Temperature(°C)
Gate Charge Characteristics
10
8
VDS=-10V
, Gate-Source Voltage(V)
GS
-V
6
4
2
0
=-4.3A
I
D
0 2 4 6 8 10 12 14 16 18
Qg, Total Gate C harge(nC)
100
10
Maximum Safe Operating Area
10μs
100μs
Maximum Drain Current vs JunctionTemperature
6
5
4
1ms
1
, Drain Current (A)
D
-I
0.1
TA=25°C, Tj=150°C
=-4.5V
V
GS
Single Pulse
0.01
0.01 0.1 1 10 100
-V
, Drain-Source Voltage(V)
DS
10ms
100ms
DC
3
2
, Maximum Drain Current(A)
1
D
I
TA=25°C, VGS=-4.5V
0
25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
Page 5
CYStech Electronics Corp.
p
Typical Characteristics(Cont.)
Power Derating Curve
1.6
Spec. No. : C394N3 Issued Date : 2012.01.19 Revised Date : Page No. : 5/8
1.4
1.2
1
0.8
0.6
, Power Dissipation(W)
D
0.4
P
0.2
0
0 20 40 60 80 100 120 140 160
T
1
D=0.5
0.2
0.1
0.1
Resistance
0.05
Mounted on FR-4 board with 1 in²
, Ambient Temperature(℃)
A
ad area
Transient Thermal Response Curves
JA
1.R
(t)=r(t)*R
θ
2.Duty Factor, D=t1/t
3.TJM-TA=PDM*R
4.R
θJA
=270
°C/W
θJA
2
JA
(t)
θ
0.02
0.01
r(t), Norma lized Effec tiveTra nsient The rmal
Single Pulse
0.01
1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 1.E+01 1.E+02
t
, Square Wave Pulse Duration(s)
1
Page 6
Reel Dimension
CYStech Electronics Corp.
Spec. No. : C394N3 Issued Date : 2012.01.19 Revised Date : Page No. : 6/8
Carrier Tape Dimension
Page 7
CYStech Electronics Corp.
Recommended wave soldering condition
Product Peak Temperature Soldering Time
Spec. No. : C394N3 Issued Date : 2012.01.19 Revised Date : Page No. : 7/8
Pb-free devices
260 +0/-5 °C
Recommended temperature profile for IR reflow
5 +1/-1 seconds
Profile feature Sn-Pb eutectic Assembly
Average ramp-up rate
(Tsmax to Tp)
Preheat
Temperature Min(T
S min)
Temperature Max(TS max)
Time(ts min to ts max)
Time maintained above:
Temperature (TL)
Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Note : All temperatures refer to topside of the package, measured on the package body surface.
3°C/second max. 3°C/second max.
100°C 150°C
60-120 seconds
183°C
60-150 seconds
240 +0/-5 °C 260 +0/-5 °C
10-30 seconds 20-40 seconds
6°C/second max. 6°C/second max.
6 minutes max. 8 minutes max.
Pb-free Assembly
150°C 200°C
60-180 seconds
217°C
60-150 seconds
Page 8
SOT-23 Dimension
CYStech Electronics Corp.
Spec. No. : C394N3 Issued Date : 2012.01.19 Revised Date : Page No. : 8/8
Marking:
3-Lead SOT-23 Plastic
Surface Mounted Package
CYStek Package Code: N3
C
DIM
A
L
3
S
B
1
V
D
G
Inches
2
H
K
Millimeters Inches Millimeters
Min. Max. Min. Max.
J
DIM
Style: Pin 1.Gate 2.Source 3.Drain
Min. Max. Min. Max. A 0.1102 0.1204 2.80 3.04 J 0.0032 0.0079 0.08 0.20 B 0.0472 0.0669 1.20 1.70 K 0.0118 0.0266 0.30 0.67 C 0.0335 0.0512 0.89 1.30 L 0.0335 0.0453 0.85 1.15 D 0.0118 0.0197 0.30 0.50 S 0.0830 0.1161 2.10 2.95
G 0.0669 0.0910 1.70 2.30 V 0.0098 0.0256 0.25 0.65
H 0.0000 0.0040 0.00 0.10
Notes: 1.Controlling dimension: millimeters.
Material:
Lead: Pure tin plated.
Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Important Notice:
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
CYStek reserves the right to make changes to its products without notice.
CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
TE
13
Page 9
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