Datasheet MT5C6405C-55L-IT, MT5C6405C-55L-XT, MT5C6405C-45L-XT, MT5C6405C-45L-883C, MT5C6405C-25L-XT Datasheet (AUSTIN)

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Page 1
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
FEATURES
• Battery Backup: 2V data retention
• High-performance, low-power CMOS double-metal process
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\
• All inputs and outputs are TTL compatible
OPTIONS MARKING
• Timing
12ns access -12 15ns access -15 20ns access -20 25ns access -2 5 35ns access -3 5 45ns access -45* 55ns access -55* 70ns access -70*
• Package(s)
Ceramic DIP (300 mil) C No. 106 Ceramic LCC E C No. 204
• Operating T emperature Ranges
Industrial (-40oC to +85oC) IT Military (-55oC to +125oC) XT
• 2V data retention/low power L
*Electrical characteristics identical to those provided for the 35ns
access devices.
PIN ASSIGNMENT
(Top View)
AVAILABLE AS MILITARY SPECIFICATIONS
• SMD 5962-86859
• MIL-STD-883
GENERAL DESCRIPTION
The Austin Semiconductor SRAM family employs
high-speed, low-power CMOS designs using a four-transistor memory cell. Austin Semiconductor SRAMs are fabricated using double-layer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Austin Semiconductor offers chip enable (CE\) and output enable (OE\) capability. These enhancements can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ and OE\ go LOW . The device offers a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. All devices operate from a single +5V power supply and all inputs and outputs are fully TTL compatible.
16K x 4 SRAM
SRAM MEMORY ARRAY
For more products and information
please visit our web site at
www.austinsemiconductor .com
28-Pin LCC (EC)
3 2 1 28 27
13 14 15 16 17
4 5 6 7 8
9 10 11 12
26 25 24 23 22 21 20 19 18
A6 A7 A8
A9 A10 A11 A12 A13
CE\
NC A4 A3 A2 A1 A0 DQ4 DQ3 DQ2
DQ1
WE\
NC
Vss
OE\
A5NCNC
Vcc
NC
24-Pin DIP (C)
(300 MIL)
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
A5 A6 A7 A8
A9 A10 A11 A12 A13 CE\ OE\
Vss
Vcc A4 A3 A2 A1 A0 NC DQ4 DQ3 DQ2 DQ1 WE\
Page 2
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
FUNCTIONAL BLOCK DIA GRAM
TRUTH TABLE
ROW DECODER
1,048,576-BIT
MEMORY ARRAY
I/O CONTROL
V
CC
GND
D
WE\
A A A A A A A A A
COLUMN DECODER
A A A A A A A A A A
POWER
DOWN
CE\
(LSB)
(LSB)
Q
OE\
MODE OE\ CE\ WE\ DQ POWER
STANDBY X H X HIGH-Z STANDBY READ L L H Q ACTIVE READ H L H HIGH-Z ACTIVE WRITE X L L D ACTIVE
Page 3
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
ABSOLUTE MAXIMUM RATINGS*
Voltage on any Input or DQ Relative to Vss....-0.5V to +7.0V
1
Storage Temperature…...................................-65oC to +150oC
Power Dissipation.................................................................1W
Max Junction T emperature..................................................+175°C
Lead T emperature (soldering 10 seconds)........................+260oC
Short Circuit Output Current...........................................20mA
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability .
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TC < 125oC; VCC = 5V +10%)
CAPACITANCE
1 All voltage referenced to Vss.
DESCRIPTION CONDITIONS SYM MIN MAX UNITS NOTES
Input High (Logic 1) Voltage
V
IH
2.2 Vcc+0.5V V 1
Input Low (Logic 0) Voltage
V
IL
-0.5 0.8 V 1, 2
Input Leakage Current
0V <
VIN < V
CC
IL
I
-10 10 µA
Output Leakage Current
Outputs Disabled 0V < V
OUT
< V
CC
IL
O
-10 10 µA
Output High Voltage
I
OH
= -4.0mA V
OH
2.4 V 1
Output Low Voltage
I
OL
= 8.0mA V
OL
0.4 V 1
SYM -12 -15 -20 -25 -35 UNITS NOTES
I
cc
140 125 110 100 90 mA 3
Power Supply Current: Standby
I
SBT1
50 45 40 35 30 mA
I
SBC2
25 25 25 25 25 mA
Power Supply Current: Operating
PARAMETER
CE\ >
(V
CC
-0.2); VCC = MAX
All Other Inputs <
0.2V
or >
(VCC - 0.2V), f = 0 Hz
CE\ >
VIH; VCC = MAX
f = 0 Hz
MAX
CONDITIONS
CE\ <
VIL; VCC = MAX
Output Open
DESCRIPTION CONDITIONS SYM MAX UNITS NOTES
Input Capacitance C
I
8pF 4
Output Capacitance C
O
10 pF 4
T
A
= 25oC, f = 1MHz
Vcc = 5V
Page 4
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55oC < TC < 125oC; VCC = 5V +10%)
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
READ CYCLE
READ cycle time
t
RC
12 15 20 25 35 ns
Address access time
t
AA
12 15 20 25 35 ns
Chip Enable access time
t
ACE
12 15 20 25 35 ns
Output hold from address change
t
OH
22222 ns
Chip Enable to output in Low-Z
t
LZCE
22222 ns7
Chip disable to output in High-Z
t
HZCE
7 8 10 12 15 ns 6, 7
Chip Enable to power-up time
t
PU
00000 ns
Chip disable to power-down time
t
PD
12 15 20 25 35 ns
Output Enable access time
t
AOE
6 7 8 10 15 ns
Output Enable to output in Low-Z
t
LZOE
00008 ns
Output disable to output in High-Z
t
HZOE
6 7 8 10 15 ns 6
WRITE CYCLE
WRITE cycle time
t
WC
12 15 20 25 35 ns
Chip Enable to end of write
t
CW
10 12 15 20 25 ns
Address valid to end of write
t
AW
10 12 15 20 25 ns
Address setup time
t
AS
00000 ns
Address hold from end of write
t
AH
00000 ns
WRITE pulse width
t
WP
10 12 15 20 25 ns
Data setup time
t
DS
7 8 10 12 15 ns
Data hold time
t
DH
00000 ns
Write disable to output in Low-Z
t
LZWE
22222 ns7
Write Enable to output in High-Z
t
HZWE
060708010015ns 6, 7
NOTES
DESCRIPTION
-12
SYMBOL UNITS
-35-25-20-15
Page 5
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
AC TEST CONDITIONS
Input pulse levels ...................................... Vss to 3.0V
Input rise and fall times ......................................... 5ns
Input timing reference levels ................................ 1.5V
Output reference levels ....................................... 1.5V
Output load ................................. See Figures 1 and 2
NOTES
1 . All voltages referenced to VSS (GND). 2 . -3V for pulse width < 20ns
3. ICC is dependent on output loading and cycle rates. The specified value applies with the outputs unloaded, and f = 1 Hz.
tRC (MIN)
4. This parameter is guaranteed but not tested.
5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted.
6. t
HZCE
, t
HZOE
and t
HZWE
are specified with CL = 5pF as in Fig. 2. Transition is measured ±200mV typical from steady state voltage, allowing for actual tester RC time constant.
7. At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
, and t
HZWE
is less than t
LZWE
.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip enables and output enables are held in their active state.
10. Address valid prior to, or coincident with, latest occurring chip enable.
11.tRC = Read Cycle Time.
12 . CE2 timing is the same as CE1\ timing. The waveform is inverted.
Fig. 1 Output Load
Equivalent
Fig. 2 Output Load
Equivalent
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
2
3
2
3
1234
1234
1234
1234
DON’T CARE UNDEFINED
LOW Vcc DA T A RETENTION WA VEFORM
2
3
2
3
23
4
23
4
2
3
2
3
23
4
23
4
DA TA RETENTION MODE
VDR > 2V
4.5V
4.5V
V
DR
t
CDR
t
R
V
IH
V
IL
V
CC
CE\
DESCRIPTION SYM MIN MAX UNITS NOTES
V
CC
for Retention Data V
DR
2 --- V
Data Retention Current
CE\ >
(VCC - 0.2V)
V
IN
> (VCC - 0.2V)
or <
0.2V
V
CC
= 2V I
CCDR
1mA
Chip Deselect to Data Retention Time
t
CDR
0 --- ns 4
Operation Recovery Time
t
R
t
RC
ns 4, 11
CONDITIONS
+5V
Q
255
30pF
480
5 pF
+5V
Q
255
480
Page 6
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
tAA
tOH
tRCtRC
PREVIOUS DATA VALID
VALID
DATA VALID
ADDRESS
DQ
READ CYCLE NO. 1
8, 9
t
RC
t
AA
t
OH
23
4
23
4
23
4
DON’T CARE UNDEFINED
tPD
tPU
tHZCEtACE
tLZCE
tHZOE
tLZOE
tAOE
tRCtRC
DATA VALID
CE\
OE\
DQ
Icc
READ CYCLE NO. 2
7, 8, 10
t
RC
t
AOE
t
LZOE
t
HZOE
t
HZCE
t
LZCE
t
ACE
t
PU
t
PD
HIGH-Z
Page 7
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
NOTE: Output enable (OE\) is inactive (HIGH).
WRITE CYCLE NO. 2
7, 12, 13
(Write Enabled Controlled)
23
4
23
4
234
5
234
5
DON’T CARE UNDEFINED
WRITE CYCLE NO. 1
12
(Chip Enabled Controlled)
tDHtDS
tWP1tWP1
tAH
tCW
tAW
tCWtAS
tWCtWC
HIGH Z
DATA VAILD
ADDRESS
CE\
WE\
D
Q
t
WC
t
AW
t
AS
t
CW
t
AH
t
WP
t
DS
t
DH
1
tDH
tWP1tWP1
tAS
tAW
tCW
tAH
tCW
tWCtWC
DATA VALID
ADDRESS
CE\
WE\
D
Q
HIGH-Z
t
DH
t
DS
t
WC
t
AW
t
AH
t
CW
t
AS
t
WP
234567890123456
7
1
1
234567890123456789012
3
DQ
DQ
Q
HIGH-Z
Q
HIGH-Z
Page 8
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
MECHANICAL DEFINITIONS*
ASI Case #106 (Package Designator C)
SMD 5962-86859, Case Outline L
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.
* All measurements are in inches.
eA
c
D
E
MIN MAX
A --- 0.200
b 0.014 0.026
b2 0.045 0.065
c 0.008 0.018 D --- 1.280 E 0.220 0.310
eA
e
L 0.125 0.200 Q 0.015 0.060
S1 0.005 ---
SYMBOL
0.100 BSC
SMD SPECIFICATIONS
0.300 BSC
A
Q
L
e
b
b2
S1
Page 9
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
* All measurements are in inches.
MECHANICAL DEFINITIONS*
ASI Case #204 (Package Designator EC)
SMD 5962-86859, Case Outline U
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.
A
A1
D3
MIN MAX
A 0.060 0.075
A1 0.050 0.065 B1 0.022 0.028 B2
D 0.342 0.358
D1 D2 D3 --- 0.358
E 0.540 0.560
E1 E2 E3 --- 0.558
e h L 0.045 0.055
L2 0.075 0.095
SYMBOL
SMD SPECIFICATIONS
0.072 REF
0.200 BSC
0.100 BSC
0.040 REF
0.050 BSC
0.200 BSC
0.400 BSC
E
D
E3
hx45
o
E1
L2
B1
D1
L
e
B2
E2
D2
h x 45
o
Page 10
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
*AVAILABLE PROCESSES
IT = Industrial T emperature Range -40oC to +85oC XT = Extended T emperature Range -55oC to +125oC 883C = Full Military Processing -55oC to +125oC
** OPTIONS
L = 2V Data Retention/Low Power
ORDERING INFORMA TION
Device Number
Package
Type
Speed
ns
Options** Process Device Number
Package
Type
Speed
ns
Options** Process
MT5C6405 C -12 L /* MT5C6405 EC -12 L /* MT5C6405 C -15 L /* MT5C6405 EC - 15 L /* MT5C6405 C -20 L /* MT5C6405 EC -20 L /* MT5C6405 C -25 L /* MT5C6405 EC -25 L /* MT5C6405 C -35 L /* MT5C6405 EC -35 L / * MT5C6405 C -45 L /* MT5C6405 EC -45 L /* MT5C6405 C -55 L /* MT5C6405 EC -55 L /* MT5C6405 C -70 L /* MT5C6405 EC -70 L /*
EXAMPLE: MT5C6405C-25L/XT EXAMPLE: MT5C6405EC-15L/IT
Page 11
SRAM
MT5C6405
Austin Semiconductor, Inc.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
ASI Package Designator C
ASI Part # SMD Part #
MT5C6805C-35/883C 5962-8685918LA MT5C6805C-35L/883C 5962-8685917LA MT5C6805C-45/883C 5962-8685916LA MT5C6805C-45L/883C 5962-8685915LA MT5C6805C-55/883C 5962-8685914LA MT5C6805C-55L/883C 5962-8685913LA MT5C6805C-70/883C 5962-8685912LA MT5C6805C-70L/883C 5962-8685911LA
ASI Package Designator EC
ASI Part # SMD Part #
MT5C6805EC-35/883C 5962-8685918UA MT5C6805EC-35L/883C 5962-8685917UA MT5C6805EC-45/883C 5962-8685916UA MT5C6805EC-45L/883C 5962-8685915UA MT5C6805EC-55/883C 5962-8685914UA MT5C6805EC-55L/883C 5962-8685913UA MT5C6805EC-70/883C 5962-8685912UA MT5C6805EC-70L/883C 5962-8685911UA
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
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