Datasheet MT5C6405 Datasheet (ASI)

Austin Semiconductor, Inc.

SRAM

MT5C6405

16K x 4 SRAM

SRAM MEMORY ARRAY

AVAILABLE AS MILITARY SPECIFICATIONS

• SMD 5962-86859

• MIL-STD-883

FEATURES

• High Speed: 12, 15, 20, 25, 35, 45, 55, and 70ns

• Battery Backup: 2V data retention

• High-performance, low-power CMOS double-metal process

• Single +5V (+10%) Power Supply

• Easy memory expansion with CE\

• All inputs and outputs are TTL compatible

OPTIONS MARKING

• Timing

12ns access -12 15ns access -15 20ns access -20 25ns access -2 5 35ns access -3 5 45ns access -45* 55ns access -55* 70ns access -70*

PIN ASSIGNMENT

(Top View)

24-Pin DIP (C)

(300 MIL)

1 2 3 4 5 6 7 8 9 10 11 12

A5NCNC

Vss

OE\

NC

24 23 22 21 20 19 18 17 16 15 14 13

Vcc

WE\

NC

DQ1

Vcc A4 A3 A2 A1 A0 NC DQ4 DQ3 DQ2 DQ1 WE\

26

NC

25

A4

24

A3

23

A2

22

A1

21

A0

20

DQ4

19

DQ3

18

DQ2

A5 A6 A7 A8

A9 A10 A11 A12 A13 CE\ OE\

Vss

28-Pin LCC (EC)

3 2 1 28 27

A6

4

A7

5

A8

6

A9

7

A10

8

A11

9

A12

10

A13

11

CE\

12

13 14 15 16 17

• Package(s)

Ceramic DIP (300 mil) C No. 106 Ceramic LCC E C No. 204

• Operating T emperature Ranges

Industrial (-40oC to +85oC) IT Military (-55oC to +125oC) XT

• 2V data retention/low power L

*Electrical characteristics identical to those provided for the 35ns

access devices.

For more products and information

please visit our web site at

www.austinsemiconductor .com

MT5C6405

Rev. 2.0 5/01

GENERAL DESCRIPTION

The Austin Semiconductor SRAM family employs

high-speed, low-power CMOS designs using a four-transistor memory cell. Austin Semiconductor SRAMs are fabricated using double-layer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Austin Semiconductor offers chip enable (CE\) and output enable (OE\) capability. These enhancements can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ and OE\ go LOW . The device of fers a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. All devices operate from a single +5V power supply and all inputs and outputs are fully TTL compatible.

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

1

Austin Semiconductor, Inc.

FUNCTIONAL BLOCK DIA GRAM

V

CC

GND

SRAM

MT5C6405

A

D

A A A A A A A

ROW DECODER

1,048,576-BIT

MEMORY ARRAY

I/O CONTROL

Q

CE\

A

(LSB)

COLUMN DECODER

OE\

POWER

DOWN

(LSB)

WE\

A A A A A A A A A A

MT5C6405

Rev. 2.0 5/01

TRUTH TABLE

MODE OE\ CE\ WE\ DQ POWER

STANDBY X H X HIGH-Z STANDBY READ L L H Q ACTIVE READ H L H HIGH-Z ACTIVE WRITE X L L D ACTIVE

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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Austin Semiconductor, Inc.

SRAM

MT5C6405

ABSOLUTE MAXIMUM RATINGS*

Voltage on any Input or DQ Relative to Vss....-0.5V to +7.0V

Storage Temperature…...................................-65oC to +150oC

Power Dissipation.................................................................1W

Max Junction T emperature..................................................+175°C

Lead T emperature (soldering 10 seconds)........................+260oC

Short Circuit Output Current...........................................20mA

1 All voltage referenced to Vss.

*Stresses greater than those listed under "Absolute Maximum

1

Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability .

ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS

(-55oC < TC < 125oC; VCC = 5V +10%)

DESCRIPTION CONDITIONS SYM MIN MAX UNITS NOTES

Input High (Logic 1) Voltage Input Low (Logic 0) Voltage Input Leakage Current

Output Leakage Current Output High Voltage

Output Low Voltage

0V <

VIN < V

CC

Outputs Disabled 0V < V

I

OH

I

OL

< V

OUT

CC

= -4.0mA V

= 8.0mA V

V V

IL

OH

OL

2.2 Vcc+0.5V V 1

IH

-0.5 0.8 V 1, 2

IL

-10 10 µA

I

-10 10 µA

O

2.4 V 1

0.4 V 1

PARAMETER

Power Supply Current: Operating

Power Supply Current: Standby

CONDITIONS

VIL; VCC = MAX

CE\ <

Output Open

VIH; VCC = MAX

CE\ >

f = 0 Hz

(V

CE\ >

All Other Inputs <

or >

-0.2); VCC = MAX

CC

(VCC - 0.2V), f = 0 Hz

0.2V

SYM -12 -15 -20 -25 -35 UNITS NOTES

I

SBT1

I

SBC2

140 125 110 100 90 mA 3

cc

50 45 40 35 30 mA

25 25 25 25 25 mA

CAPACITANCE

DESCRIPTION CONDITIONS SYM MAX UNITS NOTES

Input Capacitance C Output Capacitance C

= 25oC, f = 1MHz

T

A

Vcc = 5V

I

O

8pF 4

10 pF 4

MAX

MT5C6405

Rev. 2.0 5/01

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

3

SRAM

MT5C6405

Austin Semiconductor, Inc.

ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS

(Note 5) (-55oC < TC < 125oC; VCC = 5V +10%)

DESCRIPTION

READ CYCLE

READ cycle time Address access time Chip Enable access time Output hold from address change Chip Enable to output in Low-Z Chip disable to output in High-Z Chip Enable to power-up time Chip disable to power-down time Output Enable access time Output Enable to output in Low-Z Output disable to output in High-Z

WRITE CYCLE

WRITE cycle time Chip Enable to end of write Address valid to end of write Address setup time Address hold from end of write WRITE pulse width Data setup time Data hold time Write disable to output in Low-Z Write Enable to output in High-Z

-12

SYMBOL UNITS

t t

t

LZCE

t

HZCE

t t

t

AOE

t

LZOE

t

HZOE

t t t

t t

t

t t

t

LZWE

t

HZWE

MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX

RC AA

ACE

OH

12 15 20 25 35 ns

12 15 20 25 35 ns 22222 ns 22222 ns7

7 8 10 12 15 ns 6, 7

PU PD

00000 ns

12 15 20 25 35 ns

6 7 8 10 15 ns

00008 ns

6 7 8 10 15 ns 6

WC CW

AW

AS AH

WP

DS DH

12 15 20 25 35 ns 10 12 15 20 25 ns 10 12 15 20 25 ns

00000 ns 00000 ns

10 12 15 20 25 ns

7 8 10 12 15 ns 00000 ns 22222 ns7 060708010015ns 6, 7

-35-25-20-15 NOTES

MT5C6405

Rev. 2.0 5/01

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

4

Austin Semiconductor, Inc.

3

1234

3

4

3

4

SRAM

MT5C6405

AC TEST CONDITIONS

Input pulse levels ...................................... Vss to 3.0V

Input rise and fall times ......................................... 5ns

Input timing reference levels ................................ 1.5V

Output reference levels ....................................... 1.5V

Output load ................................. See Figures 1 and 2

NOTES

1 . All voltages referenced to VSS (GND). 2 . -3V for pulse width < 20ns

3. ICC is dependent on output loading and cycle rates. The specified value applies with the outputs unloaded, and f = 1 Hz.

tRC (MIN)

4. This parameter is guaranteed but not tested.

5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted.

6. t

in Fig. 2. Transition is measured ±200mV typical from steady state voltage, allowing for actual tester RC time constant.

HZCE

, t

HZOE

and t

are specified with CL = 5pF as

HZWE

Q

255

Fig. 1 Output Load

Equivalent

+5V

480

30pF

Q

255

Fig. 2 Output Load

Equivalent

+5V

480

5 pF

7. At any given temperature and voltage condition, t

is less than t

HZCE

LZCE

, and t

is less than t

HZWE

LZWE

.

8. WE\ is HIGH for READ cycle.

9. Device is continuously selected. Chip enables and output enables are held in their active state.

10. Address valid prior to, or coincident with, latest occurring chip enable.

11.tRC = Read Cycle Time.

12 . CE2 timing is the same as CE1\ timing. The waveform is inverted.

DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)

DESCRIPTION SYM MIN MAX UNITS NOTES

for Retention Data V

V

CC

CE\ >

Data Retention Current

V

Chip Deselect to Data Retention Time

Operation Recovery Time

CONDITIONS

(VCC - 0.2V)

> (VCC - 0.2V)

IN

0.2V

or <

V

CC

= 2V I

DR

CCDR

t

CDR

t

R

2 --- V

1mA

0 --- ns 4

t

RC

ns 4, 11

LOW Vcc DA T A RETENTION WA VEFORM

DA TA RETENTION MODE

4.5V

VDR > 2V

V

DR

5

4.5V t

R

2

23

2

23

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

MT5C6405

Rev. 2.0 5/01

V

CE\

CC

t

CDR

2

23

V

IH

2

23

V

IL

2

DON’T CARE UNDEFINED

Austin Semiconductor, Inc.

4

SRAM

MT5C6405

ADDRESS

DQ

PREVIOUS DATA VALID

READ CYCLE NO. 1

t

tRCtRC

RC

VALID

t

tAA

AA

t

OH

tOH

READ CYCLE NO. 2

8, 9

DATA VALID

7, 8, 10

CE\

OE\

DQ

Icc

MT5C6405

Rev. 2.0 5/01

HIGH-Z

t

LZCE

tLZCE

t

tPU

PU

t

LZOE

tLZOE

t

ACE

t

AOE

tAOE

t

tRCtRC

RC

t

HZOE

tHZOE

t

HZCE

tHZCEtACE

DATA VALID

t

tPD

PD

23

DON’T CARE

23

UNDEFINED

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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Austin Semiconductor, Inc.

4

5

1

7

1

3

SRAM

MT5C6405

ADDRESS

CE\

WE\

DQ

WRITE CYCLE NO. 1

12

(Chip Enabled Controlled)

t

WC

tWCtWC

t

tAW

AW

t

AS

D

Q

t

CW

tCW

tCWtAS

t

tWP1tWP1

WP

t

DS

DATA VAILD

HIGH-Z

HIGH Z

t

tAH

t

tDHtDS

AH

DH

WRITE CYCLE NO. 2 (Write Enabled Controlled)

ADDRESS

234567890123456

CE\

t

tAS

AS

WE\

DQ

D

Q

NOTE: Output enable (OE\) is inactive (HIGH).

t

tWCtWC

WC

t

AW

tAW

t

CW

tCW

HIGH-Z

t

tWP1tWP1

WP

7, 12, 13

t

DS

DATA VALID

t

AH

tAH

234567890123456789012

t

DH

tDH

23

DON’T CARE

234

UNDEFINED

MT5C6405

Rev. 2.0 5/01

7

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

Austin Semiconductor, Inc.

MECHANICAL DEFINITIONS*

ASI Case #106 (Package Designator C)

SMD 5962-86859, Case Outline L

D

E

SRAM

MT5C6405

A

Q

L

S1

eA

SMD SPECIFICATIONS

SYMBOL

A --- 0.200

b 0.014 0.026

b2 0.045 0.065

c 0.008 0.018 D --- 1.280 E 0.220 0.310

eA

e

L 0.125 0.200 Q 0.015 0.060

S1 0.005 ---

MIN MAX

0.300 BSC

0.100 BSC

b2

c

e

b

NOTE: These dimensions ar e per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.

* All measurements are in inches.

MT5C6405

Rev. 2.0 5/01

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

8

Austin Semiconductor, Inc.

MECHANICAL DEFINITIONS*

ASI Case #204 (Package Designator EC)

SMD 5962-86859, Case Outline U

SRAM

MT5C6405

D1

B2

D2

L2

E3

D

hx45

E

o

D3

A1

h x 45

A

E1

E2

o

B1

e

L

SMD SPECIFICATIONS

SYMBOL

MIN MAX

A 0.060 0.075

A1 0.050 0.065 B1 0.022 0.028 B2

0.072 REF

D 0.342 0.358

D1 D2

0.200 BSC

0.100 BSC

D3 --- 0.358

E 0.540 0.560

E1 E2

0.400 BSC

0.200 BSC

E3 --- 0.558

e h

0.050 BSC

0.040 REF

L 0.045 0.055

L2 0.075 0.095

NOTE: These dimensions ar e per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.

* All measurements are in inches.

MT5C6405

Rev. 2.0 5/01

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

9

Austin Semiconductor, Inc.

ORDERING INFORMA TION

EXAMPLE: MT5C6405C-25L/XT EXAMPLE: MT5C6405EC-15L/IT

SRAM

MT5C6405

Device Number

MT5C6405 C -12 L /* MT5C6405 EC -12 L /* MT5C6405 C -15 L /* MT5C6405 EC -15 L /* MT5C6405 C -20 L /* MT5C6405 EC -20 L /* MT5C6405 C -25 L /* MT5C6405 EC -25 L /* MT5C6405 C -35 L /* MT5C6405 EC -35 L /* MT5C6405 C -45 L /* MT5C6405 EC -45 L /* MT5C6405 C -55 L /* MT5C6405 EC -55 L /* MT5C6405 C -70 L /* MT5C6405 EC -70 L /*

Package

Type

Speed

ns

Options** Process Device Number

Package

Type

Speed

ns

Options** Process

*AVAILABLE PROCESSES

IT = Industrial T emperature Range -40oC to +85oC XT = Extended T emperature Range -55oC to +125oC 883C = Full Military Processing -55oC to +125oC

** OPTIONS

L = 2V Data Retention/Low Power

MT5C6405

Rev. 2.0 5/01

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

10

Austin Semiconductor, Inc.

ASI TO DSCC PART NUMBER

CROSS REFERENCE*

SRAM

MT5C6405

ASI Package Designator C

ASI Part # SMD Part #

MT5C6805C-35/883C 5962-8685918LA MT5C6805C-35L/883C 5962-8685917LA MT5C6805C-45/883C 5962-8685916LA MT5C6805C-45L/883C 5962-8685915LA MT5C6805C-55/883C 5962-8685914LA MT5C6805C-55L/883C 5962-8685913LA MT5C6805C-70/883C 5962-8685912LA MT5C6805C-70L/883C 5962-8685911LA

ASI Package Designator EC

ASI Part # SMD Part #

MT5C6805EC-35/883C 5962-8685918UA MT5C6805EC-35L/883C 5962-8685917UA MT5C6805EC-45/883C 5962-8685916UA MT5C6805EC-45L/883C 5962-8685915UA MT5C6805EC-55/883C 5962-8685914UA MT5C6805EC-55L/883C 5962-8685913UA MT5C6805EC-70/883C 5962-8685912UA MT5C6805EC-70L/883C 5962-8685911UA

* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.

MT5C6405

Rev. 2.0 5/01

11

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.