System clock input pin.
For details see "MSM9004-04 Oscillation Circuit characteristics".
Pin for oscillation.
V
DD
Connecting the external resistor and capacitor to
configure the oscillation circuit.
Connect the resistor and capacitor as shown in
OSC
the right figure.
V
Make the length of wiring between this pin and the
SS
external resistor and capacitor as short as possible.
Serial data input.
For details on the configuration of input data, see "Data Configuration".
Shift clock input (Schmitt circuit included).
Input data is read synchronizing with the rising edge of this clock.
Load signal input (Schmitt circuit included).
Serial input data is transferred to the display latch when this LOAD
signal is at a "H" level.
Input pin for turning off all segments.
All segments turn off, regardless of the display data, when this pin is
at a "L" level, and all segments return to the status before turning off.
LCD common output pins.
LCD segment output pins.
Bias power supply pins for driving the LCD.
Conditions for bias voltage are as follows :
– V
3.7V £ V
DD
LC3
£ 5.5V
2
V
= VDD – 3 (VDD – V
LC1
LC3
)
1
V
= VDD – 3 (VDD – V
LC2
LC3
)
55Power
V
DD
57
V
SS
supply
*1 Applied to MSM9004-03.
*2 Applied to MSM9004-04.
—
V
≥ V
LC3
SS
Power supply pins.
Normally used as VDD = 4.5 to 5.5 V and Vss = 0 V.
6/15
Page 7
¡ SemiconductorMSM9004-03/04
ABSOLUTE MAXIMUM RATINGS
ParameterSymbolConditionRatingUnit
Power Supply VoltageV
LCD Driving VoltageV
Input VoltageV
Power DissipationP
Storage TemperatureT
DD
LCD
IN
D
STG
—–0.3 to +6.5V
—–0.3 to VDD +0.3V
—–0.3 to VDD +0.3V
Ta = +85˚C450mW
—–55 to +150°C
RECOMMENDED OPERATING CONDITIONS
ParameterSymbolConditionRangeUnit
Power Supply VoltageV
LCD Driving VoltageV
System Clock Frequencyf
Self Oscillation Frequencyf
Shift Frequency (Max)f
Operating TemperatureT
DD
* 1* 3
LCD
CP1
OSC
CP2
op
Applied to MSM9004-01
Applied to MSM9004-02
—4.5 to 5.5V
* 2
3.7 to V
DD
V
1.5 to 4.3kHz
1.5 to 4.3kHz
—2.0MHz
—–40 to +85°C
*1:VDD–V
LC3
*2:The following relationship must be kept:
VDD>V
V
V
V
LC1>VLC2≥VSS
LC1=VDD
LC2=VDD
LC3=VDD
1
–(V
–(V
–(V
3
2
3
3
3
DD – VLC3
DD – VLC3
DD – VLC3
)
)
)
*3:VDD is the reference potential for the LCD driving voltage. To decide the LCD driving
voltage, change the voltage between V
LC3
and V
SS (VLC3
> 0).
7/15
Page 8
¡ SemiconductorMSM9004-03/04
ELECTRICAL CHARACTERISTICS
DC Characteristics (MSM9004-03)
ParameterSymbolConditionMin.Max. Unit Applicable pin
"H" Input Voltage
"L" Input Voltage
"H" Input Current
"L" Input Current
ON Resistance (SEG)
ON Resistance (COM)
Dynamic Supply Current
V
IH1
V
IH2
V
IL1
V
IL2
I
IH1
I
IH2
I
IL1
I
IL2
R
ON V0
R
ON V1IO
R
ON V2IO
R
ON V3IO
R
ON V0IO
R
ON V1IO
R
ON V2IO
R
ON V3IO
I
DD
(Ta= – 40 to +85°C, V
—
—
—0.0
—0.0
VIN=V
DD
VIN=V
DD
=4.5 to 5.5 V, VDD–V
DD
0.8VDDV
0.85VDDV
0.2V
DD
DD
DD
0.15VDDVCLOCK1
–1.01.0mA
–3.03.0mABLANK
VDD=5.5 V, VIN=0 V–1.01.0mA
VDD=5.5 V, VIN=0 V–160–20mABLANK
IO=–10 mA
=±10 mA
=±10 mA
=10 mA
=–30 mA
=±30 mA
=±30 mA
=4.5 V
V
DD
= V
V
LC1
V
= V
LC2
V
LC3=VSS
—60kWSEG1-50
2
DD
3
1
DD
3
—20kWCOM1-4
=30 mA
f
=2.4 kHz
CP1
=1 MHz
f
CP2
1/4 duty
* 1
—0.65mAV
COM1-4: No Load
SEG1-50: No Load
= 3.7 V to VDD)
LC3
LOAD, CLOCK2
V
DATA, BLANK
VCLOCK1
LOAD, CLOCK2
V
DATA, BLANK
LOAD, CLOCK1
CLOCK2, DATA
LOAD, CLOCK1
CLOCK2, DATA
DD
* 1:For input data, input a logic "0" and a logic "1" to LCD display bits alternately.
The tr and tf time for the CLOCK1, CLOCK2, DATA, and LOAD pins must be less than
20ns.
8/15
Page 9
¡ SemiconductorMSM9004-03/04
DC Characteristics (MSM9004-04)
ParameterSymbolConditionMin.Max. Unit Applicable pin
"H" Input Voltage
"L" Input Voltage
"H" Input Current
"L" Input Current
ON Resistance (SEG)
ON Resistance (COM)
Dynamic Supply Current
V
V
I
I
I
I
R
ON V0
R
ON V1
R
ON V2
R
ON V3
R
ON V0
R
ON V1
R
ON V2
R
ON V3
I
IH1
IL1
IH1
IH2
IL1
IL2
DD
(Ta= – 40 to +85°C, V
—
—0.0
VIN=V
DD
VIN=V
DD
=4.5 to 5.5 V, VDD–V
DD
0.8VDDV
0.2V
DD
DD
–1.01.0mA
–3.03.0mABLANK
VDD=5.5 V, VIN=0 V–1.01.0mA
VDD=5.5 V, VIN=0 V–160–20mABLANK
IO=–10 mA
IO=±10 mA
IO=±10 mA
IO=10 mA
I
=–30 mA
O
IO=±30 mA
V
V
V
DD
LC1
LC2
=4.5 V
2
= V
3
1
= V
3
—60kWSEG1-50
DD
DD
—20kWCOM1-4
IO=±30 mA
V
LC3=VSS
IO=30 mA
f
=1 MHz
CP2
1/4 duty
* 1
—1.00mAV
COM1-4: No Load
SEG1-50: No Load
= 3.7 V to VDD)
LC3
LOAD, CLOCK2
V
DATA, BLANK
LOAD, CLOCK2
V
DATA, BLANK
LOAD, CLOCK2
DATA
LOAD, CLOCK2
DATA
DD
* 1:For input data, input a logic "0" and a logic "1" to LCD display bits alternately.
External resistor for oscillation : RO = 62 kW
External copacitor for oscillation : CO = 0.01 mF
The tr and tf time for the CLOCK2, DATA, and LOAD pins must be less than 20ns.
The current that flows through the external resistor and capacitor is not included.
9/15
Page 10
¡ SemiconductorMSM9004-03/04
AC Characteristics
ParameterSymbolConditionMin.Max.Unit
System Clock Frequencyf
System Clock Pulse Widtht
WCP1
Data Clock Frequencyf
Data Clock Pulse Widtht
WCP2
Data Setup Timet
Data Hold Timet
Load Pulse Widtht
Clock-Load Timet
Load-Clock Timet
Rise Timet
Fall Timet
tw
t
r
CP1
tw
CP1
CP1
CP2
SU
HD
WLD
CL
LC
r
f
(Ta= – 40 to +85°C, V
=4.5 to 5.5 V, VDD–V
DD
= 3.7 V to VDD)
LC3
Not applied to MSM9004-041.54.3kHz
Not applied to MSM9004-041.0—ms
LCD Display bit - LCD Panel Lighting Status Correspondence Table
LCD display bit
(D1 to D50)
1ON
0OFF
LCD panel lighting
status
LCD Display bit - Segment Output Correspondence Table
LCD display bit
Segment output
D1
SEG1
D2
SEG2
D46
SEG46
D47
SEG47
D48
SEG48
Select bit - Data Latch Correspondence Table
Select bit
(4 bits)
D49
SEG49
D50
SEG50
C4C3C2C1
0001
0010
0100
1000
Display data writing
data latch
Data latch 1
Data latch 2
Data latch 3
Data latch 4
Corresponding
common output
COM1
COM2
COM3
COM4
Select bits C1 to C4 select Data latch 1 to Data latch 4 corresponding to COM 1 to COM 4
independently. If logic "1s" are selected to multiple select bits, the LCD display bits are written
to all corresponding data latches.
Example:
When logic "1s" are set to all select bits C1 to C4, and logic "0s" are set to all LCD display bits D1
to D50, logic "0s" are written to Data latch 1 to Data latch 4 by one data input. This leads to turning
off the entire LCD panel.
11/15
Page 12
¡ SemiconductorMSM9004-03/04
How to Decrease Transfer Time When Unused Segments Exist
The MSM9004-03/04 can operate even if segment data is not full. Input data as in the figure
shown below. In this case, the last 4 bits are the select bits.
Transfer example: for 30 segments
CLOCK2
DATA
LOAD
D29 D28 D27 D26D30D2D100C1C2C3C4
LCD display bits
(30 bits)
Dummy bits
(2 bits)
Select bits
(4 bits)
Note:Always set "0" to the dummy bit.
Recommended RC Values for MSM9004-04 Oscillation Circuit
Shown below are the recommended oscillation resistor (RO) and capacitor (CO) values for
providing frame frequency f
• R
= 62 kW ± 5%
O
• C
= 0.01 mF ± 5%
O
of approximately 62 Hz to 190 Hz.
FRM
(Resistance and capacitance variations due to temperature change are not included.)
For requirements of supply voltage (VDD), ambient temperature range (Ta), and frame frequency
(f
):
FRM
• VDD = 5.0 V
• Ta = –40 to +85°C
• f
FRM
1
=oscillation frequency
24
12/15
Page 13
¡ SemiconductorMSM9004-03/04
APPLICATION CIRCUITS
MSM9004-03
+5 V
V
DD
Output
Port
CPU
V
SS
BIAS
CIRCUIT
V
DD
DATA
CLOCK2
LOAD
CLOCK1
BLANK
V
LC1
V
LC2
V
LC3
V
SS
SEG1
1/4 DUTY
LCD
PANEL
MSM9004-03
SEG50
COM1
COM2
COM3
COM4
MSM9004-04
+5 V
V
DD
Output
Port
CPU
V
SS
BIAS
CIRCUIT
R
0
V
DD
DATA
CLOCK2
LOAD
SEG1
1/4 DUTY
LCD
PANEL
BLANK
MSM9004-04
V
LC1
V
LC2
V
LC3
OSC
C
0
V
SS
SEG50
COM1
COM2
COM3
COM4
13/15
Page 14
¡ SemiconductorMSM9004-03/04
REFERENCE DATA
f
vs. R
FRM
500
300
[Hz]
FRM
100
50
30
Frame Frequency f
0
VDD = 5 V
Ta = 25˚C
= 0.01 mF
C
O
C
= 0.015 mF
O
= 0.022 mF
C
O
10
20406080
140
120
[Hz]
100
FRM
80
60
40
Frame Frequency f
20
-1025850
-40
Resistance R
f
vs. Ta
FRM
Temperature Ta [˚C]
[kW]
O
VDD = 5 V
RO = 33 kW
C
= 0.015 mF
O
R
= 62 kW
O
C
= 0.01 mF
O
R
= 62 kW
O
C
= 0.015 mF
O
14/15
Page 15
¡ SemiconductorMSM9004-03/04
PACKAGE DIMENSIONS
QFP64-P-1414-0.80-BK
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.87 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
15/15
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