Page 1
E2B0027-27-Y2
¡ Semiconductor
This version: Nov. 1997
Previous version: Mar. 1996
MSM5238¡ Semiconductor
MSM5238
32-DOT LCD COMMON DRIVER
GENERAL DESCRIPTION
The MSM5238 is a dot matrix LCD common driver LSI which is fabricated using low power
CMOS metal gate technology. The scanning signal in one matrix display frame can be divided
into up to 1/32 duty. This LSI consists of 32-bit shift register, 32-bit level shifter and 32-bit 4-level
driver.
This LSI can drive a variety of LCD panels because the bias voltage, which determines the LCD
driving voltage, can be optionally supplied from an external source.
FEATURES
• Supply voltage : 3 to 7V
• LCD driving voltage : 3 to 16V
• Applicable LCD duty : 1/32 to 1/64
(1/64 duty is available when MSM5238s are cascade-connected)
• Bias voltage can be supplied externally.
• Applicable segment driver: MSM5839B/C (40 outputs)
• Package options:
44-pin plastic QFP (QFP44-P-910-0.80-K) (Product name: MSM5238GS-K)
44-pin plastic QFP (QFP44-P-910-0.80-L2) (Product name: MSM5238GS-L2)
44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name: MSM5238GS-2K)
1/12
Page 2
BLOCK DIAGRAM
MSM5238¡ Semiconductor
V
DD
V
V
V
VEE(V4)
DF
DI
CP
O
1
1
2
3
32-Bit 4-Level Driver
32-Bit Level Shifter
32-Bit Shift Register
O
32
V
DD
V
EE
V
DD
V
SS
V
SS
DO
2/12
Page 3
PIN CONFIGURATION (TOP VIEW)
(Top view)
NC
DI
43
44
1
O
1
O
2
2
3
O
3
4
O
4
5
O
5
6
O
6
7
O
7
8
O
8
9
O
9
10
O
10
11
O
11
DF
42
41
VSSCP
40
39
38
37
V
36
MSM5238¡ Semiconductor
)
4
(V
EE
3V2V1VDD
DO
V
34
35
33
O
32
O
32
31
31
O
30
30
O
29
29
O
28
28
O
27
27
O
26
26
O
25
25
O
24
24
O
23
23
O
22
NC
DF
CP
V
V
DD
V
V
V
VEE(V4)
DO
16
15
14
13
12
16
15
14
12
O13O
O
O
O
NC: No connection
44-Pin Plastic QFP (Type K)
5
4
3
2
1
44
DI
43
42
41
40
SS
39
38
1
37
2
36
3
35
34
17
)
DD
*(V
6
18
O
22
21
20
19
21
20
19
18
17
O
7
O
O
8
O
11
10
9O8O7O6O5O4O3O2O1
O
O
O
9
10
11
12
13
14
15
16
17
18
19
20
21
22
O
12
O
13
O
14
O
15
O
16
*(VDD)
O
17
O
18
O
19
O
20
O
21
23
24
25
26
27
28
29
30
31
32
33
22
23
24
25
26
29
30
31
32
O
O
O
27
O
O28O
O
O
O
O
O
NC: No connection
44-Pin Plastic QFP (Type L)
* Pin 17 is an auxiliary pin. It must be connected to the power supply or left open.
Note : The figure for Type L shows the configuration viewed from the reverse side of the package.
Pay attention to the difference in pin arrangement.
3/12
Page 4
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Condition Rating Unit
Supply Voltage
Supply Voltage
Input Voltage
Storage Temperature
V
DD
V
LCD
V
I
T
STG
Ta = 25°C –0.3 to +7 V
Ta = 25°C, VDD–V
Ta = 25°C –0.3 to V
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Condition Range Unit
Supply Voltage
Supply Voltage
Operating Temperature
Fan-Out
V
DD
V
LCD
T
op
VDD–VEE * 3 to 16 V
N MOS load 5 —
MSM5238¡ Semiconductor
EE
— –55 to +150 °C
— 3 to 7 V
— –40 to +85 °C
0 to 16.5 V
DD
V
* V
≥ V1 ≥ V2 ≥ V3 ≥V
DD
EE
(V4)
4/12
Page 5
ELECTRICAL CHARACTERISTICS
DC Characteristics
MSM5238¡ Semiconductor
SymbolParameter
V
“H” Input Voltage
“L” Input Voltage
IH
V
Input Current
“H” Output Voltage
“L” Output Voltage
(V1, VEE(V4))
ON Resistance
(V2, V3)
OFF Leakage Current
Supply Current I
/V
1
/V
IL
1
I
IH
I
IL
V
OH
V
OL
R
ON
R
ON
I
OFF
DD
V
V
(V)
0
0
0
0
SS
V
(V)
0 to
–9
0 to
–7
0 to
–9
0 to
–7
EE
DD
(V)
5
*1
IH
2
7
5
*1
IL
2
7
70
70
50
*2
70
50
*2
70
5
7
5
7
0 to
–9
0 to
–7
0 to
–9
0 to
–7
0
0
0
–5
0
0
0
–7
0
0
0
–5
0
0
0
–7
50
70–9–7
50
70–9–7
Condition
—
—
—
—
V
= 7V–7
I
VI = 0V–7
IO = –40mA
= –56mA
I
O
= 0.2mA
I
O
IO = 0.3mA
V
: DRV output
O
VO – V1 = 0.25V
V1 = VEE to (VDD – 0.25V)
VO – V4 = 0.25V
V4 (VEE): 0V MAX
V
= V2 or V
N
3
VO = DRV output
VO – VN = 0.25V
V
= VEE to (VDD – 0.25V)
N
—
—
—
—
3.6/4.2
5.2/6.0
——
——
——
4.2
5.8
——
——
— 500 2000
— 250 1000
— 350 1400
— 200 800
— 800 3200
— 450 1800
— 550 2200
— 350 1400
——
——±5±5
——
——
Max.Typ.Min.
———
—
0.8/0.4
——
1.1/0.5
1
–1
——
——
0.4
0.4
0.5
1.0
Unit
V
V
mA
V
V
W
W
mA
mA
Input Capacitance
*1 V
IH1
and V
C
I
are input pins for DI and DF, while V
IL1
———
*2 VOH and VOL are output pins for DO.
IH2
and V
are input pins for CP.
IL2
pF—–—5
5/12
Page 6
Switching Characteristics
Parameter Symbol
Clock Frequency f
Clock Pulse Width t
Data Setup Time (DATAIN ➝ CP)
Data Hold Time (DATAIN ➝ CP) t
Clock Pulse Rise/Fall Time
(cp)
w (cp)
t
SETUP
HOLD
t
r (cp)
t
f (cp)
V
DD
(V)
5
7
5
7
5
7
5
7
5
7
Condition
—
Min.
— — 400
Typ. Max. Unit
— — — 550
— 400 — —
— 300 — —
— 100 — —
— 50——
— 800 — —
— 500 — —
— — — 0.5
— — — 0.1
MSM5238¡ Semiconductor
kHz
ns
ns
ns
ms
CP
DI
tr (cp)
10%
90% 90%
50%
t
SETUP
50%
t
HOLD
t
(cp)
f
10%
50% 50%
tw (cp)
50%
6/12
Page 7
MSM5238¡ Semiconductor
FUNCTIONAL DESCRIPTION
Pin Functional Description
•DI
Shift register data input pin which inputs the data on scanning lines in synchronization with
a clock (positive logic). This LSI can optionally divide the scanning signal up to 1/32 duty LCD
panel because it consists of the 32-bit shift register.
•CP
Clock pulse input pin for the 32-bit shift register. The data is shifted to the 32-bit shift register
at the falling edge of the clock pulse. A data set up time (t
required between DI and CP. (Refer to Switching Characteristics.) A Schmitt circuit is included
in the CP input circuit.
•DF
Synchronous signal input pin for alternate signal for LCD driving.
) and data hold time (t
SETUP
HOLD
) are
•VDD, V
SS
VDD is a power supply pin, which is normally from 3.0V to 7.0V. VSS is a ground pin, which
is 0V.
•O1 - O
32
Display data output pins which correspond to each data bit in the latch. One of V1, V2, V3 and
VEE (V4) is selected as a display driving voltage source based on the combination of latched
data level and DF signal. Refer to the Truth Table. O1 - O32 are connected to the common side
of the LCD panel.
7/12
Page 8
MSM5238¡ Semiconductor
•V1, V2, V3, VEE (V4)
Bias supply voltage pins to drive the LCD. Use an external bias voltage supply for driving the
LCD.
•DO
Shift register output pin. The data which was input from DI is output from DO with 32 bits
delay, synchronized with the clock pulse. The MSM5238 is used at 1/32 duty and also at 1/64
duty through cascade connection. Refer to Figure 1 below.
¥ 32
64 ¥ n
LCD panel
Frame
signal
Clock
DF
Truth Table
O
1
DI
DF
CP
+5V
MSM5238
VDDV1V2V3VEE(V4)V
¥ 32
O
32
DO
ss
Bias Circuit
O
1
DI
DF
CP
MSM5238
VDDV1V2V3VEE(V4)V
O
32
DO
ss
GND
–V
Figure 1
Latched data
L
H
DF
LCD driver output
L
H
L
H
V
2
V
4
V
3
V
1
8/12
Page 9
MSM5238¡ Semiconductor
NOTES ON USE
Note the following when turning power on and off:
The LCD drivers of this IC require a high voltage. For this reason, if a high voltage is applied to
the LCD drivers with the logic power supply floating, excess current flows. This may damage
the IC. Be sure to carry out the following power-on and power-off sequences:
When turning power on:
First VDD ON, next VEE (V4), V3, V2, V1 ON. Or both ON at the same time.
When turning power off:
First VEE (V4), V3, V2, V1 OFF, next VDD OFF. Or both OFF at the same time.
9/12
Page 10
PACKAGE DIMENSIONS
QFP44-P-910-0.80-K
Mirror finish
MSM5238¡ Semiconductor
(Unit : mm)
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.35 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
10/12
Page 11
QFP44-P-910-0.80-L2
Spherical surface
MSM5238¡ Semiconductor
(Unit : mm)
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.35 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
11/12
Page 12
QFP44-P-910-0.80-2K
Mirror finish
MSM5238¡ Semiconductor
(Unit : mm)
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.41 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
12/12
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