Datasheet MSM514400E-60SJ, MSM514400E-60TS-K, MSM514400E-70SJ, MSM514400E-70TS-K Datasheet (OKI)
Page 1
Semiconductor
This version : Sep.2000
MSM514400E
1,048,576-Word x 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE
DESCRIPTION
The MSM514400E is a 1,048,576-word × 4-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS
technology. The MSM514400E achieves high integration, high-speed operation, and low-power consumption
because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal CMOS process. The
MSM514400E is available in a 26/20-pin plastic SOJ, 26/20-pin plastic TSOP.
FEATURES
• 1,048,576-word × 4-bit configuration
• Single 5V power supply, ± 10% tolerance
• Input : TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 1024 cycles/16 ms
• Fast page mode, read modify write capability
• CAS before RAS refresh, hidden refresh, RAS-only refresh capability
• Multi-bit test mode capability
• Package options:
26/20-pin 300mil plastic SOJ (SOJ26/20-P-300-1.27) (Product : MSM514400E-xxSJ)
26/20-pin 300mil plastic TSOP (TSOPII26/20-P-300-1.27-K) (Product : MSM514400E-xxTS-K)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM514400E-60 60ns 30ns 15ns 15ns 110ns 468mW
MSM514400E-70 70ns 35ns 20ns 20ns 130ns 413mW
Access Time (Max.) Power Dissipation
t
RAC
t
AA
t
CAC
t
OEA
Cycle Time
(Min.)
Operating (Max.) Standby (Max.)
5.5mW
1/14
Page 2
PIN CONFIGRATION (TOP VIEW)
MSM514400E
DQ1 V
DQ2
WE
RAS
A9
A0
A1
A2
A3
V
1
2
3
4
5
9
10
11
12
13
CC
26
25
24
23
22
18
17
16
15
14
26/20-Pin Plastic SOJ
Pin Name Function
A0–A9 Address Input
RAS
SS
DQ4
DQ3
CAS
OE
A8
A7
A6
A5
A4
DQ1 V
1
DQ2
2
WE
3
RAS
4
A9
5
9
A0
10
A1
11
A2
12
A3
13
V
CC
26/20-Pin Plastic TSOP
Row Address Strobe
(K Type)
26
25
24
23
22
18
17
16
15
14
SS
DQ4
DQ3
CAS
OE
A8
A7
A6
A5
A4
CAS
Column Address Strobe
DQ1–DQ4 Data Input/Data Output
OE
WE
V
CC
V
SS
Output Enable
Write Enable
Power Supply (5 V)
Ground (0 V)
Note : The same power supply voltage must be provided to every VCC pin, and the
same GND voltage level must be provided to every V
SS
pin.
2/14
Page 3
BLOCK DIAGRAM
A0-A9
DQ1-DQ4
OEWERAS
CAS
VCCV
Timing
Generator
MSM514400E
Timing
Generator
Column
10
Address
Buffers
Internal
Address
Counter
Row
Address
Buffers
SS
1010
On Chip
V
Generator
BB
Refresh
Control Clock
Row
De-
coders
Word
Drivers
10
Column
decoders
Sense Amplifiers
Memory
Cells
4
Write
Clock
Generator
I/O
Selector
Output
4
Buffers
4
4
Buffers
Input
4
4
4
3/14
Page 4
ELECTRICAL CHARACTERI S TICS
Absolute Maximum Ratings
Parameter Symbol Rating Unit
MSM514400E
Voltage on Any Pin Relative to V
Voltage on VSS Supply Relative to V
SS
SS
Short Circuit Output Current I
Power Dissipation P
Operating Temperature T
Storage Temperature T
VIN, V
V
OS
CC
D*
opr
stg
*: Ta = 25°C
Recommended Operating Conditions
Parameter Symbol Min. Typ. Max. Unit
V
Power Supply Voltage
Input High Voltage
Input Low Voltage
V
V
V
CC
SS
IH
IL
OUT
−
0.5 to Vcc + 0.5
−
0.5 to 7.0
V
V
50 mA
1W
0 to 70 °C
−
55 to 150
°C
(Ta = 0 °C to 70 °C)
4.5 5.0 5.5 V
000V
*1
0.8 V
V
−
2.4
0.5
*2
Vcc + 0.5
Notes: *1. The input voltage is VCC + 2.0V when the pulse width is less than 20ns (the pulse width is with
respect to the point at which V
*2. The input voltage is V
the point at which V
− 2.0V when the pulse width is less than 20ns (the pulse width respect to
SS
is applied).
SS
is applied).
CC
Capacitance
(Vcc = 5V ± 10%, Ta = 25°C, f=1MHz)
Parameter Symbol Typ. Max. Unit
Input Capacitance (A0 – A9)
Input Capacitance (
RAS, CAS, WE, OE
Output Capacitance (DQ1 – DQ4)
C
IN1
)
C
C
IN2
I/O
6pF
7pF
7pF
4/14
Page 5
DC Characteristics
MSM514400E
(Vcc = 5V ± 10%, Ta = 0°C to 70°C)
Parameter Symbol Condition
Output High Voltage
Output Low Voltage
Input Leakage Current
Output Leakage Current
Average Power Supply
Current
(Operating)
Power Supply Current
(Standby)
Average Power Supply
Current
RAS
(
-only Refresh)
Power Supply Current
(Standby)
V
V
I
I
LO
I
CC1
I
CC2
I
CC3
I
CC5
OH
OL
LI
IOH = −5.0mA
IOL = 4.2mA
≤
I
6.5V;
0V ≤ V
All other pins not
under test = 0V
DQ disable
0V ≤ V
RAS, CAS
t
RC
RAS, CAS
≤ 5.5V
O
= Min.
cycling,
= V
IH
RAS, CAS
≥
V
−0.2V
CC
RAS
cycling,
CAS
= V
,
IH
= Min.
t
RC
RAS
= V
,
IH
CAS
= V
,
IL
DQ = enable
MSM514400
E-60
MSM514400
E-70
Unit Note
Min. Max. Min. Max.
2.4
V
CC
2.4
V
CC
V
00.400.4V
−
10
−
10
10
10
85
2
−
10
−
10
10
10
µ
A
µ
A
75 mA 1, 2
2
mA 1
1
85
5
1
75 mA 1, 2
5mA1
Average Power Supply
Current
(CAS before
RAS
Refresh)
Average Power Supply
Current
(Fast Page Mode)
I
CC6
I
CC7
RAS
CAS
RAS
CAS
t
PC
= Min.
= cycling,
before
= V
RAS
,
IL
cycling,
Notes: 1. ICC Max. is specified as ICC for output open condition.
2. The address can be changed once or less while RAS = V
3. The address can be changed once or less while CAS = V
85
70
.
IL
.
IH
75 mA 1, 2
60 mA 1, 3
5/14
Page 6
AC Characteristic (1/2)
MSM514400E
(Vcc = 5V ± 10%, Ta = 0°C to 70°C) Note1,2,3,11,12
Parameter Symbol
Random Read or Write Cycle Time
Read Modify Write Cycle Time
Fast Page Mode Cycle Time
Fast Page Mode Read Modify Write
Cycle Time
Access Time from
Access Time from
RAS
CAS
Access Time from Column Address
Access Time from
Access Time from
CAS
Precharge
OE
Output Low Impedance Time from
CAS
to Data Output Buffer Turn-off
Delay Time
OE
to Data Output Buffer Turn-off Delay
Time
CAS
t
RC
t
RWC
t
PC
t
PRWC
t
RAC
t
CAC
t
AA
t
CPA
t
OEA
t
CLZ
t
OFF
t
OEZ
MSM514400
E-60
MSM514400
E-70
unit Note
Min. Max. Min. Max.
110
155
40
85
0
60
15
30
35
15
130
185
45
100
0
ns
ns
ns
ns
70 ns 4, 5, 6
20 ns 4, 5
35 ns 4, 6
40 ns 4
20 ns 4
ns 4
0 15 0 20 ns 7
0 15 0 20 ns 7
Transition Time
Refresh Period
RAS
Precharge Time
RAS
Pulse Width
RAS
Pulse Width (Fast Page Mode)
RAS
Hold Time
RAS
Hold Time referenced to
CAS
Precharge Time
(Fast Page Mode)
CAS
Pulse Width
CAS
Hold Time
CAS
RAS
RAS
RAS
RAS
to
Hold Time from
to
Precharge Time
CAS
Delay Time
CAS
to Column Address Delay Time
Row Address Set-up Time
Row Address Hold Time
OE
Precharge
t
T
t
REF
t
RP
t
RAS
t
RASP
t
RSH
t
ROH
t
CP
t
CAS
t
CSH
t
CRP
t
RHCP
t
RCD
t
RAD
t
ASR
t
RAH
3 50 3 50 ns 3
40
16
50
16 ns
ns
60 10,000 70 10,000 ns
60 100,000 70 100,000 ns
15
15
10
20
20
10
ns
ns
ns
15 10,000 20 10,000 ns
60
35
5
70
5
40
ns
ns
ns
20 45 20 50 ns 5
15 30 15 35 ns 6
10
0
0
10
ns
ns
6/14
Page 7
AC Characteristic (2/2)
MSM514400E
(Vcc = 5V ± 10%, Ta = 0°C to 70°C) Note1,2,3,11,12
Parameter Symbol
Column Address Set-up Time
Column Address Hold Time
Column Address to
RAS
Lead Time
Read Command Set-up Time
Read Command Hold Time
Read Command Hold Time referenced
RAS
to
Write Command Set-up Time
Write Command Hold Time
Write Command Pulse Width
OE
Command Hold Time
Write Command to
Write Command to
RAS
Lead Time
CAS
Lead Time
Data-in Set-up Time
Data-in Hold Time
OE
to Data-in Delay Time
CAS
to WE Delay Time
Column Address to WE Delay Time
RAS
to WE Delay Time
CAS
Precharge WE Delay Time
t
ASC
t
CAH
t
RAL
t
RCS
t
RCH
t
RRH
t
WCS
t
WCH
t
WP
t
OEH
t
RWL
t
CWL
t
DS
t
DH
t
OED
t
CWD
t
AWD
t
RWD
t
CPWD
MSM514400
E-60
MSM514400
E-70
Min. Max. Min. Max.
10
30
10
10
15
15
15
10
15
40
55
85
60
0
0
0
0
0
0
0
15
35
0
0
0
0
10
10
20
20
20
0
15
20
50
65
100
70
unit Note
ns
ns
ns
ns
ns 8
ns 8
ns 9
ns
ns
ns
ns
ns
ns 10
ns 10
ns
ns 9
ns 9
ns 9
ns 9
CAS
Active Delay Time from
Precharge
RAS
CAS
(
RAS
CAS
(
WE
CAS
(
WE
WE
WE
CAS
to
before
to
before
Set-up Time
RAS
CAS
Hold Time
RAS
)
)
to RAS Precharge time
before
Hold Time (
RAS
)
CAS
before
Set-up Time (Test mode)
Hold Time (Test mode)
RAS
RAS
t
RPC
t
CSR
t
CHR
t
WRP
)
t
WRH
t
WTS
t
WRH
10
10
10
10
10
5
5
5
5
10
10
10
10
10
ns
ns
ns
ns
ns
ns
ns
7/14
Page 8
MSM514400E
Notes: 1. A start-up delay of 200µs is required after power-up, followed by a minimum of eight
initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device
operation is achieved.
2. The AC characteristics assume t
3. V
(Min.) and VIL (Max.) are reference levels for measuring input timing signals. Transition
IH
times (t
) are measured between VIH and VIL.
T
= 5ns.
T
4. This parameter is measured with a load circuit equivalent to 2 TTL load and 100pF.
5. Operation within the t
t
(Max.) is specified as a reference point only. If t
RCD
(Max.) limit, then the access time is controlled by t
6. Operation within the t
t
(Max.) is specified as a reference point only. If t
RAD
(Max.) limit ensures that t
RCD
(Max.) limit ensures that t
RAD
(Max.) can be met.
RAC
is greater than the specified t
RCD
.
CAC
(Max.) can be met.
RAC
is greater than the specified t
RAD
(Max.) limit, then the access time is controlled by tAA.
7. t
(Max.) and t
OFF
(Max.) define the time at which the output achieved the open circuit
OEZ
condition and are not referenced to output voltage levels.
8. t
9. t
RCH
WCS
or t
, t
must be satisfied for a read cycle.
RRH
, t
, t
CWD
RWD
AWD
and t
CPWD
are not restrictive operating parameters. They are included in
the data sheet as electrical characteristics only. If t
WCS
≥ t
(Min.), then the cycle is an early
WCS
write cycle and the data out will remain open circuit (high impedance) throughout the entire
cycle. If t
CWD
≥ t
CWD
(Min.), t
RWD
≥ t
RWD
(Min.), t
AWD
≥ t
(Min.) and t
AWD
CPWD
≥ t
CPWD
then the cycle is a read modify write cycle and data out will contain data read from the selected
cell; if neither of the above sets of conditions is satisfied, then the condition of the data out (at
access time) is indeterminate.
RCD
RAD
(Min.),
10. These parameters are referenced to the CAS, leading edges in an early write cycle, and to the WE
leading edge in an OE control write cycle, or a read modify write cycle.
11. The test mode is initiated by performing a WE and CAS before RAS refresh cycle. This mode is
latched and remains in effect until the exit cycle is generated. The test m ode specified in this data
sheet in a 2-bit parallel test function. CA0 is not used. In read cycle, if all internal bits are equal,
the DQ pin will indicate a high lev el. I f any internal bits are not equal, the DQ pin will indicate a
low level. The test m ode is cleared and the m emory device returned to its normal operating state
by performing a RAS-only refresh cycle or a CAS before RAS refresh cycle.
12. In a test mode read cycle, the v alue of access tim e parameters is delay ed for 5ns for the specified
value. These parameters should be specified in test mode cycle by adding the abov e v alue to the
specified value in this data sheet.
8/14
Page 9
Timing Chart
MSM514400E
• Read Cycle
V
RAS
CAS
IH
V
V
IH
V
V
Address
IH
V
V
OE
IH
V
V
IH
WE
V
V
OH
DQ
V
OL
t
RC
t
RAS
t
OEZ
t
t
RRH
RCH
RP
t
CRP
t
OFF
IL
t
CRP
IL
t
ASR
Row
IL
IL
IL
t
RAH
t
RAD
t
RCD
t
t
RCS
ASC
t
RAC
Column
Open
t
t
CAH
t
AA
t
CLZ
CSH
t
t
OEA
CAC
t
RAL
t
RSH
t
CAS
t
ROH
Valid Data-out
t
• Write Cycle (Early Write)
V
OE
IH
V
IL
t
CRP
V
IH
V
IL
t
ASR
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
RAS
CAS
Address
WE
Row
t
RAH
t
RAD
t
RCD
t
WCS
t
ASC
t
t
WP
DS
Column
t
t
DH
t
CSH
CAH
t
RAS
t
t
RC
WCH
t
CWL
t
t
RAL
RSH
t
CAS
t
RWL
“H” or “L”
t
RP
t
CRP
DQ
V
IH
V
IL
Valid Data-in
Open
“H” or “L”
9/14
Page 10
• Read Modify Write Cycle
V
WE
OE
DQ
IH
V
IL
t
CRP
V
IH
V
IL
t
ASR
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
I/OH
V
I/OL
RAS
CAS
Address
Row
t
RAH
t
RAD
t
RCD
t
t
ASC
RCS
t
RAC
Column
t
AA
t
CLZ
t
CAC
t
CSH
t
RAS
t
t
RWD
CAH
t
RWC
t
RSH
t
CAS
t
CWD
t
OEA
Valid
Data-out
t
AWD
t
OED
t
OEZ
t
t
OEH
t
DH
t
DS
Valid
Data-in
WP
t
CWL
t
RWL
MSM514400E
t
RP
t
CRP
“H” or “L”
10/14
Page 11
• Fast Page Mode Cycle
V
RAS
CAS
Address
WE
OE
DQ
IH
V
IL
t
CRP
V
IH
V
IL
t
ASR
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
Row Column Column Column
t
RAD
t
CSH
t
RCS
t
t
RCD
RAH
t
t
ASC
RAC
t
t
AA
CLZ
t
t
CAH
t
OEA
CAC
t
CAS
t
RCH
Data-out
t
t
Valid
OFF
OEZ
t
RASP
t
CP
t
t
ASC
CPA
MSM514400E
t
t
OEZ
Valid
Data-out
RP
t
RCH
t
RRH
t
t
CRP
OFF
ASC
t
OFF
t
RHCP
t
RCS
t
t
CLZ
t
t
CAS
t
RAL
t
OEA
CAC
RSH
t
CAH
t
CP
t
AA
t
CPA
t
OEZ
t
PC
t
CAS
t
CAH
t
RCS
t
AA
t
OEA
t
CAC
t
CLZ
t
RCH
Valid
Data-out
t
• Fast Page Mode Write Cycle (Early Write)
V
RAS
CAS
Address
WE
DQ
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
t
CRP
t
ASR
t
RAD
t
t
RCD
RAH
t
ASC
Row Column Column Column
t
WCS
t
DS
Valid
Data-in
t
CSH
t
CAH
t
t
WCH
t
WP
t
CAS
CWL
“H” or “L”
t
t
RASP
t
PC
t
CP
t
ASC
t
WCS
t
DH
t
DS
t
Valid
Data-in
t
t
CAH
t
CWL
WCH
t
WP
CAS
t
t
DH
ASC
t
WCS
t
RHPC
Valid
t
CAH
t
CWL
t
WP
t
CAS
t
RAL
t
RWL
t
t
RSH
DH
t
WCH
t
CP
t
DS
Data-in
Note: OE = “H” or “L”
RP
t
CRP
“H” or “L”
11/14
Page 12
• Fast Page Mode Read Modify Write Cycle
t
AA
t
CLZ
Column
t
CAC
CSH
t
RWD
t
t
t
AWD
CAH
CWD
Out
t
CAS
t
t
t
t
CWL
DS
OEA
OED
RAS
CAS
Address
WE
OE
DQ
V
IH
V
IL
V
IH
V
IL
t
RAH
t
ASR
V
IH
V
IL
V
IH
V
IL
Row
t
t
RAD
RCS
t
RAC
t
RCD
t
ASC
t
V
IH
V
IL
V
I/OH
V
I/OL
t
t
t
WP
DH
t
OEZ
In
t
CP
t
CAC
t
CLZ
RASP
t
Column
t
t
CPA
t
AA
ASC
RCS
t
CWD
t
t
t
AWD
t
OEA
t
PRWC
t
CAS
CAH
t
CWL
CPWD
t
WP
t
DS
t
DH
t
OED
t
OEZ
In InOut Out
t
t
t
AA
t
CLZ
CP
CAC
t
ASC
Column
t
RCS
t
t
t
t
CWD
AWD
t
CAS
CPWD
t
CPA
Note: In = Valid Data-in, Out = Valid Data-out
t
CAH
ROH
t
OEA
t
RSH
t
RAL
MSM514400E
t
CWL
t
WP
t
DH
t
DS
t
OED
t
OEZ
“H” or “L”
t
t
CRP
RWL
t
RP
• RAS-only Refresh Cycle
V
RAS
CAS
Address
DQ
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
t
CRP
t
ASRtRAH
Row
t
OFF
t
t
RAS
RC
Open
Note: WE, OE = “H” or “L”
t
RPC
t
RP
“H” or “L”
12/14
Page 13
• CAS before RAS Refresh Cycle
MSM514400E
V
RAS
CAS
WE
DQ
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
t
RPC
t
t
CP
OFF
• Hidden Refresh Read Cycle
V
RAS
CAS
Address
WE
OE
DQ
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
t
ASR
t
CRP
Row
Open
t
t
RAH
RP
t
t
RAD
t
CSR
t
WRP
t
RCS
RCD
t
ASC
t
RAC
t
RAS
Column
t
CLZ
t
RC
t
RPC
t
RP
t
CHR
t
WRH
t
RAS
Open
Note: WE, OE, Address = “H” or “L” “H” or “L”
t
RAS
t
t
RC
OEZ
t
OFF
t
RC
t
RSH
t
CAH
t
CAC
t
t
OEA
RAL
t
ROH
t
AA
t
RP
t
RRH
t
CHR
Valid Data-out
t
WRP
t
RP
“H” or “L”
13/14
Page 14
• Hidden Refresh Write Cycle
MSM514400E
RAS
CAS
Address
WE
OE
DQ
t
RAS
t
RC
t
RP
t
RC
t
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
t
ASR
t
CRP
Row
t
RAH
t
RAD
t
t
RCD
t
WCS
RAS
ASC
Column
t
DS
Valid Data-in
t
CAH
t
t
t
t
WP
DH
t
RAL
WCH
RSH
t
WRP
t
RP
t
CHR
t
WRH
“H” or “L”
• Test Mode Initiate Cycle
V
RAS
CAS
WE
DQ
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
t
RPC
t
t
WTH
RC
t
CHR
t
RAS
t
RP
t
CP
t
CSR
t
WTS
t
OFF
Open
Note: OE, Address = “H” or “L”
“H” or “L”
14/14
Page 15
NOTICE
1. The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.
2. The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit and assembly designs.
3. When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.
OKI assumes no responsibility or liability whatsoever for any failure or unusual or
4.
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.
5.
Neither indemnity against nor license of a third party's industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party's right which may result from the use thereof.
6.
The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to:traffic control, automotive, safety, aerospace,
nuclear power control, and medical, including lift support and maintenance.
7. Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
the legality of export of these products and will take appropriate and necessary steps at their
own expense for these.
8. No part of the contents contained herein may be reprinted or reproduced without our prior
permission.
Copyright 1997 OKI ELECTRIC INDUSTRY CO.,LTD.
Loading...