Page 1
MSD42WT1G, MSD42T1G
NPN Silicon General
Purpose High Voltage
Transistors
This NPN Silicon Planar Transistor is designed for general purpose
amplifier applications. This device is housed in the SC-70/SOT-323
and SC−59 packages which are designed for low power surface
mount applications.
Features
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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COLLECTOR
3
MAXIMUM RATINGS (T
Rating Symbol Value Unit
Collector-Base Voltage V
Collector-Emitter Voltage V
Emitter-Base Voltage V
Collector Current − Continuous I
= 25°C)
A
(BR)CBO
(BR)CEO
(BR)EBO
C
300 Vdc
300 Vdc
6.0 Vdc
150 mAdc
THERMAL CHARACTERISTICS
Rating Symbol Max Unit
Power Dissipation (Note 1) P
Junction Temperature T
Storage Temperature Range T
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
D
J
stg
150 mW
150 °C
−55X+ 150 °C
ELECTRICAL CHARACTERISTICS
Characteristic Symbol Min Max Unit
Collector-Emitter Breakdown Voltage
(IC = 1.0 mAdc, IB = 0)
Collector-Base Breakdown Voltage
(IC = 100 mAdc, IE = 0)
Emitter-Base Breakdown Voltage
(IE = 100 mAdc, IE = 0)
Collector-Base Cutoff Current
(VCB = 200 Vdc, IE = 0)
Emitter−Base Cutoff Current
(VEB = 6.0 Vdc, IB = 0)
DC Current Gain (Note 2)
(VCE = 10 Vdc, IC = 1.0 mAdc)
(VCE = 10 Vdc, IC = 30 mAdc)
Collector-Emitter Saturation Voltage
(Note 2) (IC = 20 mAdc,
IB = 2.0 mAdc)
1. Device mounted on a FR-4 glass epoxy printed circuit board using the minimum
recommended footprint.
2. Pulse Test: Pulse Width ≤ 300 ms, D.C. ≤ 2%.
V
(BR)CEO
V
(BR)CBO
V
(BR)EBO
I
CBO
I
EBO
h
FE1
h
FE2
V
CE(sat )
300 − Vdc
300 − Vdc
6.0 − Vdc
− 0.1 mA
− 0.1 mA
−
25
40
−
−
− 0.5 Vdc
1
BASE
3
1
2
SC−70 (SOT−323)
CASE 419
STYLE 3
2
EMITTER
CASE 318D
2
1
SC−59
3
MARKING DIAGRAMS
1D MG
G
1
XXX = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
J1D MG
G
1
ORDERING INFORMATION
Device Package Shipping
MSD42WT1G 3000 / Tape & ReelSC−70
(Pb−Free)
MSD42T1G SC−59
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
3000 / Tape & Reel
†
© Semiconductor Components Industries, LLC, 2010
May, 2010 − Rev. 7
1 Publication Order Number:
MSD42WT1/D
Page 2
MSD42WT1G, MSD42T1G
120
100
TJ = +125°C
80
60
, DC CURRENT GAIN
40
FE
h
25°C
-55°C
20
0
0.1 1.0
100
10
IC, COLLECTOR CURRENT (mA)
Figure 1. DC Current Gain
Ceb @ 1MHz
VCE = 10 Vdc
10
100
V, VOLTAGE (VOLTS)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.0
C, CAPACITANCE (pF)
0.1
0.1
IC, COLLECTOR CURRENT (mA)
Ccb @ 1MHz
1.0 10
VR, REVERSE VOLTAGE (VOLTS)
Figure 2. Capacitance
100100.1 1.0
100
1000
V
@ 25°C, IC/IB = 10
CE(sat)
V
@ 125°C, IC/IB = 10
CE(sat)
V
@ -55°C, IC/IB = 10
CE(sat)
V
@ 25°C, IC/IB = 10
BE(sat)
V
@ 125°C, IC/IB = 10
BE(sat)
V
@ -55°C, IC/IB = 10
BE(sat)
V
@ 25°C, VCE = 10 V
BE(on)
V
@ 125°C, VCE = 10 V
BE(on)
V
@ -55°C, VCE = 10 V
BE(on)
Figure 3. “ON” Voltages
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2
Page 3
MSD42WT1G, MSD42T1G
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419−04
ISSUE N
0.05 (0.002)
D
e1
3
H
E
12
e
A1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIMAMIN NOM MAX MIN
E
b
A
A2
A1 0.00 0.05 0.10 0.000
A2 0.70 REF
b 0.30 0.35 0.40 0.012
c 0.10 0.18 0.25 0.004
D 1.80 2.10 2.20 0.071
E 1.15 1.24 1.35 0.045
e 1.20 1.30 1.40 0.047
e1
L
E
STYLE 3:
c
PIN 1. BASE
MILLIMETERS
0.80 0.90 1.00 0.032
0.65 BSC
0.38
0.20 0.56
2.00 2.10 2.40 0.079 0.083 0.095H
2. EMITTER
3. COLLECTOR
INCHES
NOM MAX
0.035 0.040
0.002 0.004
0.028 REF
0.014 0.016
0.007 0.010
0.083 0.087
0.049 0.053
0.051 0.055
0.026 BSC
0.015
0.008 0.022
L
SOLDERING FOOTPRINT*
0.65
0.65
0.025
0.025
1.9
0.075
0.9
0.035
mm
ǒ
0.7
SCALE 10:1
inches
Ǔ
0.028
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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3
Page 4
MSD42WT1G, MSD42T1G
PACKAGE DIMENSIONS
SC−59
CASE 318D−04
ISSUE G
D
H
E
3
2
E
1
b
e
A
A1
C
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
DIMAMIN NOM MAX MIN
A1 0.01 0.06 0.10 0.001
b 0.35 0.43 0.50 0.014
c 0.09 0.14 0.18 0.003
D 2.70 2.90 3.10 0.106
E 1.30 1.50 1.70 0.051
e 1.70 1.90 2.10 0.067
L 0.20 0.40 0.60 0.008
H
E
MILLIMETERS
1.00 1.15 1.30 0.039
2.50 2.80 3.00 0.099
INCHES
NOM MAX
0.045 0.051
0.002 0.004
0.017 0.020
0.005 0.007
0.114 0.122
0.059 0.067
0.075 0.083
0.016 0.024
0.110 0.118
SOLDERING FOOTPRINT*
0.95
0.95
0.037
1.0
0.039
0.037
2.4
0.094
0.8
0.031
SCALE 10:1
ǒ
inches
mm
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
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MSD42WT1/D
4
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