Page 1
This vers i on: Mar. 3. 1999
Semiconductor
MSC23232D/DL-xxBS16/DS16
2,097,152-wo rd x 32-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE
DESCRIPTION
The MSC23232D/DL-x xBS16/DS16 is a f ully decoded, 2,097,152- word x 32-bi t CMOS dynamic r andom access
memor y module com posed of sixt een 4Mb DRAMs in SO J packages mount ed with six teen decoupli ng capaci tors
on a 72-pin glass epox y singl e-i nl i ne package. T hi s modul e supports any appli cat i on where hi gh density and l arge
capacity of storage memory are required. The MSC23232DL (the low-power version) is specially designed for
lower-power applicat ions.
FEATURES
· 2,097,152-word x 32- bit organization
· 72-pin Single Inline Memory M odule
MSC23232D/DL-x xBS16 : Gold tab
MSC23232D/DL-x xDS16 : Sol der tab
· Singl e +5V supply ± 10% tolerance
· Input : TTL compatibl e
· Output : TTL compatible, 3-state
· Refresh : 1024cycles/16ms (1024cycles/128ms: L-version)
· /CAS before /RAS refresh, hidden refresh, /RAS only refresh capability
· Fast page mode c apability
· Multi-bit t est mode capability
PRODUCT FAMILY
Family
MSC23232D/DL-60BS16/DS16 60ns 30ns 15ns 110ns 4180mW
MSC23232D/DL-70BS16/DS16 70ns 35ns 20ns 130ns 3740mW
Access Time (Max. ) Power Dissipation
t
RAC
t
AA
t
CAC
Cycle
Time
(Min.)
Operating (Max.) Standby (Max.)
88mW/
17.6mW(L-version)
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Semiconductor MSC23232D/DL
1
72
R1.57
6.35
1.04Typ.
1.27±0.1
95.25
2.03Typ.
6.35Typ.
Typ.
Typ.
MSC23232D/DL-xxBS16/DS16
MODULE OUTLINE
(Unit : mm )
*1
25.4±0.2
10.16
3.38Typ.
(
3.18
6.35
107.95±0.2
101.19Typ.
*1 The common size difference of the board width 12.5mm of its height is specified as ±0.2.
The value above 12.5mm is specified as ±0.5.
1.27
9.3Max.
3.7Min.
+0.1
-0.08
6.2Min.
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Semiconductor MSC23232D/DL
PIN C ONFIGURATION
Pin No. Pin Name Pin No. Pin Nam e Pin No. Pin Nam e Pin No. Pin Nam e
1VSS19 NC 37 NC 55 DQ11
2 DQ0 20 DQ4 38 NC 56 DQ27
3 DQ16 21 DQ20 39 V
SS
57 DQ12
4 DQ1 22 DQ5 40 /CAS0 58 DQ28
5 DQ17 23 DQ21 41 /CAS2 59 V
CC
6 DQ2 24 DQ6 42 /CAS3 60 DQ29
7 DQ18 25 DQ22 43 /CAS1 61 DQ13
8 DQ3 26 DQ7 44 /RAS0 62 DQ30
9 DQ19 27 DQ23 45 /RAS1 63 DQ14
10 V
CC
28 A7 46 NC 64 DQ31
11 NC 2 9 NC 4 7 /WE 65 DQ15
12 A0 30 V
CC
48 NC 66 NC
13 A1 31 A8 49 DQ 8 67 PD1
14 A2 32 A9 50 DQ24 68 PD2
15 A3 33 / RAS3 51 DQ9 69 PD3
16 A4 34 / RAS2 52 DQ25 70 PD4
17 A5 35 NC 53 DQ10 71 NC
18 A6 36 NC 54 DQ26 72 V
SS
Presence Detect Pins
Pin No. Pin Name
67 PD1 NC NC
68 PD2 NC NC
69 PD3 NC V
70 PD4 NC NC
MSC23232D/DL
-60BS16/DS16
MSC23232D/DL
-70BS16/DS16
SS
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Semiconductor MSC23232D/DL
/WE
/CAS0
/RAS0
A0-A9
/CAS1
/RAS1
A0-A9
DQDQDQ0DQDQ
/OE
VSS/RAS
/CAS
/WE
V
A0-A9
DQ
DQ
DQDQ/OE
VCC/RAS
/CAS
/WE
VSSDQ1
DQ2
DQ3
/CAS2
/RAS2
/CAS3
/RAS3
V
VSSC1-C16
A0-A9
DQDQDQDQ/OE
V
/RAS
/CAS
/WE
V
A0-A9
DQDQDQDQ/OE
V
/RAS
/CAS
/WE
V
DQ4
DQ5
DQ6
DQ7
A0-A9DQDQDQDQ
/OE
V
/RAS
/CAS
/WE
VSSA0-A9
DQ
DQDQDQ
/OE
V
/RAS
/CAS
/WE
VCCDQ8
DQ9
DQ10
DQ11
A0-A9
DQ
DQ
DQDQ/OE
/RAS
/CAS
/WE
A0-A9
DQ
DQ
DQDQ/OE
/RAS
/CAS
/WE
DQ12
DQ13
DQ14
DQ15
A0-A9
DQDQDQ16DQDQ
/OE
/RAS
/CAS
/WE
A0-A9
DQ
DQ
DQDQ/OE
/RAS
/CAS
/WE
DQ17
DQ18
DQ19
VSSVCCVCCVSSVCCVSSVSSVCCA0-A9
DQDQDQ20DQDQ
/OE
/RAS
/CAS
/WE
A0-A9
DQDQDQDQ/OE
/RAS
/CAS
/WE
DQ21
DQ22
DQ23
VSSVCCVCCV
A0-A9
DQDQDQ26DQDQ
/OE
/RAS
/CAS
/WE
A0-A9DQDQDQDQ
/OE
/RAS
/CAS
/WE
DQ27
DQ28
DQ27
VSSVCCVCCV
A0-A9
DQDQDQ28DQDQ
/OE
/RAS
/CAS
/WE
A0-A9
DQ
DQ
DQDQ/OE
/RAS
/CAS
/WE
DQ29
DQ30
DQ31
VSSVCCVCCV
BLOCK DIAGRAM
CC
CC
SS
SS
CC
SS
CC
CC
SS
SS
SS
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Semiconductor MSC23232D/DL
ELECTRICAL CHARAC TERISTICS
Absolute Maximum Ratings
Parameter Symbol Rating Unit
Voltage on Any Pin Relative to V
Voltage on VCC Supply Relative to V
SS
SS
Short Circuit Output Curr ent I
VIN, V
V
OS
CC
OUT
-1.0 to +7.0 V
-1.0 to +7.0 V
50 mA
Power Dissipation PD *16W
Operating Temperature T
Storage Temperature T
OPR
STG
0 to +70 °C
-40 to +125 °C
* Ta = 25°C
Recommended Operating Conditions
( Ta = 0°C to +70°C )
Paramete r Symbol Min. Typ. Max. Unit
Power Supply Voltage
Input High Voltage V
Input Low Voltage V
V
CC
V
SS
IH
IL
4.5 5.0 5.5 V
000V
2.4 - 6.5 V
-1.0 - 0.8 V
Capacitance
Paramete r Symbol Typ. Max. Uni t
Input Capacitance (A0 - A9) C
Input Capacitance (/WE) C
Input Capacitance (/RAS0- /RAS3) C
Input Capacitance (/CAS0- /CAS3) C
I/O Capacitance (DQ0 - DQ31) C
Note: Capacitance measured with Boonton Met er.
( VCC = 5V ± 10%, Ta = 25°C, f = 1 MHz )
IN1
IN2
IN3
IN4
DQ
- 109 pF
- 125 pF
-35pF
-35pF
-20pF
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Semiconductor MSC23232D/DL
DC Characteristics
(VCC = 5V ± 10%, Ta = 0°C to +70°C )
Parame ter
Symbo
Input Leakage Current I
Output Leakage Current I
Output High Voltage V
Output Low Voltage V
Average Power Supply Current
(Operating)
Power supply current
(Standby)
Average Power Supply Current
(/RAS only refresh)
I
I
I
l
LI
LO
OH
OL
CC1
CC2
CC3
Condition
MSC23232D/DL
-60BS16/DS16
MSC23232D/DL
-70BS16/DS16
Unit Note
Min. Max. Min. Max.
0V ≤ VIN ≤ 6.5V;
All other pins not
-160 160 -160 160 µA
under test = 0V
DQ disable
OUT
≤ 5.5V
0V ≤ V
IOH = -5.0mA 2.4 V
-20 20 -20 20 µA
CC
2.4 V
CC
IOL = 4.2mA 0 0. 4 0 0.4 V
/RAS, /CAS cycling,
= Min.
t
RC
/RAS, /CAS = V
IH
/RAS, /CAS
-0.2V
≥ V
CC
- 760 - 680 mA 1, 2
-32-32mA1
-16-16mA1
- 3.2 - 3.2 mA 1, 5
/RAS cycling,
/CAS = V
= Min.
t
RC
,
IH
- 760 - 680 mA 1, 2
V
Average Power Supply Current
(/CAS before /RAS refresh)
Average Power Supply Current
(Fast Page Mode)
Average Power Supply Current
(Battery Backup)
I
CC6
I
CC7
I
CC10
/RAS cycling,
/CAS before /RAS
/RAS = VIL,
/CAS cycling,
= Min.
t
PC
tRC = 125µs,
/CAS before /RAS
Notes: 1. ICC Max. is specified as ICC for output open conditi on.
2. Address can be changed once or less while / RA S = V
3. Address can be changed once or less while / CA S = V
4. V
- 0.2V ≤ VIH ≤ 6.5V, - 1.0V ≤ VIL ≤ 0.2V.
CC
5. L-version.
- 760 - 680 mA 1, 2
- 600 - 520 mA 1, 3
- 4.8 - 4.8 mA 1, 4, 5
.
IL
.
IH
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Semiconductor MSC23232D/DL
AC Characteristics (1/2)
Paramete r Symbol
(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3, 9, 10
MSC23232D/DL
-60BS16/DS16
MSC23232D/DL
-70BS16/DS16
Unit Note
Min. Max. Min. Max.
Random Read or Writ e Cycle Time t
Fast Page Mode Cycle Time t
Access Time from /RAS t
Access Time from /CAS t
Access Time from Column Address t
Access Time from /CAS Precharge t
Output Low Impedance Time from /CAS t
/CAS to Data Output Buffer Turn-off Delay Time t
Transition Time t
Refresh Period t
Refresh Period (L-version) t
/RAS Precharge Tim e t
/RAS Pulse Width t
/RAS Pulse Width ( Fast Page Mode) t
/RAS Hold Time t
/CAS Precharge Time (Fast Page Mode) t
/CAS Pulse Width t
RC
PC
RAC
CAC
AA
CPA
CLZ
OFF
T
REF
REF
RP
RAS
RASP
RSH
CP
CAS
110 - 130 - ns
40 - 45 - ns
- 60 - 70 ns 4, 5, 6
- 15 - 20 ns 4, 5
- 30 - 35 ns 4, 6
- 35 - 40 ns 4
0-0-ns4
0 15 0 20 ns 7
3 50 3 50 ns 3
-16-16ms
- 128 - 128 ms
40 - 50 - ns
60 10K 70 10K ns
60 100K 70 100K ns
15 - 20 - ns
10 - 10 - ns
15 10K 20 10K ns
/CAS Hold Time t
/CAS to /RAS Pr echarge Time t
/RAS Hold Time from /CAS Precharge t
/RAS to /CAS Delay Time t
/RAS to Column Address Delay Time t
Row Address Set-up Time t
Row Address Hol d Time t
Column Address Set-up Time t
Column Address Hol d Time t
Column Address Hold Time from /RAS t
Column Address to /RAS Lead Time t
Read Command Set-up Time t
Read Command Hold Time t
Read Command Hold Time referenced to /RAS t
CSH
CRP
RHCP
RCD
RAD
ASR
RAH
ASC
CAH
AR
RAL
RCS
RCH
RRH
60 - 70 - ns
5-5-ns
35 - 40 - ns
20 45 20 50 ns 5
15 30 15 35 ns 6
0-0-ns
10 - 10 - ns
0-0-ns
15 - 15 - ns
50 - 55 - ns
30 - 35 - ns
0-0-ns
0-0-ns8
0-0-ns8
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Semiconductor MSC23232D/DL
AC Characteristics (2/2)
Paramete r Symbol
(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3, 9, 10
MSC23232D/DL
-60BS16/DS16
MSC23232D/DL
-70BS16/DS16
Unit Note
Min. Max. Min. Max.
Writ e Command Set-up Time t
Writ e Command Hold Time t
Writ e Command Hold Time from /RAS t
Writ e Command Pulse Wi dth t
Writ e Command to /RAS Lead Time t
Writ e Command to /CAS Lead Time t
Data-in Set-up Time t
Data-i n Ho ld Time t
Data-in Hold Time from /RAS t
/CAS Active Delay Time from /RAS Precharge t
/RAS to /CAS Set-up Time
(/CAS before /RAS)
/RAS to /CAS Hold Time
(/CAS before /RAS)
/WE to /RAS Precharge Time
(/CAS before /RAS)
/WE Hold Time from /RAS
(/CAS before /RAS)
WCS
WCH
WCR
WP
RWL
CWL
DHR
RPC
t
CSR
t
CHR
t
WRP
t
WRH
DS
DH
0-0-ns
10 - 10 - ns
45 - 50 - ns
10 - 10 - ns
15 - 20 - ns
15 - 20 - ns
0-0-ns
15 - 15 - ns
50 - 55 - ns
10 - 10 - ns
5-5-ns
10 - 10 - ns
10 - 10 - ns
10 - 10 - ns
/RAS to /WE Set-up Time
(Test Mode)
/RAS to /WE Hold Time
(Test Mode)
t
WTS
t
WTH
10 - 10 - ns
10 - 10 - ns
Page 9
Semiconductor MSC23232D/DL
Notes: 1. A start-up delay of 200µs is required after power-up, fol lowed by a minimum of eight initialization cycles
(/RAS only r efresh or /CAS before /RAS refresh) befor e pr oper devic e oper ation is achieved.
2. The AC characteristic s assumes t
3. V
(Min.) and VIL(Max.) are ref erence lev els f or m easuring input tim ing signals. Transiti on ti me (tT) are
IH
measured between V
and VIL.
IH
= 5ns.
T
4. This parameter is m easured wit h a load circuit equivalent t o 2TTL loads and 100pF.
5. Operation within the t
(Max.) is specified as a reference point only. If t
t
RCD
RCD
the access tim e is controll ed by t
6. Operation within the t
(Max.) is specified as a reference point only. If t
t
RAD
RAD
the access tim e is controll ed by t
7. t
(Max.) define the time at which the output achieves the open circuit condition and are not referenced
OFF
(Max.) limit ensures that t
.
CAC
(Max.) limit ensures that t
.
AA
(Max.) can be met.
RAC
is greater than the specified t
RCD
(Max.) can be met.
RAC
is greater than the specified t
RAD
(Max.) limit, then
RCD
(Max.) limit, then
RAD
to output voltage levels.
8. t
RCH
or t
must be satisfi ed for a read cycle.
RRH
9. The test mode is initiated by perf orming a /WE and /CAS before /RAS ref resh cycle. This mode is
latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet
is a 2-bit parallel test functi on. CA0 is not used. In a read cycle, if all internal bits are equal, the DQ pin
will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level.
The test mode is cl eared and t he mem ory devic e retur ned to i ts norm al operati ng state by a / RAS onl y
refresh or /CAS before /RAS refresh cycle.
10. In a test mode read cycle, the value of access time parameters is delayed for 5ns for the specified value.
These parameters should be specifi ed in test m ode cycle by adding the abov e v alue t o the specif ied
value in this data sheet.
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