Datasheet MSC2323258A-60BS4, MSC2323258A-60DS4, MSC2323258A-70BS4, MSC2323258A-70DS4 Datasheet (OKI)
Page 1
¡ Semiconductor
MSC2323258A-xxBS4/DS4
¡ Semiconductor
MSC2323258A-xxBS4/DS4
2,097,152-Word ¥ 32-Bit DRAM MODULE : FAST PAGE MODE TYPE WITH EDO
1
DESCRIPTION
The Oki MSC2323258A-xxBS4/DS4 is a fully decoded 2,097,152-word ¥ 32-bit CMOS dynamic
random access memory composed of two 16-Mb (1M ¥ 16) DRAMs in SOJ. The mounting of two
DRAMs together with decoupling capacitors on a 72-pin glass epoxy SIMM Package supports
any application where high density and large capacity of storage memory are required.
FEATURES
• 2,097,152-word ¥ 32-bit organization
• 72-pin SIMM
MSC2323258A-xxBS4 : Gold tab
MSC2323258A-xxDS4 : Solder tab
• Single 5 V supply ±10% tolerance
• Input : TTL compatible
• Output : TTL compatible, 3-state, nonlatch
• Refresh : 1024 cycles/16 ms
• CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability
• Fast Page Mode with EDO capability
PRODUCT FAMILY
Family
MSC2323258A-60BS4/DS4 2475 mW
MSC2323258A-70BS4/DS4 2255 mW
Access Time (Max.)
t
RAC
60 ns 30 ns 15 ns 110 ns
70 ns 35 ns 20 ns 130 ns
t
AA
t
CAC
Cycle Time
(Min.)
Operating (Max.)
Power Dissipation
Standby (Max.)
22 mW
77
Page 2
MSC2323258A-xxBS4/DS4 ¡ Semiconductor
PIN CONFIGURATION
MSC2323258A-xxBS4/DS4
(Unit : mm)
* 1
107.95 ±0.2
101.19 Typ.3.38 Typ.
3.18f
19.0 ±0.2
Typ.
10.16
Typ.
6.35
2.03 Typ.
6.35 Typ.
1
1.27 ±0.2
R1.57
95.25
6.35
1.04 Typ.
*1 The common size difference of the board width 12.5 mm of its height is
specified as ±0.2. The value above 12.5 mm is specified as ±0.5.
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
1VSS16 A4 31 A8
Pin No.
46 NC
2 DQ0 17 A5 32 A9 47 WE
3 DQ16 18 A6 33 RAS3 48 NC
4 DQ1 19 NC 34 RAS2 49 DQ8
5 DQ17 20 DQ4 35 NC 50 DQ24
6 DQ2 21 DQ20 36 NC 51 DQ9
7 DQ18 22 DQ5 37 NC 52 DQ25
8 DQ3 23 DQ21 38 NC 53 DQ10
9 DQ19 24 DQ6 39 V
10 V
CC
25 DQ22 40 CAS0 55 DQ11
SS
54 DQ26
11 NC 26 DQ7 41 CAS2 56 DQ27
12 A0 27 DQ23 42 CAS3 57 DQ12
13 A1 28 A7 43 CAS1 58 DQ28
14 A2 29 NC 44 RAS0 59 V
15 A3 30 Vcc 45 RAS1 60 DQ29
72
Pin Name
CC
6.0 Min.
+0.1
1.27
–0.08
Pin No.
61 DQ13
62 DQ30
63 DQ14
64 DQ31
65 DQ15
66 NC
67 PD1
68 PD2
69 PD3
70 PD4
71 NC
72 V
9.3 Max.
Pin Name
SS
Presence Detect Pins
Pin No.
67 PD1
68 PD2
69 PD3
70 PD4
78
Pin Name
-60BS4/DS4
NC
NC
NC
NC
MSC2323258AMSC2323258A
-70BS4/DS4
NC
NC
V
SS
NC
Page 3
¡ Semiconductor
BLOCK DIAGRAM
MSC2323258A-xxBS4/DS4
A0 - A9
CAS0
CAS1
WE
A0 - A9
RAS
LCAS
UCAS
WE
OE
V
A0 - A9
SSVCC
DQ0
DQ1
DQ2
DQ15
DQ0
DQ0
DQ1
DQ2
DQ15
DQ16
DQ0
DQ1
DQ2
DQ15
V
DQ0
A0 - A9
CCVSS
A0 - A9
RAS
LCAS
UCAS
WE
OE
1
RAS1RAS0
RAS2
CAS2
CAS3
V
CC
V
SS
RAS
LCAS
UCAS
WE
OE
C8C1
V
SSVCC
DQ1
DQ2
DQ15
DQ17
DQ18
DQ31
DQ1
DQ2
DQ15
V
CCVSS
RAS
LCAS
UCAS
WE
OE
RAS3
79
Page 4
MSC2323258A-xxBS4/DS4 ¡ Semiconductor
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Voltage on Any Pin Relative to V
Voltage V
Supply Relative to V
CC
Short Circuit Output Current
Power Dissipation
Operating Temperature
Storage Temperature
SS
SS
Symbol
VIN, V
OUT
V
CC
I
OS
P
D
T
opr
T
stg
Rating Unit
–1.0 to 7.0 V
–1.0 to 7.0 V
50 mA
4W
0 to 70 °C
–40 to 125 °C
Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to the conditions as detailed in the
operational sections of this data sheet. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Recommended Operating Conditions
(Ta = 0°C to 70°C)
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min.
Typ.
4.5 5.0 5.5 V
000V
2.4 — 6.5 V
–1.0 — 0.8 V
Max.
Unit
Capacitance
Parameter
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
DQ
Typ.
—27
Note : Capacitance measured with Boonton Meter.
Max.
(Ta = 25°C, f = 1 MHz)
Unit
pFInput Capacitance (A0 - A9)
pFInput Capacitance (WE)—35
pFInput Capacitance (RAS0 - RAS3)—13
pFInput Capacitance (CAS0 - CAS3)—20
pFI/O Capacitance (DQ0 - DQ31) — 20
80
Page 5
¡ Semiconductor
MSC2323258A-xxBS4/DS4
DC Characteristics
Parameter
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Average Power
Supply Current
(Operating)
Power Supply
Current (Standby)
Average Power
Supply Current
(RAS-only Refresh)
Average Power
Supply Current
(CAS before RAS Refresh)
Average Power
Supply Current
(Fast Page Mode)
Symbol
I
LI
I
LO
V
OH
V
OL
I
CC1
I
CC2
I
CC3
I
CC6
I
CC7
Condition
0 V £ VI £ 6.5 V;
All other pins not
under test = 0 V
disable
D
OUT
0 V £ V
I
OH
I
OL
£ 5.5 V
O
= –5.0 mA
= 4.2 mA
RAS, CAS cycling,
= Min.
t
RC
RAS, CAS = V
IH
RAS, CAS
≥ V
–0.2 V
CC
RAS cycling,
= Min.
,
IH
CAS = V
t
RC
RAS cycling,
CAS before RAS,
= Min.
t
RC
RAS = V
,
IL
CAS cycling,
= Min.
t
HPC
MSC2323258A
-60BS4/DS4
Min.
–40
–20
2.4
0
—
—
—
—
—
—
Max.
40
20
V
CC
0.4
450
8
4
450
450
450
(VCC = 5 V ±10%, Ta = 0°C to 70°C)
MSC2323258A
-70BS4/DS4
Min.
–40
–20
2.4
0
—
—
—
—
—
—
Max.
40
20
V
CC
0.4
410
8
4
410
410
410
Unit
1
µA
µA
V
V
mA
mA
mA
mA
mA
mA
Note
1, 2
1
1
1, 2
1, 2
1, 3
Notes: 1. ICC Max. is specified as ICC for output open condition.
2. Address can be changed once or less while RAS=VIL.
3. Address can be changed once or less while CAS=VIH.
81
Page 6
MSC2323258A-xxBS4/DS4 ¡ Semiconductor
AC Characteristics (1/2)
Parameter
Random Read or Write Cycle Time
Fast Page Mode Cycle Time t
Access Time from RAS t
Access Time from CAS t
Access Time from Column Address t
Access Time from CAS Precharge t
Output Low Impedance Time from CAS t
Output Hold Time from CAS Low t
CAS to Data Output Buffer Turn-off Delay Time
RAS to Data Output Buffer Turn-off Delay Time
WE to Data Output Buffer Turn-off Delay Time
Transition Time t
Refresh Period t
RAS Precharge Time t
RAS Pulse Width t
RAS Pulse Width (Fast Page Mode) t
RAS Hold Time t
CAS Precharge Time t
CAS Pulse Width t
RAS Low to CAS High Delay Time t
CAS High to RAS Low Delay Time t
RAS Hold Time from CAS Precharge t
RAS to CAS Delay Time t
RAS to Column Address Delay Time t
RAS to Second CAS Delay Time t
Row Address Set-up Time t
Row Address Hold Time t
Column Address Set-up Time t
Column Address Hold Time t
Column Address Hold Time from RAS t
Column Address to RAS Lead Time t
Symbol
t
RC
HPC
RAC
CAC
AA
CPA
CLZ
DOH
t
CEZ
t
REZ
t
WEZ
T
REF
RP
RAS
RASP
RSH
CP
CAS
CSH
CRP
RHCP
RCD
RAD
RSCD
ASR
RAH
ASC
CAH
AR
RAL
(V
= 5 V ±10%, Ta = 0°C to 70°C) Note 1,2,3
CC
MSC2323258A
-60BS4/DS4
Min.
110
25
—
—
—
—
0
0
3
—
40
60
60
15
10
10
40
5
35
20
15
0
10
0
15
40
30
Max.
—
—
60
15
30
35
—
15
50
16
—
10k
100k
—
—
10k
—
—
—
45
30
—
—
—
—
—
—
MSC2323258A
-70BS4/DS4
Min.
130
30
—
—
—
—
0
0
3
—
50
70
70
20
10
10
45
5
40
20
15
0
10
0
15
45
35
Max.
—
—
70
20
35
40
—
15
50
16
—
10k
100k
—
—
10k
—
—
—
50
35
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns5—5—
ns
ns 7, 8015015
ns 7015015
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns70 —60 —
ns
ns
ns
ns
ns
ns
Note
4, 5, 6
4, 5
4, 6
4
4
7, 8
3
5
6
82
Page 7
¡ Semiconductor
MSC2323258A-xxBS4/DS4
AC Characteristics (2/2)
(V
= 5 V ±10%, Ta = 0°C to 70°C) Note 1,2,3
CC
MSC2323258A
Parameter
Read Command Set-up Time
Read Command Hold Time
Read Command Hold Time referenced to RAS
Write Command Set-up Time
Write Command Hold Time
Write Command Hold Time from RAS
Write Command Pulse Width
Write Command Pulse Width (Output Disable)
Write Command to RAS Lead Time
Write Command to CAS Lead Time
Data-in Set-up Time
Data-in Hold Time
Data-in Hold Time from RAS
CAS Active Delay Time from RAS Precharge
RAS to CAS Set-up Time (CAS before RAS)
RAS to CAS Hold Time (CAS before RAS)ns
Symbol
RCS
t
RCH
t
RRH
t
WCS
t
WCH
t
WCR
t
WP
t
WPE
t
RWL
t
CWL
t
DS
t
DH
t
DHR
t
RPC
t
CSR
t
CHR
-60BS4/DS4
Min.
0
0
0
0
10
40
10
15
15
0
15
40
5
5
10
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
MSC2323258A
-70BS4/DS4
Min.
0
0
0
0
15
45
15
20
20
0
15
45
5
5
15
Max.
—t
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns10 —5—
ns
ns
ns
ns
ns
ns
ns
Note
1
9
9
83
Page 8
MSC2323258A-xxBS4/DS4 ¡ Semiconductor
Notes: 1. A start-up delay of 200 µs is required after power-up, followed by a minimum of eight
initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device
operation is achieved.
2. The AC characteristics assume tT = 5 ns.
3. VIH (Min.) and VIL (Max.) are reference levels for measuring input timing signals.
Transition times (tT) are measured between VIH and VIL.
4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF.
5. Operation within the t
t
(Max.) is specified as a reference point only. If t
RCD
t
(Max.) limit, access time is controlled by t
RCD
6. Operation within the t
t
(Max.) is specified as a reference point only. If t
RAD
t
(Max.) limit, access time is controlled by tAA.
RAD
7. t
CEZ
(Max.), t
(Max.) and t
REZ
(Max.) limit ensures that t
RCD
(Max.) limit ensures that t
RAD
(Max.) define the time at which the output achieves
WEZ
CAC
(Max.) can be met.
RAC
is greater than the specified
RCD
.
(Max.) can be met.
RAC
is greater than the specified
RAD
the open circuit condition and are not referenced to output voltage levels.
8. t
9. t
CEZ
RCH
and t
or t
must be satisfied for open circuit condition.
REZ
must be satisfied for a read cycle.
RRH
84
See ADDENDUM H for AC Timing Waveforms
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