Page 1
SEMICONDUCTOR TECHNICAL DATA
The MRFIC Line
Order this document
by MRFIC0913/D
# !!
"
This integrated circuit is intended for GSM class IV handsets. The device is
specified for 2.8 watts output power and 48% minimum power added efficiency
under GSM signal conditions at 4.8 Volt supply voltage. To achieve this superior
performance, Motorola’s planar GaAs MESFET process is employed. The
device is packaged in the PFP–16 Power Flat Package which gives excellent
thermal performance through a solderable backside contact.
• Usable Frequency Range 800 to 1000 MHz
• Typical Output Power:
36.0 dBm @ 5.8 Volts
35.0 dBm @ 4.8 Volts
31.5 dBm @ 3.6 Volts
• 48% Minimum Power Added Efficiency
• Low Parasitic, High Thermal Dissipation Package
• Order MRFIC0913R2 for Tape and Reel Option.
R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel.
• Device Marking = M0913
ABSOLUTE MAXIMUM RATINGS
Supply Voltage VD1, V
RF Input Power P
Gate Voltage V
Ambient Operating Temperature T
Storage Temperature T
Thermal Resistance, Junction to Case R
(TA = 25°C unless otherwise noted)
Rating
Symbol Value Unit
stg
θJC
in
SS
A
D2
900 MHz
GSM CELLULAR
INTEGRATED POWER AMPLIFIER
GaAs MONOLITHIC
INTEGRATED CIRCUIT
CASE 978–02
(PFP–16)
9 Vdc
15 dBm
–6 Vdc
–40 to +85 °C
–65 to +150 °C
10 °C/W
Motorola, Inc. 1996
MOTOROLA RF DEVICE DATA
9
GND 8
V
10
D1
11
GND
V
12
G2
V
13
G1
GND
14
RF IN
15
16
N/C
Pin Connections and Functional Block Diagram
7
6
5
4
3
2
1
N/C
V
D2
GND
RF OUT
RF OUT
GND
V
SS
GND
MRFIC0913
1
Page 2
RECOMMENDED OPERATING RANGES
Parameter Symbol Value Unit
Supply Voltage VD1, V
Gate Voltage V
RF Frequency Range f
RF Input Power P
SS
RF
RF
D2
2.7 to 7.5 Vdc
–5 to –3 Vdc
800 to 1000 MHz
6 to 13 dBm
ELECTRICAL CHARACTERISTICS (V
Period, TA = 25°C unless otherwise noted. Measured in Reference Circuit Shown in Figure 1.)
Characteristic
Frequency Range 880 — 915 MHz
Output Power 34.5 35 — dBm
Power Added Efficiency 48 — — %
Input VSWR — 2:1 — VSWR
Harmonic Output
2nd
3rd
Output Power at Low voltage (VD1, VD2 = 4.0 V) 33.3 33.5 — dBm
Output Power, Isolation (VD1, VD2 = 0 V) — –20 –15 dBm
Noise Power in 100 kHz, 925 to 960 MHz — — –90 dBm
Stability – Spurious Output (Pin = 10 to 13 dBm, P
VSWR = 6:1 at any Phase Angle, Source VSWR = 3:1, at any Phase Angle,
VD1, VD2 adjusted for Specified P
Load Mismatch stress (Pin = 10 to 13 dBm, P
at any Phase Angle, VD1, VD2 Adjusted for Specified P
3 dB VDD Bandwidth (VD1, VD2 = 0 to 6 V) 1 — — MHz
Negative Supply Current — — 1.25 mA
out)
V
D1
, VD2 = 4.8 V, VSS = –4 V, Pin = 10 dBm, Peak Measurement at 12.5% Duty Cycle, 4.6 ms
D1
Min Typ Max Unit
= 5 to 35 dBm, Load
out
= 5 to 35 dBm, Load VSWR = 10:1
out
out
)
—
—
— — –60 dBc
No Degradation in Output Power after Returning to
—
—
Standard Conditions
V
D2
–30
–35
dBc
C9 C10
L1
RF IN
C8
C1, C3, C10 47 pF, ATC
C2, C9 47 nF, Vitramon
C5 10 pF, ATC
C6 22 nF, Vitramon
C8 6.8 pF, ATC
R4
R3
9
10
11
12
13
14
15
16
L1 8.2 nH, 0805 Toko
L2 10 Turn MicroSpring,
Coilcraft 1606–10
R1 330 Ω
Figure 1. 900 MHz Reference Circuit
8
7
6
5
4
3
2
1
L2
C5
R1
C3
C2
RF OUT
V
SS
C1
T1
C6
R3 1.8 kΩ
R4 2.7 kΩ
T1 5 mm 30 Ω Microstrip Line
BOARD MATERIAL Glass/Epoxy, εr = 4.45
MRFIC0913
2
MOTOROLA RF DEVICE DATA
Page 3
C13
0 V
0 V
5
D
R5
Q1
D
6
7
D
8
D
4.8 V BATTERY
3 V
VRAMP
3 V
STANDBY
1
14
G
4
3
S
2
S
1
2
C12
3
CR1
C16
C1 33 pF, 0603 NPO/COG
C2, C9 33 nF
C3 47 pF, 0603 NPO/COG
C4, C5, C8 6.8 pF, 0603 NPO/COG
C6 33 nF
C7 220 nF
C10 33 pF, 0603 NPO/COG
C12 – C16 1 µF
4
5
6
7
U2
R2
13
12
11
10
C14
C9 C10
C15
9
8
L1
RF IN
CR1 MMBD701LT1
L1 8.2 nH, 0805 Toko
L2 10 Turn MicroSpring,
Q1 MMSF4N01HD
R1 330 Ω
C8
Coilcraft 1606–10 (for
improved harmonic rejection
only)
R4
R3
10
11
12
13
14
15
16
9
U1
R2 100 Ω
R3 1.8 kΩ
R4 2.7 kΩ
R5 470 Ω
T1 5 mm 30 Ω Microstrip Line
U1 MRFIC0913
U2 MC33169 (–4 V Version)
BOARD MATERIAL Glass/Epoxy, εr = 4.45
8
7
6
5
4
3
2
1
T1
L2
C5
C6
C1
C2
C3
C4
RF
OUT
R1
C7
Note: Use of a Schottky diode such as MMBD701LT1 for CR1 is mandatory below 3.6 V.
A general purpose silicon diode can be used above 3.6 V.
Figure 2. GSM Application Circuit Configuration with Drain Switch
and MC33169 GaAs Power Amplifier Support IC
MOTOROLA RF DEVICE DATA
MRFIC0913
3
Page 4
TYPICAL CHARACTERISTICS
34.0
33.8
33.6
33.4
, OUTPUT POWER (dBm)
out
P
33.2
33.0
885
880 895 900 905 915
890 910
f, FREQUENCY (MHz)
TA = – 40°C
25°C
85°C
Pin = 10 dBm
VD1 = VD2 = 4 V
VSS = – 4 V
Figure 3. Output Power versus Frequency Figure 4. Power Added Efficiency
35.6
35.4
35.2
35.0
34.8
, OUTPUT POWER (dBm)
out
P
34.6
34.4
880 915
TA = – 40°C
25°C
85°C
Pin = 10 dBm
VD1 = VD2 = 4.8 V
VSS = – 4 V
895 900 905890 910885
f, FREQUENCY (MHz)
58
56
54
52
50
48
PAE, POWER ADDED EFFICIENCY (%)
46
880 915
TA = – 40°C
25°C
85°C
Pin = 10 dBm
VD1 = VD2 = 4.8 V
VSS = – 4 V
895 900 905890 910885
f, FREQUENCY (MHz)
versus Frequency
56
TA = 25
°
C
VSS = – 4 V
4 V
55
54
53
52
51
PAE, POWER ADDED EFFICIENCY (%)
50
880 915
4.8 V
4 V
VD1 = VD2 = 5.6 V
895 900 905890 910885
f, FREQUENCY (MHz)
Pin = 10 dBm
Figure 5. Output Power versus Frequency Figure 6. Power Added Efficiency
36.8
36.6
36.4
36.2
36.0
35.8
, OUTPUT POWER (dBm)
35.6
out
P
35.4
35.2
880 915
TA = – 40°C
25°C
85°C
Pin = 10 dBm
VD1 = VD2 = 5.6 V
VSS = – 4 V
895 900 905890 910885
f, FREQUENCY (MHz)
Figure 7. Output Power versus Frequency
versus Frequency
40
85°C
35
25°C
30
TA = – 40°C
25
RL, RETURN LOSS (dB)
20
15
880 915
895 900 905890 910885
f, FREQNENCY (MHz)
Pin = 10 dBm
VD1 = VD2 = 4.8 V
VSS = – 4 V
Figure 8. Input Return Loss versus Frequency
MRFIC0913
4
MOTOROLA RF DEVICE DATA
Page 5
TYPICAL CHARACTERISTICS
40
30
20
10
–40°C
0
, OUTPUT POWER (dBm)
out
P
TA = 85°and 25°C
–10
–20
–30
02346
15
V
, VD2, DRAIN VOLTAGE (VOLTS)
D1
f = 900 MHz
Pin = 10 dBm
VSS = – 4 V
60
TA = – 40°C
50
25°C
40
30
20
10
PAE, POWER ADDED EFFICIENCY (%)
0
06
85°C
23415
VD1, VD2, DRAIN VOLTAGE (VOLTS)
Figure 9. Output Power versus Drain Voltage Figure 10. Power Added Efficiency versus
Drain Voltage
36
34
32
30
28
26
, OUTPUT POWER (dBm)
24
out
P
22
20
–7 3 9 13
–5 5 7 11–3
TA = – 40°C
85°C
25°C
f = 900 MHz
VD1 = VD2 = 4.8 V
VSS = – 4 V
–1 1
Pin, INPUT POWER (dBm)
60
50
40
TA = – 40°C
30
20
10
PAE, POWER ADDED EFFICIENCY (%)
0
–7 13
–1
Pin, INPUT POWER (WATTS)
85°C
25°C
39–5 51711–3
f = 900 MHz
Pin = 10 dBm
VSS = – 4 V
f = 900 MHz
VD1 = VD2 = 4.8 V
VSS = – 4 V
Figure 11. Output Power versus Input Power
f
(MHz) R jX R jX
880 13.65 –44.05 3.15 5.06
885 13.64 –44.74 3.13 4.97
890 13.65 –45.44 3.10 4.89
895 13.64 –46.14 3.08 4.80
900 13.64 –46.84 3.06 4.71
905 13.65 –47.55 3.04 4.63
910 13.66 –48.27 3.02 4.54
915 13.66 –49.00 3.00 4.45
T able 1. Device Impedances Derived from Circuit Characterization
Z
in
Ohms
Figure 12. Power Added Efficiency versus
Input Power
*
Z
OL
Ohms
MOTOROLA RF DEVICE DATA
MRFIC0913
5
Page 6
APPLICATIONS INFORMATION
Design Philosophy
The MRFIC0913 is a two–stage Integrated Power Amplifier
designed for use in cellular phones, especially for those used
in GSM Class IV, 4.8 V operation. With matching circuit modifications, it is also applicable for use in GSM Class IV 6 V and
Class V 3.6 V equipment. Due to the fact that the input, output
and some of the interstage matching is accomplished off chip,
the device can be tuned to operate anywhere within the 800 to
1000 MHz frequency range. Typical performance at different
battery voltages is:
S
36.0 dBm @ 5 . 8 V
S
35.0 dBm @ 4 . 8 V
S
31.5 dBm @ 3 . 6 V
This capability makes the MRFIC0913 suitable for portable
cellular applications such as:
S
6 and 4.8 V GS M C l a ss I V
S
3.6 V GSM Cl a s s V
S
3.6 V , 1.2 W Analog Cellular
RF Circuit Considerations
The MRFIC0913 can be tuned by changing the values and/
or positions of the appropriate external components. Refer to
Figure 2, a typical GSM Class IV applications circuit.
The input match is a shunt–C, series–L, low–pass structure
and can be retuned as desired with the only limitation being
the on–chip 12 pF blocking capacitor. For saturated applications such as GSM and analog cellular, the input match should
be optimized at the rated RF input power.
Interstage matching can be optimized by changing the value and/or position of the decoupling capacitor on the VD1 supply line. Moving the capacitor closer to the device or reducing
the value increases the frequency of resonance with the inductance of the device’s wirebonds and leadframe pin.
Output matching is accomplished with a one–stage low–
pass network as a compromise between bandwidth and harmonic rejection. Implementation is through chip capacitors
mounted along a 30 or 50Ω microstrip transmission line. Values and positions are chosen to present a 3 Ω loadline to the
device while conjugating the device output parasitics. The network must also properly terminate the second and third harmonics to optimize efficiency and reduce harmonic output.
When low–Q commercial chip capacitors are used for the
shunt capacitors, loss can be reduced by mounting two capacitors in parallel, as shown in Figure 2, to achieve the total
value needed.
Loss in circuit traces must also be considered. The output
transmission line and the bias supply lines should be at least
0.6 mm in width to accommodate the peak circulating currents
which can be as high as 2 amperes. The bias supply line
which supplies the output should include an RF choke of at
least 8 nH, surface mount solenoid inductors or equivalent
length of microstrip lines. Discrete inductors will usually give
better efficiency and conserve board space.
The DC blocking capacitor required at the output of the device is best mounted at the 50Ω impedance point in the circuit
where the RF current is at a minimum and the capacitor loss
will have less effect.
Biasing Considerations
Gate bias is supplied to each stage separately through resis tive division of the VSS voltage. The top of each divider is brought
out through pins 12 and 13 (VG2 an d VG1 resp ec ti ve ly ) allowing
gate biasing through use of external resistors or positive volt ages. This allows setting the quiescent current of each stage
separately.
For applications where the amplifier is operated close to
saturation, such as GSM and analog cellular, the gate bias
can be set with resistors. Variations in process and temperature will not affect amplifier performance significantly in these
applications. The values shown in the Figure 1 will set quies cent currents of 80 to 160 mA for the first stage and 400 to 800
mA for the second stage.
For linear modes of operation which are required for PDC,
DAMPS and CDMA, the quiescent current must be more
carefully controlled. For these applications, the VG pins can be
referenced to some tunable voltage which is set at the time of
radio manufacturing. Less than 1.25 mA is required in the divider network so a DAC can be used as the voltage source.
Typical settings for 6 V linear operation are 100 mA ±5% for
the first stage, and 500 mA ±5% for the second stage.
Power Control Using the MC33169
The MC33169 is a dedicated GaAs power amplifier support
IC which provides the –4 V required for V
switch interface and driver and power supply sequencing. The
MC33169 can be used for power control in applications where
the amplifier is operated in saturation since the output power
in non–linear operation is proportional to V
very linear and repeatable power control transfer function.
This technique can be used open–loop to achieve 20–25 dB
dynamic range over process and temperature variation. With
careful design and selection of calibration points, this technique can be used for GSM phase II control where 29 dB dy namic range is required, eliminating the need for the
complexity and cost of closed–loop control.
The transmit waveform ramping function required for systems such as GSM can be implemented with a simple Sallen
and Key filter on the MC33169 control loop. The amplifier is
then ramped on as the V
implement the different power steps required for GSM, the
V
betwee n 0 V a n d 3 V f o r th e d e s i re d o u t p u t p o we r.
MMSF4N01HD N–MOS switch and the MRFIC0913 provide a
typical 1 MHz 3 dB loop bandwidth. The STANDBY pin must
be enabled (3 V) at least 300 µ s before the V
high and disabled (0 V) at least 20 µs before the V
goes low. This STANDBY function allows for the enabling of
the MC33169 one burst before the active burst thus reducing
power consumption.
Conclusion
gate biasing required for portable cellular applications. Together
with the MC33169 support IC, the device offers an efficient system solution for TDMA applications such as GSM where satu rated amplifier operation is used.
Evaluation Boards
grated Circuits by adding a “TF” suffix to the device type.
For a complete list of currently available boards and ones
in development for newly introduced product, please con tact your local Motorola Distributor or Sales Office.
pin is ramped between 0 V and the appropriate voltage
RAMP
For closed–loop configurations using the MC33169,
The MRFIC0913 offers the flexibility in matching circuitry and
Evaluation boards are available for RF Monolithic Inte-
pin is taken from 0 V to 3 V . To
RAMP
an N–MOS drain
SS,
2
. This provides a
D
RAMP
RAMP
pin goes
pin
MRFIC0913
6
MOTOROLA RF DEVICE DATA
Page 7
P ACKAGE DIMENSIONS
X 45
h
_
A
E2
e
14 x
A
e/2
A2
ccc C
1
8
L1
E1
8X E
M
bbb C
DETAIL Y
q
B
L
1.000
0.039
16
D
9
B
S
DATUM
H
PLANE
BOTTOM VIEW
b1
c
c1
b
M
SEATING
C
PLANE
W
W
GAUGE
PLANE
aaa C
SECT W–W
S
A
A1
D1
NOTES:
1. CONTROLLING DIMENSION: MILLIMETER.
2. DIMENSIONS AND TOLERANCES PER ASME
Y14.5M, 1994.
3. DATUM PLANE –H– IS LOCATED AT BOTTOM
OF LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DIMENSIONS D AND E1 DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE PROTRUSION
IS 0.250 PER SIDE. DIMENSIONS D AND E1 DO
INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –H–.
5. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION IS 0.127 TOTAL IN EXCESS OF THE
b DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. DATUMS –A– AND –B– TO BE DETERMINED AT
DATUM PLANE –H–.
MILLIMETERS
DIM MIN MAX
A 2.000 2.350
A1 0.025 0.152
A2 1.950 2.100
D 6.950 7.100
D1 4.372 5.180
E 8.850 9.150
E1 6.950 7.100
E2 4.372 5.180
L 0.466 0.720
L1 0.250 BSC
b 0.300 0.432
b1 0.300 0.375
c 0.180 0.279
c1 0.180 0.230
e 0.800 BSC
h ––– 0.600
q
0 7
__
aaa 0.200
bbb 0.200
ccc 0.100
DETAIL Y
CASE 978–02
ISSUE A
MOTOROLA RF DEVICE DATA
MRFIC0913
7
Page 8
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
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and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315
Mfax: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
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Mfax is a trademark of Motorola, Inc.
MRFIC0913
8
◊
MOTOROLA RF DEVICE DATA
MRFIC0913/D
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