Datasheet MPIC2130P Datasheet (Motorola)

Page 1
1
Motorola Power Products Division Advanced Data
Power Products Division
 
  
The MPIC2130 is a high voltage, high speed, power MOSFET and IGBT driver with three independent high side and low side referenced output channels for 3–Phase applications. Proprietary HVIC technology enables ruggedized monolith­ic construction. Logic inputs are compatible with 5 V CMOS or LSTTL outputs. A ground referenced operational amplifier provides an analog feedback of bridge current via an external current sense resistor. A current trip function which termi­nates all six outputs is also derived from this resistor . An open drain FAULT signal is provided to indicate that an over–current or undervoltage shutdown has oc­curred. The output drivers feature a high pulse current buffer stage designed for minimum driver cross–conduction. Propagation delays are matched to simplify use in high frequency applications.
The floating channels can be used to drive N–channel power MOSFET or IGBT’s in the high side configuration which operate from 10 to 600 volts.
Floating Channel Designed for Bootstrap Operation
Fully Operational to +600 V
Tolerant to Negative Transient Voltage
dV/dt Immune
Gate Drive Supply Range from 10 to 20 V
Undervoltage Lockout for All Channels
Over–current Shut Down Turns Off All Six Drivers
Independent Half–bridge Drivers
Matched Propagation Delay for All Channels
Outputs Out of Phase with Inputs
PRODUCT SUMMARY
V
OFFSET 600 V MAX
I
O+/– 200 mA/420 mA
V
OUT 10 – 20 V
t
on/off
(typical)
675 & 425 ns
Deadtime (typical)
2.5 m
s
This document contains information on a new product. Specifications and information herein are subject to change without notice.
REV 1
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by MPIC2130/D

SEMICONDUCTOR TECHNICAL DATA

Device
Package
3–PHASE
BRIDGE DRIVER
ORDERING INFORMATION
(TOP VIEW)
PIN CONNECTIONS
P SUFFIX
PLASTIC PACKAGE
CASE 710–02
MPIC2130P PDIP
28
1
1 2 3 4 5 6 7 8
22
23
24
25
26
27
28
9
21
20 10 11 12 13 14
17
18
19
16
15
V
CC
HIN1 HIN2 HIN3 LIN1 LIN2 LIN3 FAULT ITRIP CAO CA– V
SS
V
SO
LO3
V
B1
HO1
V
S1
V
B2
HO2
V
S2
V
B3
HO3
V
S3
LO1 LO2
Motorola, Inc. 1996
Page 2
MPIC2130
2
Motorola Power Products Division Advanced Data
SIMPLIFIED BLOCK DIAGRAM
LATCH
UV
DETECTOR
DRIVER
PULSE
GENERATOR
LEVEL
SHIFTER
SET
RESET
LATCH
UV
DETECTOR
DRIVER
PULSE
GENERATOR
LEVEL
SHIFTER
SET
RESET
LATCH
UV
DETECTOR
DRIVER
SET
RESET
DRIVER
DRIVER
DRIVER
CLEAR
LOGIC
PULSE
GENERATOR
LEVEL
SHIFTER
INPUT
SIGNAL
GENERATOR
INPUT
SIGNAL
GENERATOR
INPUT
SIGNAL
GENERATOR
UNDER–
VOLTAGE
DETECTOR
FAULT LOGIC
C S
V
S3
V
B3
V
S2
V
S1
V
B1
HO1
H1 L1
H2 L2
H3 L3
– +
CURRENT
AMP
0.5 V
CURRENT
COMPARATOR
V
B2
HO2
HO3
LO1
LO2
LO3
V
SO
HIN1 HIN2
HIN3
LIN1 LIN2 LIN3
FAULT
V
CC
V
SS
ITRIP
CAO
CA–
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to VSS. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air condi­tions.
Rating
Symbol Min Max Unit
High Side Floating Supply Offset Voltage High Side Floating Output Voltage
V
S1,2,3
V
HO1,2,3
V
B1,2,3
–25
V
S1,2,3
–0.3
V
B1,2,3
+0.3
V
B1,2,3
+0.3
Fixed Supply Voltage Low Side Driver Return
V
CC
V
SO
–0.3
VCC–0.3
25
VCC+0.3
Low Side Driver Return Low Side Output Voltage
V
SO
V
LO1,2,3
V
VCC–0.3 VSO–0.3
VCC+0.3 VCC+0.3
Logic Input Voltage (HIN–, LIN–, & ITRIP) Fault Output Voltage
V
IN
FAULT–
–0.3 –0.3
VCC+0.3 VCC+0.3
Amplifier Output Voltage Amplifier Inverting Input Voltage
CAO
CA–
–0.3 –0.3
VCC+0.3 VCC+0.3
Allowable Offset Supply Voltage Transient dVS/dt 50 V/ns *Package Power Dissipation @ TA +25°C P
D
1.5 Watt
Operating and Storage Temperature Tj, T
stg
–55 150 °C
Thermal Resistance, Junction to Ambient R
θJA
83 °C/W
Lead Temperature for Soldering Purposes, 10 seconds T
L
260 °C
High Side Floating Absolute Voltage
V
B1,2,3
–0.3
625
V
DC
Page 3
MPIC2130
3
Motorola Power Products Division Advanced Data
RECOMMENDED OPERATING CONDITIONS
The Input/Output logic timing Diagram is shown in Figure 1. For proper operation the device should be used within the recommended condi­tions. The VS offset rating is tested with all supplies biased at 15 V differential.
High Side Floating Supply Absolute Voltage
V
B1,2,3
V
S1,2,3
+10 V
S1,2,3
+20 V
High Side Floating Supply Offset Voltage V
S1,2,3
Note 1 VSO+600 V
High Side Floating Output Voltage V
HO1,2,3
V
S1,2,3
V
B1,2,3
V
Fixed Supply Voltage V
CC
10 20 V
Low Side Driver Return V
SO
–5 5 V
Low Side Output Voltage V
LO1,2,3
V
SO
V
CC
V
Logic Input Voltage (HIN–, LIN–, & ITRIP) V
IN
V
SS
5 V
Fault Output Voltage FAULT– V
SS
V
CC
V
Amplifier Output Voltage CAO V
SS
5 V
Amplifier Inverting Input Voltage CA– V
SS
5 V
Ambient Temperature T
A
–40 125 °C
Note 1: Logic operational for VS of –5 V to +600 V. Logic state held for VS of VSO–5 V to VSO–VBS.
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise specified)
Characteristic
Symbol Min Typ Max Unit
STATIC ELECTRICAL CHARACTERISTICS
V
BIAS
(VCC, V
BS1,2,3
) = 15 V and VSO = VSS unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are
applicable to all six channels (HS1,2,3 & LS1,2,3). The VO and IO parameters are referenced to V
SO1,2,3
and are applicable to the respec-
tive output leads: HO1,2,3 or LO1,2,3.
Logic “0” Input Voltage (OUT = LO) V
IH
2.2 V
Logic “1” Input Voltage (OUT = HI) V
IL
0.8 V
ITRIP Input Positive Going Threshold V
IT,TH+
400 580 mV
High Level Output Voltage, V
BIAS–VO
@ VIN = 0 V, IO = 0 A V
OH
100 mV
Low Level Output Voltage, VO @ VIN = 5 V, IO = 0 A V
OL
100 mV
Offset Supply Leakage Current @ V
B1,2,3
= V
S1,2,3
= 600 V I
LK
50 µA
Quiescent VBS Supply Current @ VIN = 0 V or 5 V I
QBS
15 30 µA
Quiescent VCC Supply Current @ VIN = 0 V or 5 V I
QCC
3.0 4.0 mA
Logic “1” Input Bias Current (OUT = HI) @ VIN = 0 V I
IN+
400 500 µA
Logic “0” Input Bias Current (OUT = LO) @ VIN = 5 V I
IN–
200 320 µA
“High” ITRIP Bias Current @ ITRIP = 5 V I
TRIP+
75 150 µA
“Low” ITRIP Bias Current @ ITRIP = 0 V I
TRIP–
100 nA
VBS Supply Undervoltage Positive Going Threshold V
BSUV+
8.0 9.2 V
VBS Supply Undervoltage Negative Going Threshold V
BSUV–
7.6 8.8 V
VCC Supply Undervoltage Positive Going Threshold V
CCUV+
8.3 9.7 V
VCC Supply Undervoltage Negative Going Threshold V
CCUV–
8.0 9.4 V
FAULT – Low On Resistance R
on,FLT
55 75
Output High Short Circuit Pulsed Current @ V
out
= 0 V, Vin = 0 V, PW 10 µs I
O+
200 250 mA
Output Low Short Circuit Pulsed Current @ V
out
= 15 V, Vin = 5 V, PW 10 µs I
O–
420 500 mA
Amplifier Input Offset Voltage @ VSO = CA– = 0.2 V
OS
30 mV
CA– Input Bias Current @ CA– = 2.5 V I
CA–
4.0 nA
Amplifier Common Mode Rejection Ratio @ VSO = CA– = 0.1 V & 5 V CMRR 60 80 dB
Page 4
MPIC2130
4
Motorola Power Products Division Advanced Data
ELECTRICAL CHARACTERISTICS
(continued) (TA = 25°C unless otherwise specified)
Characteristic
Symbol Min Typ Max Unit
STATIC ELECTRICAL CHARACTERISTICS
V
BIAS
(VCC, V
BS1,2,3
) = 15 V and VSO = VSS unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are
applicable to all six channels (HS1,2,3 & LS1,2,3). The VO and IO parameters are referenced to V
SO1,2,3
and are applicable to the respec-
tive output leads: HO1,2,3 or LO1,2,3.
Amplifier Power Supply Rejection Ratio
@ VSO = CA–=0.2 V, VCC = 10 & 20 V
PSRR 55 75 dB
Amplifier High Level Output Voltage @ CA– = 0 V, VSO = 1 V V
OH,Amp
5.0 5.4 V
Amplifier Low Level Output Voltage @ CA– = 1 V, VSO = 0 V V
OL,Amp
20 mV
Amplifier Output Source Current @ CA– = 0 V , VSO = 1 V, CAO = 4 V I
SRC,Amp
2.3 4.0 mA
Amplifier Output Sink Current @ CA– = 1 V, VSO = 0 V, CAO = 2 V I
SNK,Amp
1.0 2.1 mA
Amplifier Output High Short Circuit Current
@ CA– = 1 V, VSO = 5 V, CAO = 0 V
I
O+,Amp
4.5 6.5 mA
Amplifier Output Low Short Circuit Current
@ CA– = 5 V, VSO = 0 V, CAO = 5 V
I
O–,Amp
3.2 5.2 mA
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise specified)
Characteristic
Symbol Min Typ Max Unit
DYNAMIC ELECTRICAL CHARACTERISTICS
V
BIAS
(VCC, V
BS1,2,3
) = 15 V, V
SO1,2,3
= VSS and CL = 1000 pF unless otherwise specified. TA = 25°C.
Turn–On Propagation Delay @ VIN = 0 & 5 V, V
S1,2,3
= 0 V to 600 V t
on
500 850 ns
Turn–Off Propagation Delay @ VIN = 0 & 5 V, V
S1,2,3
= 0 V to 600 V t
off
300 550 ns
Turn–On Rise Time @ VIN = 0 & 5 V, V
S1,2,3
= 0 V to 600 V t
r
80 125 ns
Turn–Off Fall Time @ VIN = 0 & 5 V, V
S1,2,3
= 0 V to 600 V t
f
35 55 ns
ITRIP to Output Shutdown Propagation Delay @ VIN, V
ITRIP
= 0 & 5 V t
itrip
400 920 ns
ITRIP Blanking Time @ ITRIP = 1 V t
bl
400 ns
ITRIP to FAULT– Propagation Delay @ VIN, V
ITRIP
= 0 & 5 V t
flt
335 845 ns
Input Filter Time (all six inputs) @ VIN = 0 & 5 V t
flt,in
310 ns
LIN1,2,3 to FAULT Clear Time @ VIN, V
ITRIP
= 0 & 5 V t
fltclr
6.0 12 µs
Deadtime, LS Turn–Off to HS Turn–On & HS Turn–Off to LS Turn–On
@ VIN = 0 & 5 V
DT 1.3 3.7 µs Amplifier Slew Rate (Positive) SR+ 4.4 6.2 V/µs Amplifier Slew Rate (Negative) SR– 2.4 3.2 V/µs
TYPICAL CONNECTION
10 TO 600 V
TO
LOAD
V
CC
ITRIP
V
SO
V
B1,2,3
HIN1,2,3
V
SS
CA–
CAO
LIN1,2,3 FAULT
HO1,2,3
V
S1,2,3
LO1,2,3
V
CC
FAULT
CAO
HIN1,2,3
COM
LIN1,2,3
Page 5
MPIC2130
5
Motorola Power Products Division Advanced Data
LEAD DEFINITIONS
Symbol Lead Description
HIN1,2,3 Logic Inputs for High Side Gate Driver Outputs (HO1,2,3), Out of Phase
LIN1,2,3 Logic Inputs for Low Side Gate Driver Outputs (LO1,2,3), Out of Phase
FAULT– Indicates Over–current, or Undervoltage Lockout (Low Side) has Occurent, Negative Logic
V
CC
Logic and Low Side Fixed Supply
ITRIP Input for Over–current Shut Down
CAO Output of Current Amplifier
CA– Negative Input of Current Amplifier
V
SS
Logic Ground
V
B1,2,3
High Side Floating Supplies
HO1,2,3 High Side Gate Drive Outputs
V
S1,2,3
High Side Floating Supply Returns
LO1,2,3 Low Side Gate Drive Outputs
V
SO
Low Side Return, Positive Input of Current Amplifier
Figure 1. Input / Output Timing Diagram
Figure 2. Switching Time Waveform
Definitions
Figure 3. Deadtime Waveform Definitions
LO
HO
HIN
LIN
50% 50%
50% 50%
DT DT
HIN
LIN
ITRIP
FAULT
HO1–3
LO1–3
HIN LIN
LO
HO
50% 50%
10% 10%
90% 90%
t
on
t
r
t
off
t
f
50%
50%
50%
50%
50%
t
flt
LO2
FAULT
ITRIP
LIN2
t
itrip
t
fltclr
Figure 4. Overcurrent Shutdown Waveform
Definitions
Page 6
MPIC2130
6
Motorola Power Products Division Advanced Data
PACKAGE DIMENSIONS
CASE 710–02
ISSUE B
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D), SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
1
SEATING PLANE
15
14
28
M
A
B
K
C
N
F
G
D
H
J
L
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 36.45 37.21 1.435 1.465 B 13.72 14.22 0.540 0.560 C 3.94 5.08 0.155 0.200 D 0.36 0.56 0.014 0.022 F 1.02 1.52 0.040 0.060 G 2.54 BSC 0.100 BSC H 1.65 2.16 0.065 0.085 J 0.20 0.38 0.008 0.015 K 2.92 3.43 0.115 0.135 L 15.24 BSC 0.600 BSC M 0 15 0 15 N 0.51 1.02 0.020 0.040
_ __ _
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MPIC2130/D
*MPIC2130/D*
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