Datasheet mpf4392_mpf4393 Datasheet

MPF4392, MPF4393

Preferred Devices

JFET Switching Transistors

N−Channel − Depletion

Features

• Pb−Free Packages are Available*

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MAXIMUM RATINGS

Rating Symbol Value Unit

Drain− Source Voltage V Drain− Gate Voltag V Gate−Source Voltage V Forward Gate Current I Total Device Dissipation

@ TA = 25°C Derate above 25°C

Operating and Storage Channel Temperature Range

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

G(f)

P

T

channel

T

DS DG GS

D

,

stg

30 Vdc 30 Vdc 30 Vdc 50 mAdc

350

2.8

− 65 to +150 °C

mW

mW/°C

2 SOURCE

3

GATE

1 DRAIN

TO−92 (TO−226AA)

1

2

3

CASE 29−11

STYLE 5

MARKING DIAGRAM

MPF 439x

AYWW G

G

MPF439x = Device Code

A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package

(Note: Microdot may be in either location)

x = 2 or 3

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

January, 2006 − Rev. 5

1 Publication Order Number:

ORDERING INFORMATION

Device Package Shipping

MPF4392 TO−92 1000 Units / Bulk MPF4392G TO−92

(Pb−Free)

MPF4393 TO−92 1000 Units / Bulk MPF4393G TO−92

(Pb−Free) MPF4393RLRP TO−92 1000 / Ammo Box MPF4393RLRPG TO−92

(Pb−Free)

Preferred devices are recommended choices for future use and best overall value.

1000 Units / Bulk

1000 / Ammo Box

†

MPF4392/D

MPF4392, MPF4393

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

A

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Gate− Source Breakdown Voltage

(IG = 1.0 mAdc, VDS = 0)

Gate Reverse Current

(V

= 15 Vdc, VDS = 0)

GS

= 15 Vdc, VDS = 0, TA = 100°C)

(V

GS

Drain−Cutoff Current

(VDS = 15 Vdc, VGS = 12 Vdc) (VDS = 15 Vdc, VGS = 12 Vdc, TA = 100°C)

Gate Source Voltage

(VDS = 15 Vdc, ID = 10 nAdc) MPF4392

MPF4393

ON CHARACTERISTICS

Zero−Gate−Voltage Drain Current (Note 1)

(VDS = 15 Vdc, VGS = 0) MPF4392

MPF4393

Drain−Source On−Voltage

(ID = 6.0 mAdc, VGS = 0) MPF4392 (ID = 3.0 mAdc, VGS = 0) MPF4393

Static Drain−Source On Resistance

(ID = 1.0 mAdc, VGS = 0) MPF4392

MPF4393

SMALL− SIGNAL CHARACTERISTICS

Forward Transfer Admittance

(VDS = 15 Vdc, ID = 25 mAdc, f = 1.0 kHz) MPF4392 (VDS = 15 Vdc, ID = 5.0 mAdc, f = 1.0 kHz) MPF4393

Drain−Source “ON” Resistance

(VGS = 0, ID = 0, f = 1.0 kHz) MPF4392

MPF4393 Input Capacitance (VGS = 15 Vdc, VDS = 0, f = 1.0 MHz) C Reverse Transfer Capacitance

(VGS = 12 Vdc, VDS = 0, f = 1.0 MHz) (VDS = 15 Vdc, ID = 10 mAdc, f = 1.0 MHz)

SWITCHING CHARACTERISTICS

Rise Time (See Figure 2)

(I

= 6.0 mAdc) MPF4392

D(on)

(I

= 3.0 mAdc) MPF4393

D(on)

Fall Time (See Figure 4)

(V

= 7.0 Vdc) MPF4392

GS(off)

(V

= 5.0 Vdc) MPF4393

GS(off)

Turn−On Time (See Figures 1 and 2)

(I

= 6.0 mAdc) MPF4392

D(on)

(I

= 3.0 mAdc) MPF4393

D(on)

Turn−Off Time (See Figures 3 and 4)

(V

= 7.0 Vdc) MPF4392

GS(off)

(V

= 5.0 Vdc) MPF4393

GS(off)

1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 3.0%.

V

(BR)GSS

I

GSS

I

D(off)

V

I

DSS

V

DS(on)

r

DS(on)

|yfs|

r

ds(on)

C

t

on

off

GS

iss rss

t

r

t

30 − − Vdc

−

1.0

0.2

1.0

0.1

nAdc mAdc

Vdc

−2.0

−0.5

−

−5.0

−

−3.0

mAdc

25

5.0

−

75 30

Vdc

−

0.4

W

−

60

100

mmhos

−

17 12

−

W

−

60

100

− 6.0 10 pF pF

−

2.5

3.2

3.5

−

ns

−

f

−

2.0

2.5

15 29

5.0

5.0 ns

20 35

ns

−

4.0

6.5

15 15

ns

−

20 37

35 55

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2

MPF4392, MPF4393

TYPICAL SWITCHING CHARACTERISTICS

1000

500

200

100

50

20

10

, TURN−ON DELAY TIME (ns)

5.0

d(on)

t

2.0

1.0

0.5 1.0 3.0 7.0

0.7 2.0 10 20

RK = RD′

RK = 0

ID, DRAIN CURRENT (mA)

Figure 1. Turn−On Delay Time Figure 2. Rise Time

1000

500

200

100

50

20

10

, TURN−OFF DELAY TIME (ns)

5.0

d(off)

t

2.0

1.0

0.5 1.0 3.0 7.05.0

0.7 2.0 10 20 30 50

RK = RD′

RK = 0

ID, DRAIN CURRENT (mA)

Figure 3. Turn−Off Delay Time Figure 4. Fall Time

TJ = 25°C

MPF4392 MPF4393

5.0

TJ = 25°C TJ = 25°C

MPF4392 MPF4393

V

GS(off)

V

GS(off)

= 7.0 V

= 5.0 V

30 50

= 7.0 V

= 5.0 V

1000

500

200

100

50

20

, RISE TIME (ns)

r

t

10

5.0

2.0

1.0

0.5 1.0 3.0 7.0

0.7 2.0 10 20 30 50

1000

500

200

100

50

20

, FALL TIME (ns)

f

10

t

5.0

2.0

1.0

0.5 1.0 3.0 7.05.0

0.7 2.0 10 20 30 50

RK = RD′

RK = 0

ID, DRAIN CURRENT (mA)

RK = RD′

RK = 0

ID, DRAIN CURRENT (mA)

5.0

TJ = 25°C

MPF4392 MPF4393

V

GS(off)

V

GS(off)

= 7.0 V

= 5.0 V

= 7.0 V

= 5.0 V

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3

MPF4392, MPF4393

NOTE 1

V

DD

R

D

INPUT

R

GEN

50 W

50

≤ 0.25 ns

t

r

tf ≤ 0.5 ns

W

V

GEN

INPUT PULSE

PULSE WIDTH = 2.0 ms

DUTY CYCLE ≤ 2.0%

SET V

= 10 V

DS(off)

R

K

RGG & R

RD′ = RD(RT + 50)

R

GG

V

GG

K

RD + RT + 50

Figure 5. Switching Time Test Circuit

20

MPF4392

10

7.0

5.0

3.0

, FORWARD TRANSFER ADMITTANCE (mmhos)

fs

y

2.0

MPF4393

T

= 25°C

channel

VDS = 15 V

0.5 1.0 3.0 7.05.0 5030

0.7 2.0 10 20 ID, DRAIN CURRENT (mA)

The switching charact eristics shown above were measured using a test circuit similar to Figure 5. At the beginning of th e switching interval, the gate voltage is at Gate Supply Voltage (−VGG). The Drain−Source Voltage (V Voltage (V Capacitance (C V

R

T

OUTPUT

50

W

+ VDS.

GG

During the turn−on interval, Gate−Source Capacitance (C discharges through the series combination of R must discharge to V parallel combination of effective load impedance (R′

) due to the voltage divider. Thus Reverse Transfer

DD

) or Gate−Drain Capacitance (Cgd) is charged to

rss

Drain−Source Resistance (r

) is slightly lower than Drain Supply

DS

through RG and RK in series with the

DS(on)

). During the turn−off, this charge

ds

Gen

and RK. C

) and

D

)

gs

gd

flow is reversed.

Predicting turn−on time is somewhat difficult as the channel resistance r discharges, VGS approaches zero and rds decreases. Since C

is a function of the gate−source voltage. While C

ds

gs

gd

discharges t hrough rds, turn−on t ime i s n on−linear. During turn−off, the situation is reversed with r

increasing as Cgd charges.

ds

The above switching curves show two impedance conditions:

1) RK is equal to RD′ which simulates the switching behavior of cascaded stages where t he d riving source impedance i s normally t he load impedance of the previous stage, and 2) RK = 0 (low impedance) the driving source impedance is that of the generator.

15

C, CAPACITANCE (pF)

7.0

5.0

3.0

2.0

1.5

1.0

10

T

= 25°C

channel

(Cds IS NEGLIGIBLE)

0.5 1.0 3.0 305.00.30.1 100.050.03

VR, REVERSE VOLTAGE (VOLTS)

C

gs

C

gd

200

160

120

80

RESISTANCE (OHMS)

40

ds(on)

r , DRAIN−SOURCE ON−STATE

0

Figure 6. Typical Forward Transfer Admittance

I

DSS

= 10 mA

50 mA 75 mA 100 mA 125 mA

25 mA

1.0 3.0 5.02.0

VGS, GATE−SOURCE VOLTAGE (VOLTS)

4.00

T

= 25°C

channel

6.0 7.0 8.0

Figure 8. Effect of Gate−Source Voltage

On Drain−Source Resistance

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2.0

1.8

1.6

1.4

1.2

1.0

, DRAIN−SOURCE ON−STATE

0.8

RESISTANCE (NORMALIZED)

ds(on)

r

0.6

0.4

4

Figure 7. Typical Capacitance

ID = 1.0 mA VGS = 0

50 17020−10−40 80 140−70

T

, CHANNEL TEMPERATURE (°C)

channel

110

Figure 9. Effect of Temperature On

Drain−Source On−State Resistance

MPF4392, MPF4393

. f

l t

100

90

80

70

60

50

40

30

, DRAIN−SOURCE ON−STATE

RESISTANCE (OHMS)

20

ds(on)

r

10

0

10

T

= 25°C

channel

r

@ VGS = 0

DS(on)

V

GS(off)

70

30 40 50 60

20

I

, ZERO−GATE VOLTAGE DRAIN CURRENT (mA)

DSS

Figure 10. Effect of I

80 90 100 110 120 130 140 150

On Drain−Source

DSS

Resistance and Gate−Source Voltage

10

9.0

8.0

7.0

6.0

5.0

4.0

3.0

2.0

1.0

0

NOTE 2

The Zero−Gate−Voltage Drain Current (I principle determinant of other J−FET characteristics Figure 10 shows the relationship of Gate−Source Of Voltage (V (r

) to I

ds(on)

of the values shown in Figure 10. This data will be usefu

(VOLTS)

in predicting the characteristic variations for a given par number.

, GATE−SOURCE VOLTAGE

For example:

GS

V

Unknown r

) and Drain−Source On Resistance

GS(off)

. Most of the devices will be within ±10%

DSS

and VGS range for an MPF4392

ds(on)

The electrical characteristics table indicates that an MPF4392 has an I shows r

= 52 W for I

ds(on)

range of 25 to 75 mA. Figure 10

DSS

= 25 mA and 30 W for I

DSS

75 mA. The corresponding VGS values are 2.2 V and

4.8 V.

DSS

), is the

DSS

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5

MPF4392, MPF4393

PACKAGE DIMENSIONS

TO−92 (TO−226)

CASE 29−11

ISSUE AL

SEATING PLANE

A

B

R

P

L

K

XX

V

1

G

H

C

N

D

J

SECTION X−X

N

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED.

4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM.

DIM MIN MAX MIN MAX

A 0.175 0.205 4.45 5.20 B 0.170 0.210 4.32 5.33 C 0.125 0.165 3.18 4.19 D 0.016 0.021 0.407 0.533

G 0.045 0.055 1.15 1.39

H 0.095 0.105 2.42 2.66 J 0.015 0.020 0.39 0.50 K 0.500 −−− 12.70 −−− L 0.250 −−− 6.35 −−− N 0.080 0.105 2.04 2.66 P −−− 0.100 −−− 2.54 R 0.115 −−− 2.93 −−− V 0.135 −−− 3.43 −−−

STYLE 5:

PIN 1. DRAIN

2. SOURCE

3. GATE

MILLIMETERSINCHES

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MPF4392/D

6