Datasheet MPC9120SD Datasheet (Motorola)

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Page 1

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SEMICONDUCTOR TECHNICAL DATA

REV 0.2

 Motorola, Inc. 1997

12/97

 

   

The MPC9120 is a 1:10 LVCMOS fanout buffer targeted to support Intel based Pentium II microprocessor chip sets. The device features 10 low skew outputs optimized to drive the clock inputs of standard unbuffered SO–DIMM SDRAM modules. Standard unbuffered SO–DIMM SDRAM modules require two clocks per module allowing for the device to drive up to four modules. The output buffers have been optimized to drive the load presented by the SDRAM module.

The MPC9120 provides output shut off capabilities via an I2C serial port for applications which plan to use fewer than four modules and desire to minimize the power dissipation of the chip. Every output clock can be individually enabled/disabled through fields in the I2C control registers. After power up the default state is all outputs enabled. In applications where this default state is acceptable the I2C ports need not be exercised.

• Supports Intel Pentium and Pentium II Processor Architectures

• 10 Skew Controlled 3.3V Compatible SDRAM Clocks

• I

C Serial Bus Interface

• Extensive Output Enable Control Capability

• Space Efficient 28–Lead SSOP Package

• Operating Temperature Range of 0°C to 70°C

• 3.3V ± 5% Power Supply

Figure 1. 28–Lead Pinout (Top View)

VDD

SDRAM0

SDRAM9

SDRAM1

SDRAM8

VSSO

VSS

VDD

SDRAM2

SDRAM7

SDRAM3

SDRAM6

VSS

BUF_IN

VDD

SDRAM4

SDRAM5

VSS

VDDIIC

VSSIIC

SDATA

SCLOCK

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.



1:10 LVCMOS

FANOUT BUFFER

SD SUFFIX

28–LEAD PLASTIC SSOP PACKAGE

CASE 940E–02

FUNCTION TABLE

OE V1, V2

0 1

High–Z

1x BUF_IN

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MPC9120

MOTOROLA TIMING SOLUTIONS

BR1333 — REV 5

Figure 2. Block Diagram

SDRAM0 SDRAM1 SDRAM2 SDRAM3

SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9

CONFIG

REGISTERS

I2C

INTERFACE

SDATA

SCLOCK

BUF_IN

SDRAM4

Table 1. Pin Descriptions

Pin Name I/O Function

BUF_IN I 3.3V CMOS clock input SDRAM0:9 O 3.3V CMOS SDRAM clock outputs SDATA I/O Serial data for configuration control SCLK I Serial clock input for configuration control. The state of the SDATA input is clocked into the device on

the rising edge of this clock OE I A Low forces all outputs into High–Z state VDD – 3.3V power supply connection VSS – Ground connection which should be connected directly to the ground plane

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MPC9120

TIMING SOLUTIONS BR1333 — REV 5

3 MOTOROLA

I2C Interface

The device has an I2C serial bus interface consisting of a serial clock input (SCLK) and a data line (SDATA) . The clock driver acts as a slave receiver on the I2C bus with a standard data transfer rate of up to 100 kbit/s. The MPC9120 is a ‘write only’ device which will not respond to general call requests from the bus master. The I2C interface transfers data in byte length packets except for the start, stop and acknowledge bits. The clock driver supports block writes consisting of the following elements.

1) Start Bit

2) Address

3) Acknowledge Bit

4) Command Code

5) Acknowledge Bit

6) Byte Count

7) Acknowledge Bit

8) Data Fields (see Table 2)

9) Acknowledge Bit

10) Stop Bit

After each byte, the clock driver pulls down the data line to acknowledge the transfer. The clock driver holds SDATA low during the high state of SCLK. The 7–bit address of the clock driver is:

A7 A6

A5 A4 A3 A2 A1 R/W

1 1 0 1 0 0 1 0

Note: A7 is the first address bit

The ‘Command Code’ should be set to all ‘0’s and the ‘Byte Count’ can range from 1 to 3. The data fields are transferred sequentially in ascending order starting with Byte 0 – Configuration Function.

The MPC9120 is compliant with the DC/AC characteristics of a “Standard–Mode” I2C bus device. The logic thresholds are dependent on the 3.3V supply. For additional information on the I2C bus, refer to the document, 3114 – “The I2C–bus and how to use it (including specifications)” available from Philips Semiconductors:

http://www.semiconductors.philips.com

Table 2. Serial Data Fields

Byte Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

SDRAM0:3 Not Used Not Used Not Used Not Used SDRAM3 SDRAM2 SDRAM1 SDRAM0

Package Pin N/A N/A N/A N/A 7 6 3 2

SDRAM6:9 SDRAM9 SDRAM8 SDRAM7 SDRAM6 Not Used Not Used Not Used Not Used

Package Pin 27 26 23 22 N/A N/A N/A N/A

SDRAM4:5 SDRAM5 SDRAM4 Not Used Not Used Not Used Not Used Not Used Not Used

Package Pin 18 11 N/A N/A N/A N/A N/A N/A

1. Not Used bits fields are “Don’t Care” conditions.

2. When a bit field is programmed with a “1” (enable), the clock is active. A “0” (disable) means the clock is inactive.

MAXIMUM RATINGS*

Symbol Parameter Min Max Unit

VDD 3.3V Core Supply Voltage –0.5 4.6 V T

stg

Storage Temperature Range –65 150 °C

3.3V Input High Voltage (Note 3.) –0.5 4.6 V

3.3V Input Low Voltage –0.5 V

ESD ESD Input Protection 2000 V

* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the

Recommended Operating Conditions.

3. VIH should not exceed VDD level.

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MPC9120

MOTOROLA TIMING SOLUTIONS

BR1333 — REV 5

DC CHARACTERISTICS (VDD = 3.3V ±5%; GND = 0.0V; TA = 0 to +70°C; Unless Otherwise Specified)

Symbol Characteristic Min Typ Max Unit Condition

Supply Current for VDD No Clock Mode

Active 66MHz

Active 100MHz

3 230 360

mA BUF_IN = VSS or VDD

Input Low Voltage –0.3 0.8 V

Input High Voltage 2.0 VDD+0.3 V

Input Leakage Current –5.0 5 µA 0 < VIN < VCC/VCCI

3.3V Output Low Voltage 0.40 V IOL = 1mA

3.3V Output High Voltage 2.4 V IOH = –1.0mA

Input Capacitance TBD pF Except XTL_In, XTL_Out

Input Inductance TBD nH Except XTL_In, XTL_Out

AC CHARACTERISTICS (VDD = 3.3V ±5%; GND = 0.0V; TA = 0 to +70°C; Unless Otherwise Specified)

Symbol Characteristic Min Typ Max Unit Condition

SDRAM Clock Outputs (SDRAM0:17)

Output Clock Skew 250 ps Note 4.

Output Duty Cycle 45 55 % Note 5.

Clock Period 66MHz

100MHz

15.0

10.0

15.5

10.5

ns Note 4.

VIH

High Time 66MHz

100MHz

5.6

3.3

ns Measured at 2.4V

VIL

Low Time 66MHz

100MHz

5.3

3.1

ns Measured at 0.4V

rise

Rise Time 1.5 4.0 V/ns From 0.4V to 2.4V

fall

Fall Time 1.5 4.0 V/ns From 2.4V to 0.4V

PLH

Low to High Propagation Delay 1.0 5.0 ns

PHL

High to Low Propagation Delay 1.0 5.0 ns

PZL

PZH

Enable Delay 1.0 8.0 ns

PLZ

PHZ

Disable Delay 1.0 8.0 ns

4. Measured on the rising edge of the clock at 1.5V .

5. Input slew rate >1V/ns.

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MPC9120

TIMING SOLUTIONS BR1333 — REV 5

5 MOTOROLA

APPLICATIONS INFORMATION

Output Series Termination

With typical MPC9120 edge rates of 1.5V/ns, a PCB trace becomes a transmission line when it is over 1–inch in length. This transmission line needs some sort of termination scheme to ensure good signal integrity at the load (device receiving clock signal). Most motherboards use the practice of

series termination

. In series termination, a series termination resistor (external resistor) is added in series with the driver device output, as shown in Figure 3, series termination resistor value is chosen so that its value, added to the output impedance of the driver, is equal to the PCB trace impedance, or in other words,

RTH = RS + Z

. The series termination resistor must be located close to the device output.

Typical system PCB trace impedance is 50–70Ω, which is low enough to produce sufficient signal rise and fall time at the load capacitance presented by a standard CMOS input. Figure 4 illustrates proper series termination of the 15Ω MPC9120 output driving a 60Ω transmission line.

Figure 3. Clock Output Series Termination

Output Buffer Model

Series

Termination

Resistor

Transmission Line (PCB Clock Trace)

Figure 4. Clock Output Series Termination

Output Buffer Model

Ω

Series

Termination

Resistor

Ω

Transmission Line (PCB Clock Trace)

Pull–Up

Voltage

(V)

min

(mA)

typ

(mA)

max

(mA)

0 –72 –116 –198

1.000 –72 –116 –198

1.400 –68 –110 –188

1.500 –67 –107 –184

1.650 –64 –103 –177

1.800 –60 –98 –170

2.000 –54 –90 –157

2.400 –39 –69 –126

2.600 –30 –56 –107

3.135 0 –15 –46

3.300 – 0 –23

3.465 – – 0

Pull–Down

Voltage

(V)

min

(mA)

typ

(mA)

max

(mA)

0 0 0 0

0.400 23 34 53

0.650 35 52 83

0.850 43 65 104

1.000 49 74 118

1.400 61 93 152

1.500 64 98 159

1.650 67 103 168

1.800 70 108 177

1.950 72 112 184

3.315 72 112 204

3.600 – 112 204

Figure 5. Typical Output V/I Characteristics for MPC9120

Page 6

MPC9120

MOTOROLA TIMING SOLUTIONS

BR1333 — REV 5

OUTLINE DIMENSIONS

SD SUFFIX

PLASTIC SSOP PACKAGE

CASE 940E–02

ISSUE A

28 15

141

DIMAMIN MAX MIN MAX

INCHES

10.07 10.33 0.396 0.406

MILLIMETERS

B 5.20 5.38 0.205 0.212 C 1.73 1.99 0.068 0.078 D 0.05 0.21 0.002 0.008 F 0.63 0.95 0.024 0.037 G 0.65 BSC 0.026 BSC H 0.47 0.63 0.018 0.024 J 0.09 0.20 0.003 0.008

J1 0.09 0.16 0.003 0.006

K 0.25 0.38 0.010 0.015

K1 0.25 0.33 0.010 0.013

____

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION/INTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF K DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR INTRUSION SHALL NOT REDUCE DIMENSION K BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–.

L 7.65 7.90 0.301 0.311

M 0 8 0 8

DETAIL E

0.25 (0.010)

SECTION N–N

K28X REF

0.12 (0.005) V

L/2

PIN 1 IDENT

0.20 (0.008) T

–V–

–U–

0.076 (0.003)

–T–

SEATING PLANE

DETAIL E

–W–

Pentium and Pentium II are trademarks of Intel Corp.

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

MPC9120/D

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