
MPC2001
1
MOTOROLA FAST SRAM
256KB Asynchronous
Secondary Cache Module for
PowerPC
The MPC2001 is designed to provide asynchronous 256KB L2 cache for the
PowerPC 60x processors. The module is configured as 32K x 64 bits in a 136
pin dual readout single inline memory module (DIMM). The module uses eight
of Motorola’s MCM6206 CMOS RAMs.
Eight write enables are provided for byte write control.
The cache is designed to interface with the PowerPC 60x bus and requires external tag.
PD0 – PD2 are reserved for density and speed identification.
The cache is plug and pin compatible with Motorola’s MPC2002 and MPC2003
BurstRAM synchronous cache modules.
• Dual Readout SIMM (DIMM) for Circuit Density
• Single 5 V ± 5% Power Supply
• All Inputs and Outputs are TTL Compatible
• Three State Outputs
• Byte Write Capability
• Decoupling Capacitors for each Fast Static RAM
• High Quality Multi–Layer FR4 PWB With Separate Power and Ground Planes
• Fast SRAM Access Times 12 ns, 15 ns
• Low Cost Asynchronous Solution for MPC105 PCI Bridge/Memory Controller Chip
BurstRAM is a trademark of Motorola.
PowerPC and PowerPC 601 are trademarks of International Business Machines Corp.
Order this document
by MPC2001/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MPC2001
(Formerly MCM64AC32)
136–LEAD DIMM
CASE 1104–01
TOP VIEW
68
35
34
1
5/95

PIN ASSIGNMENT
136–LEAD DIMM
CASE 1104–01
TOP VIEW
PD0
PD1
DQ0
DQ1
V
CC
DQ4
DQ6
NC
DQ8
DQ10
V
SS
NC
V
SS
DQ14
V
CC
DQ16
DQ17
DQ19
DQ21
V
CC
NC
DQ24
DQ26
DQ28
V
SS
DQ31
NC
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
V
SS
PD2
V
CC
DQ2
DQ3
DQ5
DQ7
V
SS
DQ9
DQ11
DQ12
V
SS
DQ13
DQ15
NC
V
SS
DQ18
DQ20
DQ22
DQ23
V
SS
DQ25
DQ27
DQ29
DQ30
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
W6
DQ32
DQ33
V
SS
DQ36
DQ38
DQ39
DQ40
V
CC
DQ43
DQ45
DQ46
NC
V
SS
NC
V
SS
DQ52
DQ53
DQ55
NC
V
CC
DQ58
DQ60
DQ62
NC
A0
A2
A4
A6
A8
A10
A12
A14
V
SS
W7
E1
DQ34
DQ35
DQ37
V
CC
NC
DQ41
DQ42
DQ44
V
SS
DQ47
DQ48
DQ49
V
SS
DQ50
DQ51
DQ54
DQ56
V
SS
DQ57
DQ59
DQ61
DQ63
V
CC
A1
A3
A5
A7
ALE
A9
A11
A13
NC
W0
W2
NC
NC
E0
W1
W3
G0
NC
W4
G1
W5
V
CC
V
SS
V
SS
V
SS
PIN NAMES
A0 – A14 Address Inputs. . . . . . . . . . . . . . . . . . . . . .
W0
– W7 Byte Write. . . . . . . . . . . . . . . . . . . . . . . . . .
E0
, E1 Module Enable. . . . . . . . . . . . . . . . . . . . . . . .
G0
, G1 Module Output Enable. . . . . . . . . . . . . . . . .
DQ0 – DQ63 Cache Data Input/Output. . . . . . . . . .
PD0 – PD2 Presence Detect. . . . . . . . . . . . . . . . . .
V
CC
+ 5 V Power Supply. . . . . . . . . . . . . . . . . . . . . .
ALE Address Latch Enable. . . . . . . . . . . . . . . . . . . .
V
SS
Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NC No Connection. . . . . . . . . . . . . . . . . . . . . . . . . . .
MPC2001
2
MOTOROLA FAST SRAM
PD2 PD1 PD0
Cache
Size
Module
NC V
SS
NC 256KB MPC2001SG12
NC V
SS
V
SS
256KB MPC2001SG15

MPC2001
3
MOTOROLA FAST SRAM
MPC2001 BLOCK DIAGRAM
Asynchronous 136 Pin DIMM
W
32K x 8
A0 – A1
G
E
DQ0 – DQ7
A0 – A1
E0
2
G0
DQ0 – DQ7
W0
8
A2 – A14
74F373
ALE
A2 – A14
13
W
32K x 8
A0 – A1
G
E
DQ0 – DQ7 DQ8 – DQ15
W1
8
A2 – A14
W
32K x 8
A0 – A1
G
E
DQ0 – DQ7 DQ16 – DQ23
W2
8
A2 – A14
W
32K x 8
A0 – A1
G
E
DQ0 – DQ7 DQ24 – DQ31
W3
8
A2 – A14
W
32K x 8
A0 – A1
G
E
DQ0 – DQ7
E1
G1
DQ32 – DQ39
W4
8
A2 – A14
W
32K x 8
A0 – A1
G
E
DQ0 – DQ7 DQ40 – DQ47
W5
8
A2 – A14
W
32K x 8
A0 – A1
G
E
DQ0 – DQ7 DQ48 – DQ55
W6
8
A2 – A14
W
32K x 8
A0 – A1
G
E
DQ0 – DQ7 DQ56 – DQ63
W7
8
A2 – A14
ORDERING INFORMATION
(Order by Full Part Number)
Motorola Memory Prefix
Part Number Package (SG = Gold Pad SIMM)
Speed (12 = 12 ns, 15 = 15 ns)
MPC 2001 XX XX
Full Part Numbers — MPC2001SG12 MPC2001SG15

MPC2001
4
MOTOROLA FAST SRAM
PACKAGE DIMENSIONS
136–LEAD DIMM
CASE 1104–01
X0.006 (0.15) T Y
L
0.012 (0.30)
M
COMPONENT AREA
VIEW AA
FRONT VIEW
136X K
2X Q
DIMAMIN MAX MIN MAX
MILLIMETERS
4.045 4.055 102.74 103.00
INCHES
B 0.995 1.005 25.27 25.53
C ––– 0.413 ––– 10.50
D 0.040 0.042 1.02 1.07
F 0.125 BSC
0.064
–––
3.18 BSC
G
––– 0.010 0.25H
J 0.046 0.054 1.17 1.37
K 0.100 ––– 2.54 –––
LM1.650 BSC 41.91 BSC
N 0.400 BSC 10.16 BSC
P 0.125 ––– 3.18 –––
Q 0.123 0.127 3.12 3.22
R 0.245 0.255 6.22 6.48
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CARD THICKNESS APPLIES ACROSS TABS AND
INCLUDES PLATING AND/OR METALLIZATION.
4. DIMENSIONS C AND S DEFINE A DOUBLE–SIDED
MODULE.
5. DIMENSION V DEFINES OPTIONAL
SINGLE–SIDED MODULE.
6. STRAIGHTNESS CALLOUT APPLIES TO TAB
AREA ONLY.
T
–––
3.784 BSC
W
0.050 BSC 1.27 BSC
U
V
Y
0.060 0.064 1.52 1.63
0.075 0.085 1.91 2.16
0.060 1.52 1.63
0.157 ––– 4.00 –––
––– 0.236 ––– 6.00
1.57 –––0.062
96.11 BSC
U
F
X0.006 (0.15) T Y
S
A
M
2X
N2X
2X
L
R
Y
B
-Y-
-X-
VIEW AA
1
34
35
68
69
102
103
136
SIDE VIEW
-T-
2X W
2X W
R
M
136X H
136X D
M
X0.004 (0.10) T Y
SL
G132X
C
NOTE 4
S
NOTE 4
V
NOTE 5
P
J
R T
NOTE 6
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters can and do vary in different
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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MPC2001/D
*MPC2001/D*
◊