Datasheet MPC104AU, MPC104AU-2K5, MPC104AP Datasheet (Burr Brown)

Page 1
©
1994 Burr-Brown Corporation PDS-1230C Printed in U.S.A. July, 1994
FEATURES
BANDWIDTH: 210MHz (1.4Vp-p)
LOW INTERCHANNEL CROSSTALK:
–79dB (30MHz, SO); –77dB (30MHz, DIP)
LOW SWITCHING TRANSIENTS:
+13mV/–4mV
ERRORS: 0.03%, 0.01
°
LOW QUIESCENT CURRENT:
One Channel Selected:
±4.6mA
No Channel Selected:
±120µA
APPLICATIONS
VIDEO ROUTING AND MULTIPLEXING
(CROSSPOINTS)
RADAR SYSTEMS
DATA ACQUISITION
INFORMATION TERMINALS
SATELLITE OR RADIO LINK IF ROUTING
The MPC104 consists of two identical monolithic, integrated, open-loop buffer amplifiers, which are connected internally at the output. The bipolar comple­mentary buffers form a unidirectional transmission path and offer extremely high output-to-input isola­tion. The MPC104 multiplexer enables the user to connect one of two input signals to the output. The output of the multiplexer is in a high-impedance state when no channel is selected. When one channel is selected with a digital “1” at the corresponding SEL input, the component acts as a buffer with high input impedance and low output impedance.
The wide bandwidth of over 210MHz at 1.4Vp-p signal level, high linearity and low distortion, and low input voltage noise of 5nV/Hz make this crosspoint switch suitable for RF and video applications. All performance is specified with ±5V supply voltage, which reduces power consumption in comparison with ±15V designs. The multiplexer is available in a space­saving 8-pin SO and DIP packages. Both are designed and specified for operation over the industrial tem­perature range (–40°C to +85°C.)
Wide-Bandwidth
2 x 1 VIDEO MULTIPLEXER
DESCRIPTION
The MPC104 is a wide-bandwidth, 2-to-1 channel video signal multiplexer, which can be used in a wide variety of applications.
It was designed for wide-bandwidth systems, includ­ing high-definition television and broadcast equip­ment. Although it is primarily used to route video signals, the harmonic and dynamic attributes of the MPC104 also make it appropriate for other analog signal routing applications such as radar, communica­tions, computer graphics, and data acquisition sys­tems.
IN
1
+1
V
OUT
SEL
1
IN
2
+1
SEL
2
TRUTH TABLE
SEL
1
SEL
2
V
OUT
0 0 HI-Z 1 0IN
1
0 1IN
2
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MPC104
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Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
MPC104
MPC104
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MPC104
2
SPECIFICATIONS–DC CHARACTERISTICS
At VCC = ±5VDC, RL = 10k, RIN = 100, R
SOURCE
= 50, and TA = +25°C, unless otherwise noted.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
MPC104AP, AU
PARAMETER CONDITIONS MIN TYP MAX UNITS INPUT OFFSET VOLTAGE
Initial 14 ±30 mV vs Temperature 60 µV/°C vs Supply (Tracking) V
CC
= ±4.5V to ±5.5V –40 –80 dB
vs Supply (Non-tracking) V
CC
= +4.5V to +5.5V –50 dB
vs Supply (Non-tracking) V
CC
= –4.5V to –5.5V –50 dB
Initial Matching All Buffers 3 mV
INPUT BIAS CURRENT
Initial 5 ±10 µA vs Temperature 20 nA/°C vs Supply (Tracking) V
CC
= ±4.5V to ±5.5V ±710 nA/V
vs Supply (Non-tracking) V
CC
= +4.5V to +5.5V 0.26 µA/V
vs Supply (Non-tracking) V
CC
= –4.5V to –5.5V 1.7 µA/V
INPUT IMPEDANCE
Resistance Channel On 0.88 M Capacitance Channel On 1.0 pF Capacitance Channel Off 1.0 pF
INPUT NOISE
Voltage Noise Density f
OUT
= 20kHz to 10MHz 5 nV/Hz
Signal-to-Noise Ratio S/N = 0.7/V
N
5MHz 96 dB
INPUT VOLTAGE RANGE Gain Error 10% ±3.6 V TRANSFER CHARACTERISTICS
Voltage Gain R
L
= 1k, VIN = ±2V 0.982 V/V
R
L
= 10k, VIN = ±2.8V 0.98 0.992 V/V
RATED OUTPUT
Voltage V
IN
= ±3V ±2.8 ±2.97 V Resistance One Channel Selected 12.5 Resistance No Channel Selected 900 M Capacitance No Channel Selected 1.2 pF
CHANNEL SELECTION INPUTS
Logic 1 Voltage +2 V
CC
+0.6 V Logic 0 Voltage +0.8 V Logic 1 Current V
SEL
= 5.0V 75 100 125 µA
Logic 0 Current V
SEL
= 0.8V 0.002 5 µA
SWITCHING CHARACTERISTICS V
I
= –0.3V to +0.7V, f = 5MHz
SEL to Channel ON Time 90% Point of V
OUT
= 1Vp-p 0.13 µs
SEL to Channel OFF Time 10% Point of V
OUT
= 1Vp-p 0.17 µs Switching Transient, Positive (Measured While Switching +13 mV Switching Transient, Negative Between Two Grounded Channels) –4 mV
POWER SUPPLY
Rated Voltage ±5V Derated Performance ±4.5 ±5.5 V Quiescent Current One Channel Selected, Over Temperature ±4.6 ±5.3 mA
No Channel Selected, Over Temperature ±120 ±175 µA
Rejection Ratio –80 dB
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MPC104
3
SPECIFICATIONS– AC CHARACTERISTICS
At VCC = ±5VDC, RL = 10k, RIN = 100, R
SOURCE
= 50, and TA = +25°C, unless otherwise noted.
MPC104AP, AU
PARAMETER CONDITIONS MIN TYP MAX UNITS LARGE SIGNAL BANDWIDTH (–3dB) V
OUT
= 5.0Vp-p, C
OUT
= 1pF 55 MHz
V
OUT
= 2.8Vp-p, C
OUT
= 1pF 101 MHz
V
OUT
= 1.4Vp-p, C
OUT
= 1pF 210 MHz
SMALL SIGNAL BANDWIDTH V
OUT
= 0.2Vp-p, C
OUT
= 1pF 590 MHz
GROUP DELAY TIME 550 ps DIFFERENTIAL GAIN f = 4.43MHz, V
IN
= 0.3Vp-p
VDC = 0 to 0.7V 0.03 %
DIFFERENTIAL PHASE f = 4.43MHz, V
IN
= 0.3Vp-p
VDC = 0 to 0.7V 0.01 Degrees
GAIN FLATNESS PEAKING V
OUT
= 0.2Vp-p, DC to 30MHz 0.05 dB
V
OUT
= 0.2Vp-p, DC to 100MHz 0.07 dB
HARMONIC DISTORTION f = 30MHz, V
OUT
= 1.4Vp-p Second Harmonic –63 dBc Third Harmonic –65 dBc
CROSSTALK V
IN
= 1.4Vp-p
MPC104AP Channel-to-Channel f = 5MHz, –90 dB
f = 30MHz, –77 dB
Off Isolation f = 5MHz, –93 dB
f = 30MHz, –81 dB
MPC104AU Channel-to-Channel f = 5MHz, –95 dB
f = 30MHz, –79 dB
Off Isolation f = 5MHz, –93 dB
f = 30MHz –86 dB
RISE/FALL TIME V
OUT
= 1.4Vp-p, Step 10% to 90% C
OUT
= 1pF, R
OUT
= 22 2.3 ns
SLEW RATE V
OUT
= 1.4Vp-p
C
OUT
= 1pF 500 V/µs
C
OUT
= 22pF 360 V/µs
C
OUT
= 47pF 260 V/µs
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MPC104
4
PIN DESCRIPTION
IN
1
, IN
2
Analog Input Channels
GND Analog Input Shielding Grounds,
Connect to System Ground
SEL
1
, SEL
2
Channel Selection Inputs
V
OUT
Analog Output; tracks selected channel
–V
CC
Negative Supply Voltage; typical –5VDC
+V
CC
Positive Supply Voltage; typical +5VDC
CONNECTION DIAGRAM
PIN DESCRIPTION
Top View DIP/SO-8
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage (±VCC) .........................................................±6VDC
Analog Input Voltage (IN
1
through IN2) ...................................±VCC, ±0.7V
Operating Temperature..................................................... –40°C to +85°C
Storage Temperature...................................................... –40°C to +125°C
Output Current .................................................................................. ±6mA
Junction Temperature .................................................................... +175°C
Lead Temperature (soldering, 10s)................................................ +300°C
Digital Input Voltages (SEL
1
through SEL2) .............. –0.5V to +VCC +0.7V
PACKAGE DRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER
(1)
RANGE
MPC104AP 8-Pin Plastic DIP 006 –40°C to +85°C MPC104AU SO-8 Surface Mount 182 –40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
IN
1
GND +V
CC
IN
2
SEL
1
–V
CC
V
OUT
SEL
2
1 2 3 4
8 7 6 5
+1
+1
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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MPC104
5
TYPICAL PERFORMANCE CURVES
At VCC = ±5VDC, RL = 10k, RIN = 100, R
SOURCE
= 50, and TA = +25°C, unless otherwise noted.
–40 –20 0 20 60 80 100
Temperature (°C)
18 16 14 12 10
8 6 4 2 0
Input Offset Voltage (mV)
INPUT OFFSET VOLTAGE vs TEMPERATURE
40
–40 –20 0 20 60 80 100
Temperature (°C)
Input Bias Current (µA)
INPUT BIAS CURRENT vs TEMPERATURE
40
7
6
5
4
3
2
1
0
10k 100k 1M 10M 100M 1G
Frequency (Hz)
100
1.0M
100k
10k
1k
Input Impedance ()
INPUT IMPEDANCE vs FREQUENCY
10k 100k 1M 10M 100M 1G
Frequency (Hz)
90 80 70
60 50 40
30
20
10
100
Output Impedance ()
OUTPUT IMPEDANCE vs FREQUENCY
–40 –20 0 20 60 80 100
Temperature (°C)
0
9 8 7 6 5 4 3 2 1
Supply Current (mA)
TOTAL POSITIVE QUIESCENT CURRENT
vs TEMPERATURE
40
One Channel Selected
–40 –20 0 20 60 80 100
Temperature (°C)
0
140
120
100
80
60
40
20
Supply Current (µA)
TOTAL POSITIVE QUIESCENT CURRENT
vs TEMPERATURE
40
No Channel Selected
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MPC104
6
SWITCHING TRANSIENTS
Time (µs)
SWITCHING TRANSIENTS
Time (µs)
SWITCHING ENVELOPE
(Channel-to-Channel Switching)
Time (µs)
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5VDC, RL = 10k, RIN = 100, R
SOURCE
= 50, and TA = +25°C, unless otherwise noted.
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
+5V
0V
+20mV
0V
–5mV
0 0.1 0.2 0.3
0.4 0.5 0.6
0.7 0.8 0.9 1.0
SEL
36MHz Low-Pass Filter
Acc. Eureka Rec. EU95-PG03 in
Signal Path
+5V
0V
+5mV
0V
–5mV
0 0.1 0.2 0.3
0.4 0.5 0.6
0.7 0.8 0.9 1.0
DB1
V
IN
SEL
1
DB2
SEL
2
V
OUT1
100
100
8
6
5
4
1
V
OUT
V
OUT
+0.7V
0V –0.3V
SEL
SEL
V
OUT
36MHz Low Pass Filter
Acc. Eureka Rec. EU95-PG03
Wideband
Measurement
Input Voltage (V)
–5
5 4 3 2 1
0 –1 –2 –3 –4
Output Voltage (V)
TRANSFER FUNCTION
5–4–3–2–1012345
5–4–3–2–1012345
Input Voltage (V)
50
40
30
20
10
0
Gain Error (%)
GAIN ERROR vs INPUT VOLTAGE
+25°C
–40°C
+85°C
10 100 10k 100k 1M 10M
Frequency (Hz)
100
10
1
Voltage Noise (nV/ Hz)
INPUT VOLTAGE NOISE SPECTRAL DENSITY
1k
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MPC104
7
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5VDC, RL = 10k, RIN = 100, R
SOURCE
= 50, and TA = +25°C, unless otherwise noted.
0 20406080100
Time (ns)
V
IN
= 0.2Vp-p, C
OUT
= 1pF
t
RISE
= t
FALL
= 2ns (Generator)
150
100
50
0
–50
–100
–150
Output Voltage (mV)
SMALL SIGNAL PULSE RESPONSE
0 20406080100
Time (ns)
V
IN
= 0.2Vp-p, C
OUT
= 47pF
t
RISE
= t
FALL
= 2ns (Generator)
150
100
50
0
–50
–100
–150
Output Voltage (mV)
SMALL SIGNAL PULSE RESPONSE
0 20406080100
Time (ns)
V
IN
= 4Vp-p, C
OUT
= 1pF
t
RISE
= t
FALL
= 2ns (Generator)
3
2
1
0
–1
–2
–3
Output Voltage (V)
LARGE SIGNAL PULSE RESPONSE
0 20406080100
Time (ns)
V
IN
= 4Vp-p, C
OUT
= 47pF
t
RISE
= t
FALL
= 2ns (Generator)
3
2
1
0
–1
–2
–3
Output Voltage (V)
LARGE SIGNAL PULSE RESPONSE
GROUP DELAY TIME vs FREQUENCY
Frequency (Hz)
1M 10M 100M 1G
Delay Time (ns)
3
2
1
0
–1
DUT
100
22
180
V
OUT
V
IN
50 1pF
BUF601
V
IN
= 1.4Vp-p
5
0
–5
–10
–15
–20
–25
Frequency (Hz)
Output (dB)
1M 10M 100M 1G
BANDWIDTH vs C
OUT
WITH RECOMMENDED R
OUT
1pF 10pF 22pF
33pF 47pF
R
OUT
1pF 0571MHz
f
–3dB
C
OUT
10pF 27364MHz 22pF 33pF 47pF
16 12
8
279MHz
231MHz 188MHz
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MPC104
8
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5VDC, RL = 10k, RIN = 100, R
SOURCE
= 50, and TA = +25°C, unless otherwise noted.
0.8 0.9 1.00 0.1 0.2
0V
–0.7V
+0.7V
0
0.70.3 0.4 0.5 0.6
ON/OFF CHARACTERISTIC
Time (µs)
SEL
V
OUT
+5V
GAIN FLATNESS
2
1
0
–1
–2
Frequency (Hz)
Output (dB)
1M 10M 100M 1G
V
OUT
= 1.4Vp-p
V
OUT
= 0.2Vp-p
20
10
0
–10
–20
–30
–40
Output (dBm)
BANDWIDTH vs OUTPUT VOLTAGE
Frequency (Hz)
1M 10M 100M 1G
5Vp-p
1.4Vp-p
0.2Vp-p
2.8Vp-p
Output (dB)
BANDWIDTH vs R
LOAD
Frequency (Hz)
10M 100M 1G1M
20
0
–10
–20
–30
–40
V
OUT
= 1.4Vp-p, C
OUT
= 22pF
RL = 10k
RL = 500
10
0
–10
–20
–30
Output (dB)
BANDWIDTH MATCHING
C
OUT
= 22pF, V
OUT
= 2.8Vp-p
Frequency (Hz)
1M 10M 100M 1G
Ch1, Ch2
30M 60M 90M
30MHz HARMONIC DISTORITION
Frequency (Hz)
V
OUT
= 1.4Vp-p, RL = 10k, C
OUT
= 1pF
0
–20
–40
–60
–80
Harmonic Distortion (dBc)
DUT
100
180
47
Advantest
R3361A
50
BUF601AU
HP8116A
V
IN
= 1.4Vp-p
G
10k
DB1
V
IN
SEL
1
SEL
2
DB2
V
OUT
100
100
8
6
4
5
1
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MPC104
9
APPLICATIONS INFORMATION
The MPC104 operates from ±5V power supplies (±6V maximum). Do not attempt to operate with larger power supply voltages or permanent damage may occur. The buffer outputs are not current-limited or protected. If the output is shorted to ground, currents up to 18mA could flow. Momen­tary shorts to ground (a few seconds) should be avoided, but are unlikely to cause permanent damage.
INPUT PROTECTION
As shown below, all pins on the MPC104 are internally protected from ESD by a pair of back-to-back reverse-biased diodes to either power supply. These diodes will begin to conduct when the input voltage exceeds either power supply by about 0.7V. This situation can occur with loss of the amplifier’s power supplies while a signal source is still present. The diodes can typically withstand a continuous current of 30mA without destruction. To insure long term reliability, however, diode current should be externally lim­ited to 10mA whenever possible.
The internal protection diodes are designed to withstand
2.5kV (using Human Body Model) and will provide ad­equate ESD protection for most normal handling proce­dures. However, static damage can cause subtle changes in the characteristics of the buffer amplifier input without necessarily destroying the device. In precision buffer ampli­fiers, such damage may cause a noticeable degradation of offset voltage and drift. Therefore, static protection is strongly recommended when handling the MPC104.
Static damage has been well-recognized as a problem for MOSFET devices, but any semiconductor device deserves protection from this potentially damaging source. The MPC104 incorporates on-chip ESD protection diodes as shown in Figure 1. Thus the user does not need to add external protection diodes, which can add capacitance and degrade AC performance.
DISCUSSION OF PERFORMANCE
The MPC104 is a 2 x 1, wide-band analog signal multi­plexer. It allows the user to connect one of the two inputs (IN1/IN2 ) to the output. The switching speed between two input channels is typically less than 300ns.
However, in contrast to signal switches using CMOS or DMOS transistors, the switching transients were kept very
FIGURE 1. Internal ESD Protection.
–V
CC
+V
CC
ESD Protection diodes internally connected to all pins.
Internal CircuitryExternal Pin
low at +13mV and –4mV. The MPC104 consists of two identical unity-gain buffer amplifiers, respectively connected together internally at the output. The open-loop buffer amps, which consist of complementary emitter followers, apply no feedback so their low-frequency gain is slightly less than unity and somewhat dependent on loading. Unlike devices using MOS bilateral switching elements, the bipolar comple­mentary buffers form a unidirectional transmission path, thus providing high output-to-input isolation. Switching stages compatible to TTL-level digital signals are provided for each buffer to select the input channel. When no channel is selected, the outputs of the device are high-impedance and allow the user to wire several MPC104s together to create multichannel switch matrices.
Chip select logic is not integrated. The selected design increases the flexibility of address decoding in complex distribution fields, eases BUS-controlled channel selection, simplifies channel selection monitoring for the user, and lowers transient peaks. All of these characteristics make the multiplexer, in effect, a quad switchable high-speed buffer. The buffers require DC coupling and termination resistors when driven directly from a low-impedance cable. High­current output amplifiers are recommended when driving low-impedance transmission lines or inputs.
An advanced complementary bipolar process, consisting of pn-junction isolated, high-frequency NPN and PNP transis­tors, provides wide bandwidth while maintaining low crosstalk and harmonic distortion. The single chip band­width of over 210MHz at an output voltage of 1.4Vp-p allows the design of multi-channel crosspoint or distribution fields in HDTV-quality with an overall system bandwidth of 36MHz, or in quality for high resolution graphic and imag­ing systems with 200MHz system bandwidth. The buffer amplifiers also offer low differential gain (0.03%) and phase (0.01°) errors. These parameters are essential for video applications and demonstrate how well the signal path main­tains a constant small-signal gain and phase for the low-level color subcarrier at 4.43MHz (PAL) or 3.58MHz (NSTC) as the luminance signal is ramped through its specified range. The bipolar construction also ensures that the input imped­ance remains high and constant between ON and OFF states. The ON/OFF input capacitance ratio is near unity, and does not vary with power supply voltage variations. The low output capacitance of 1.2pF when no channel is selected is a very important parameter for large distribution fields. Each parallel output capacitance is an additional load and reduces the overall system bandwidth.
Bipolar video crosspoint switches are virtually glitch-free when compared to signal switches using CMOS or DMOS devices. The MPC104 operates with a fast make-before­break switching action to keep the output switching tran­sients small and short. Switching from one channel to another causes the signal to mix at the output for a short time, but it hardly interferes with the input signals. The transient peaks remain less than +13mV and –4mV. The generated output transients are extremely small, so DC clamping during switching between channels is unneces­sary. DC clamping during the switching dead time is re-
Page 10
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MPC104
10
quired to avoid synchronization by large negative output glitches in subsequent equipment.
The SEL-to-channel-ON time is typically 25ns and always shorter than the typical SEL-to-channel-OFF time of 250ns. In the worst case, an ON/OFF margin of 150ns ensures safe switching even for timing spreads in the digital control latches. The short interchannel switching time of 300ns allows channel change during the vertical blanking time, even in high-resolution graphic or broadcast systems. As shown in the typical performance curves, the signal enve­lope during transition from one channel to another rises and falls symmetrically and shows less overshooting and DC settling effects.
Power consumption is a serious problem when designing large crosspoint fields with high component density. Most of the buffer amplifiers are in the off-state. One important design goal was to attain low off-state quiescent current when no channel is selected. The low supply current of ±120µA when no channel is selected and ±4.6mA when one channel is selected, as well as the reduced ±5V supply voltage, conserves power, simplifies the power supply de­sign, and results in cooler, more reliable operation.
CIRCUIT LAYOUT
The high-frequency performance of the MPC104 can be greatly affected by the physical layout of the circuit. The following tips are offered as suggestions, not as absolutes. Oscillations, ringing, poor bandwidth and settling, higher crosstalk, and peaking are all typical problems which plague high-speed components when they are used incorrectly.
• Bypass power supplies very close to the device pins. Use
tantalum chip capacitors (approximately 2.2µF), a parallel
470pF ceramic chip capacitor may be added if desired. Surface-mount types are recommended due to their low lead inductance.
• PC board traces for signal and power lines should be wide to reduce impedance or inductance.
• Make short and low inductance traces. The entire physical circuit should be as small as possible.
• Use a low-impedance ground plane on the component side to ensure that low-impedance ground is available through­out the layout. Grounded traces between the input traces are essential to achieve high interchannel crosstalk rejec­tion.
• Do not extend the ground plane under high-impedance nodes sensitive to stray capacitances, such as the buffer’s input terminals.
• Sockets are not recommended, because they add signifi­cant inductance and parasitic capacitance. If sockets must be used, consider using zero-profile solderless sockets.
• Use low-inductance and surface-mounted components. Circuits using all surface mount components with the MPC104 will offer the best AC-performance.
• A resistor (100 to 150) in series with the input of the buffers may help to reduce peaking. Place the resistor as close as possible to the pin.
• Plug-in prototype boards and wire-wrap boards will not function well. A clean layout using RF techniques is essential—there are no shortcuts.
FIGURE 2. Simplified Circuit Diagram.
IN
2
+V
CC
= +5V
V
OUT
(4)
DB2
(6)
–V
CC
= –5V
(3)
(7)
(5)
SEL
2
DB1
(8)
(1)
(2)
IN
1
GND
SEL
1
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MPC104
11
FIGURE 4. Off Isolation Test Circuit 2.
FIGURE 5. Interchannel Crosstalk. FIGURE 6. Off Isolation.
FIGURE 3. Crosstalk Test Circuit 1.
CHANNEL SEL1SEL2IN
1
IN
2
R
IN1
R
IN2
DB1 1 0 GND VIN200 100 DB2 0 1 V
IN
GND 100 200
SEL
1
0
SEL
2
0
DB1
50
50
DB2
MPC104
SEL
1
SEL
2
R
IN1
IN
1
R
IN2
IN
2
V
OUT
50
50
V
IN1
DB1
50
50
DB2
MPC104
100
IN
1
100
IN
2
SEL
1
SEL
2
Frequency (Hz)
Interchannel Crosstalk (dB)
10M 100M 1G1M400k
–20
–40
–60
–80
–100
–120
–140
MPC104AP
MPC104AU
Off Isolation Crosstalk (dB)
Frequency (Hz)
10M 100M 1G1M400k
–20
–40
–60
–80
–100
–120
–140
MPC104AP
MPC104AU
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MPC104
12
FIGURE 7. Test Circuit Pulse Response.
RS =
50
Pulse Generator
RIN =
50
DSO
12.5GHz
50
180
R
IN
100
50
DUT
CH1 or CH2
MPC104
R
OUT
C
OUT
50
R
B
47
BUF601
STR
845586578145138125
11
HC4094
2
31 15
OE
SER
Out
845586578145138125
11
2
31 15
SER
Out
845586578145138125
11
2
31 15
SER
Out
Clock
SER In
33
• • •
3
Parallel Out
HC4094
Parallel Out
HC4094
Parallel Out
D
MPC
104
MPC
104
MPC
104
MPC
104
MPC
104
MPC
104
MPC
104
MPC
104
MPC
104
MPC
104
MPC
104
MPC
104
• • •
• • •
• • •
FIGURE 10. Serial Bus-Controlled Distribution Field.
FIGURE 8. Test Circuit Differential Gain and Phase.
FIGURE 9. Test Circuit Frequency Response.
50
180
R
IN
100
50
DUT
CH1
or CH2
MPC104
R
OUT
C
OUT
50
R
B
47
RIN =
50
Spectrum
Analyzer
BUF601
RS =
50
Generator
MPC104
RS = 75
4.43MHz
VDC
Generator
OPA623
RIN = 75
Video Analyzer
75
R
OUT
10k
150
R
IN
100
75
DUT
CH1 or CH2
75
75
+
290
290
Page 13
®
MPC104
13
FIGURE 12. Single Supply Operation.
NOTE: (1) +VS should be within +5V to +10V.
In
1
In
2
2.2µF
100
1
4
3
CH1
Out
MPC104
+V
S
+V
S
CH2
+V
S
2
+V
S
2
5
7
SEL
2
SEL
1
R
OUT
R
T
6
8
+
+V
S
(1)
100
C
1
C
2
C
3
FIGURE 11. High-Speed Data Acquisition System.
In
1
In
2
50
50
100
100
1
4
85
CH1
CH2
SEL
1
SEL
2
+
2.2µF 2.2µF +
+5V –5V
MPC104
OPA642
6
100
3
2
402
499
8
–5V+5V
2.2µF 2.2µF
10nF 10nF
7
5
4
++
12-Bit
10MHz
A/D Converter
ADS804
37
402
R
S
Gain = 2V/V
Page 14
®
MPC104
14
FIGURE 13. Input Multiplexer for a CRT Output Stage.
In
1
In
2
75
75
100
100
1
4
CH1
CH2
SEL
1
SEL
2
+
2.2µF 2.2µF +
+5V –5V
MPC104
6
150
1k
10nF
10
220
NOTE: (1) Philips Semiconductors.
220
20pF 100pF
7
10
2
15
B
E
B
E
to
CRT
11
C14
OPA2662
CR3425
(1)
+
+
2.2µF
2.2µF
+5V –5V
16 1 8 9
150
+80V, 60mA
Contrast
C
Page 15
®
MPC104
15
FIGURE 14. Input Multiplexer for RGB Video Signals.
Red
1
Red
2
75
75
100
100
1
4
CH1
CH2
+
2.2µF 2.2µF +
–5V +5V
MPC104
6
3
2
6
+
+
2.2µF
2.2µF
+5V –5V
7
4
150
10nF 10nF
75
390
Red Out
390
OPA623
Green
1
Green
2
75
75
100
100
1
4
CH3
CH4
+
2.2µF 2.2µF +
–5V +5V
MPC104
6
3
2
6
+
+
2.2µF
2.2µF
+5V –5V
7
4
150
10nF 10nF
75
390
Green Out
390
OPA623
Blue
1
Blue
2
75
75
100
100
1
4
CH5
CH6
+
2.2µF 2.2µF
+
–5V +5V
MPC104
6
3
2
6
+
+
2.2µF
2.2µF
+5V –5V
7
4
150
10nF 10nF
75
390
Blue Out
390
OPA623
85
73
85
73
73
Channel CH
1
- CH
6
TTL-Select Lines
85
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