Datasheet MPC100AU-2K5, MPC100AP, MPC100AU Datasheet (Burr Brown)

©

1991 Burr-Brown Corporation PDS-1133F Printed in U.S.A. March, 1995

MPC100

Wide Bandwidth

4 x 1 VIDEO MULTIPLEXER

The MPC100 consists of four identical monolithic inte­grated open-loop buffer amplifiers, which are con­nected internally at the output. The unidirectional trans­mission path consists of bipolar complementary buffers,
which offer extremely high output-to-input isolation.
The MPC100 multiplexer enables one of the four input
channels to connect to the output. The output of the
multiplexer is in a high-impedance state when no chan­nel is selected. When one channel is selected with a
digital “1” at the corresponding SEL-input, the compo­nent acts as a buffer with high input impedance and low
output impedance.

The wide bandwidth of over 250MHz at 1.4Vp-p
signal level, high linearity and low distortion, and low
input voltage noise of 4nV/√Hz make this crosspoint
switch suitable for RF and video applications. All
performance is specified with ±5V supply voltage,
which reduces power consumption in comparison with
±15V designs. The multiplexer is available in space­saving SO-14 and DIP packages. Both are designed
and specified for operation over the industrial tem­perature range (–40°C to +85°C.)

®

FEATURES

● BANDWIDTH: 250MHz (1.4Vp-p)

● LOW INTERCHANNEL CROSSTALK:

≤60dB (30MHz, DIP); ≤70dB (30MHz, SO)

● LOW SWITCHING TRANSIENTS:

+2.5/–1.2mV

● LOW DIFFERENTIAL GAIN/PHASE

ERRORS: 0.05%, 0.01

°

● LOW QUIESCENT CURRENT:

One Channel Selected:

±4.6mA

No Channel Selected:

±230µA

APPLICATIONS

● VIDEO ROUTING AND MULTIPLEXING

(CROSSPOINTS)

● RADAR SYSTEMS

● DATA ACQUISITION

● INFORMATION TERMINALS

● SATELLITE OR RADIO LINK IF ROUTING

DESCRIPTION

The MPC100 is a very wide bandwidth 4-to-1 channel
video signal multiplexer which can be used in a wide
variety of applications.

MPC100 is designed for wide-bandwidth systems,
including high-definition television and broadcast
equipment. Although it is primarily used to route
video signals, the harmonic and dynamic attributes of
the MPC100 make it appropriate for other analog
signal routing applications such as radar, communica­tions, computer graphics, and data acquisition sys­tems.

MPC100

MPC100

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone] • Twx: 910-952-1111

Internet: http://www.burr-brown.com/ • FAXLine: [phone] (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

SEL

1

SEL

2

SEL

3

SEL

4

V

OUT

0 0 0 0 HI-Z
1000IN

1

0100IN

2

0010IN

3

0001IN

4

TRUTH TABLE

DB2

DB1

DB4

DB3

V

OUT

SEL

4

SEL

3

SEL

2

SEL

1

IN

4

IN

3

IN

2

IN

1

2

®

MPC100

SPECIFICATIONS

At VCC = ±5V, RL = 10kΩ, R

SOURCE

= 50Ω, and TA = +25°C, unless otherwise noted.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

MPC100AP, AU
PARAMETER CONDITIONS MIN TYP MAX UNITS
DC CHARACTERISTICS

INPUT OFFSET VOLTAGE R

IN

= 0, R

SOURCE

= 0
Initial +10 ±30 mV
vs Temperature ±30 µV/°C
vs Supply (Tracking) V

CC

= ±4.5V to ±5.5V –40 –80 dB

vs Supply (Non-tracking) V

CC

= +4.5V to +5.5V –50 dB

vs Supply (Non-tracking) V

CC

= –4.5V to –5.5V –50 dB

Initial Matching Between the Four Channels ±3mV

INPUT BIAS CURRENT

Initial +4 ±10 µA
vs Temperature 20 nA/°C
vs Supply (Tracking) V

CC

= ±4.5V to ±5.5V ±380 nA/V

vs Supply (Non-tracking) V

CC

= +4.5V to +5.5V +1.0 µA/V

vs Supply (Non-tracking) V

CC

= –4.5V to –5.5V –11.0 µA/V

INPUT IMPEDANCE

Resistance Channel On 0.88 MΩ
Capacitance Channel On 1.0 pF
Capacitance Channel Off 1.0 pF

INPUT NOISE

Voltage Noise Density f

B

= 20kHz to 10MHz 4.0 nV/√Hz

Signal-to-Noise Ratio S/N = 0.7/V

N

• √5MHz 98 dB

INPUT VOLTAGE RANGE Gain Error ≤ 10% ±4.2 V
TRANSFER CHARACTERISTICS Voltage Gain

R

L

= 1kΩ, VIN = ±2V 0.982 V/V

R

L

= 10kΩ, VIN = ±2.8V 0.98 0.992 V/V

CHANNEL SELECTION INPUTS

Logic 1 Voltage +2.0 V

CC

V
Logic 0 Voltage 0 +0.8 V
Logic 1 Current V

SEL

= 5.0V 100 150 µA

Logic 0 Current V

SEL

= 0.8V 0.002 5 µA

SWITCHING CHARACTERISTICS V

I

= –0.3V to +0.7V, f = 5MHz

SEL to Channel ON Time 90% Point of V

O

= 1Vp-p 0.25 µs

SEL to Channel OFF Time 10% Point of V

O

= 1Vp-p 0.25 µs
Switching Transient, Positive Measured While Switching +2.5 mV
Switching Transient, Negative Between Two Grounded Channels –1.2 mV

OUTPUT

Voltage V

IN

= ±3V, RL = 5kΩ±2.8 ±2.98 V
Resistance One Channel Selected 11 Ω
Resistance No Channel Selected 900 MΩ
Capacitance No Channel Selected 1.5 pF

POWER SUPPLY

Rated Voltage ±5V
Derated Performance ±4.5 ±5.5 V
Quiescent Current One Channel Selected ±4.6 ±5mA

No Channel Selected ±230 ±350 µA

TEMPERATURE RANGE

Operating, AP, AU –40 +85 °C
Storage, AP, AU –40 +125 °C
Thermal Resistance,

θ

JA

AP, AU 90 °C/W

3

®

MPC100

SPECIFICATIONS

At VCC = ±5V, RL = 10kΩ, R

SOURCE

= 50Ω, and TA = +25°C, unless otherwise noted.

MPC100AP, AU
PARAMETER CONDITIONS MIN TYP MAX UNITS
AC CHARACTERISTICS
FREQUENCY DOMAIN
LARGE SIGNAL BANDWIDTH (–3dB) V

O

= 5.0Vp-p, C

OUT

= 1pF 70 MHz

V

O

= 2.8Vp-p, C

OUT

= 1pF 140 MHz

V

O

= 1.4Vp-p, C

OUT

= 1pF 250 MHz

SMALL SIGNAL BANDWIDTH V

O

= 0.2Vp-p, C

OUT

= 1pF 450 MHz

GROUP DELAY TIME 450 ps
DIFFERENTIAL GAIN f = 4.43MHz, V

IN

= 0.3Vp-p
VDC = 0 to 0.7V 0.05 %
VDC = 0 to 1.4V 0.06 %

DIFFERENTIAL PHASE f = 4.43MHz, V

IN

= 0.3Vp-p
VDC = 0 to 0.7V 0.01 Degrees
VDC = 0 to 1.4V 0.02 Degrees

GAIN FLATNESS PEAKING V

O

= 0.2Vp-p, DC to 30MHz 0.04 dB

V

O

= 0.2Vp-p, DC to 100MHz 0.05 dB

HARMONIC DISTORTION f = 30MHz, V

O

= 1.4Vp-p, RL = 1kΩ
Second Harmonic –53 dBc
Third Harmonic –67 dBc

CROSSTALK V

I

= 1.4Vp-p, Figures 4 and 8

MPC100AP All Hostile f = 5MHz, –82 dB

f = 30MHz, –60 dB

Off Isolation f = 5MHz, –70 dB

f = 30MHz, –71 dB

MPC100AU All Hostile f = 5MHz, –78 dB

f = 30MHz, –70 dB

Off Isolation f = 5MHz, –75 dB

f = 30MHz –76 dB

TIME DOMAIN
RISE TIME V

O

= 1.4Vp-p, Step 10% to 90%

C

OUT

= 1pF, R

OUT

= 22Ω 3.3 ns

SLEW RATE V

O

= 2Vp-p

C

OUT

= 1pF 650 V/µs

C

OUT

= 22pF 460 V/µs

C

OUT

= 47pF 320 V/µs

4

®

MPC100

CONNECTION DIAGRAM

IN1-IN

4

Four analog input channels
GND Analog input shielding grounds, connect to system ground
SEL

1

- SEL4Channel selection inputs

V

OUT

Analog output; tracks selected channel
–V

CC

Negative supply voltage; typical –5VDC
+V

CC

Positive supply voltage; typical +5VDC

FUNCTIONAL DESCRIPTION

Top View DIP/SO-14

1
2
3
4
5
6
7

14
13
12
11
10

9
8

DB1

DB2

DB3

DB4

IN

1

GND

IN

2

GND

IN

3

GND

IN

4

SEL

1

SEL

2

–V

CC

V

OUT

+V

CC

SEL

3

SEL

4

MPC100

ABSOLUTE MAXIMUM RATINGS

Power Supply Voltage (±VCC) ..............................................................±6V

Analog Input Voltage (IN

1

through IN4)

(1)

................................±VCC, ±0.7V

Logic Input Voltage ................................................... –0.6V to +V

CC

+0.6V

Operating Temperature..................................................... –40°C to +85°C

Storage Temperature...................................................... –40°C to +125°C

Output Current .................................................................................. ±6mA

Junction Temperature .................................................................... +175°C

Lead Temperature (soldering, 10s)................................................ +300°C

Digital Input Voltages (SEL

1

through SEL4)

(1)

........... –0.5V to +VCC +0.7V

NOTE: (1) Inputs are internally diode-clamped to ±V

CC

.

ELECTROSTATIC
DISCHARGE SENSITIVITY

Electrostatic discharge can cause damage ranging from per­formance degradation to complete device failure. Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods.

ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published speci­fications.

PACKAGE/ORDERING INFORMATION

PACKAGE

TEMPERATURE DRAWING

PRODUCT RANGE PACKAGE NUMBER

(1)

MPC100AP –40°C to +85°C 14-Pin Plastic DIP 010
MPC100AU –40°C to +85°C SO-14 Surface Mount 235

NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.

5

®

MPC100

TYPICAL PERFORMANCE CURVES

At V

CC

= ±5V, R

LOAD

= 10kΩ, R

SOURCE

= 50Ω, and TA = +25°C, unless otherwise noted.

–40 –20 0 20 60 80 100

Temperature (°C)

–5

5
4
3
2
1

0
–1
–2
–3
–4

Voltage (mV)

OFFSET VOLTAGE vs TEMPERATURE

40

–40 –20 0 20 60 80 100

Temperature (°C)

–5

5
4
3
2
1

0
–1
–2
–3
–4

Bias Current (µA)

INPUT BIAS CURRENT vs TEMPERATURE

40

10k 100k 1M 10M 100M 1G

Frequency (Hz)

100

1.0M

100k

10k

1k

Input Impedance (Ω)

INPUT IMPEDANCE vs FREQUENCY

10k 100k 1M 10M 100M 1G

Frequency (Hz)

1

100

30

10

3

Output Impedance (Ω)

OUTPUT IMPEDANCE vs FREQUENCY

–40 –20 0 20 60 80 100

Temperature (°C)

0

9
8
7
6
5
4
3
2
1

Supply Current (mA)

TOTAL QUIESCENT CURRENT vs TEMPERATURE

40

One Channel Selected

–40 –20 0 20 60 80 100

Temperature (°C)

0

300

250

200

150

100

50

Supply Current (µA)

TOTAL QUIESCENT CURRENT vs TEMPERATURE

40

No Channel Selected

6

®

MPC100

TYPICAL PERFORMANCE CURVES (CONT)

At V

CC

= ±5V, R

LOAD

= 10kΩ, R

SOURCE

= 50Ω, and TA = +25°C, unless otherwise noted.

+0.7V

SWITCHING ENVELOPE (Video Signal)

Time

(µs)

Output Voltage (V)

0V

–0.3V

SMALL SIGNAL PULSE RESPONSE

Time (ns)

Output Voltage (40mV/Div)

C

OUT

= 1pF, t

RISE

= t

FALL

= 2ns

(Generator) V

I

= 0.2Vp-p

0 —

Input Voltage (V)

–5

5
4
3
2
1

0
–1
–2
–3
–4

Output Voltage (V)

TRANSFER FUNCTION

–5–4–3–2–1012345

100 1k 100k 1M 10M 100M

Frequency (Hz)

0.1

100

10

1

Voltage Noise (nV/ Hz)

INPUT VOLTAGE NOISE SPECTRAL DENSITY

10k

0 20 40 60 80 100 120 140 160 180 200

Time (ns)

–4

12
10

8
6
4
2
0

–2

Output Voltage (mV)

SWITCHING TRANSIENTS (Channel To Channel)

Without bandwidth

limiting lowpass filter.

SEL2

SEL1

5V

5V

0 20 40 60 80 100 120 140 160 180 200

Time (ns)

–4

Output Voltage (mV)

SWITCHING TRANSIENTS (Channel To Channel)

SEL2

SEL1

5V

5V

36MHz Low pass filter acc.

Eureka Rec. EU95-PG03

in the signal path.

7

®

MPC100

TYPICAL PERFORMANCE CURVES (CONT)

At V

CC

= ±5VDC, R

LOAD

= 10kΩ, R

SOURCE

= 50Ω, and TA = +25°C, unless otherwise noted.

Time (ns)

C

OUT

= 1pF, t

RISE

= t

FALL

= 5ns

(Generator) V

I

= 5Vp-p

LARGE SIGNAL PULSE RESPONSE

Output Voltage (1V/Div)

0 —

SMALL SIGNAL PULSE RESPONSE

Time (ns)

Output Voltage (40mV/Div)

C

OUT

= 47pF, t

RISE

= t

FALL

= 2ns

(Generator) V

I

= 0.2Vp-p

0 —

Time (ns)

C

OUT

= 47pF, t

RISE

= t

FALL

= 5ns

(Generator) V

I

= 5Vp-p

LARGE SIGNAL PULSE RESPONSE

Output Voltage (1V/Div)

0 —

20
15
10

5
0

–5
–10
–15
–20
–25

Frequency (Hz)

Gain (dB)

1M 10M 100M 1G

dB

BANDWIDTH vs C

OUT

WITH RECOMMENDED R

OUT

1pF

10pF
22pF

33pF

47pF

R

OUT

1p 0Ω 500MHz

f

–3dB

C

OUT

10p 22Ω 340MHz

22p
33p
47p

15Ω
12Ω
10Ω

250MHz
215MHz
130MHz

GAIN FLATNESS

0.5

0.4

0.3

0.2

0.1
0

–0.1
–0.2
–0.3
–0.4

Frequency (Hz)

Output (dB)

1M 10M 100M 1G

–0.5

C

OUT

= 22pF, R

OUT

= 15Ω

R

IN

= 150Ω, RO1 = 1kΩ

300k

0.2Vp-p

GROUP DELAY TIME vs FREQUENCY

Frequency (Hz)

1M 10M 100M 500M

Delay Time (ns)

2.5
2

1.5
1

0.5
0

–0.5

–1

–1.5

–2

–2.5

DUT

R

I

150Ω

R

OUT

50Ω

V

I

Out

Group Delay Time

V

OUT

=

300mV

PO

8

®

MPC100

TYPICAL PERFORMANCE CURVES (CONT)

At V

CC

= ±5V, R

LOAD

= 10kΩ, R

SOURCE

= 50Ω, and TA = +25°C, unless otherwise noted.

30MHz HARMONIC DISTORTION

10dB/Div

Harmonic Distortion (dB)

Frequency (Hz)

V

OUT

= 2.8Vp-p, RL = 1kΩ, C

OUT

= 1pF

30MHz HARMONIC DISTORTION

10dB/Div

Harmonic Distortion (dB)

Frequency (Hz)

V

OUT

= 2.8Vp-p, RL = 10kΩ, C

OUT

= 1pF

dB

20
15
10

5
0

–5
–10
–15
–20
–25

Output (dBm)

BANDWIDTH vs OUTPUT VOLTAGE

1.4Vp-p

0.6Vp-p

0.2Vp-p

5Vp-p

2.8Vp-p

RIN = 150Ω

C

OUT

= 1pF, R

OUT

= 0Ω

Frequency (Hz)

1M 10M 100M 1G300k

dB

20
15
10

5
0

–5
–10
–15
–20
–25

Output (dBm)

BANDWIDTH vs R

LOAD

Frequency (Hz)

300k 10M 100M 1G

RL = 500Ω = 1kΩ = 10kΩ

C

OUT

= 22pF, R

OUT

= 15Ω, VO = 2.8Vp-p

1M

dB

20
15
10

5
0

–5
–10
–15
–20
–25

Output (dBm)

BANDWIDTH MATCHING (DB1...DB4)

C

OUT

= 22pF, R

OUT

= 15Ω

Frequency (Hz)

1M 10M 100M 1G

2.8Vp-p

300k

9

®

MPC100

APPLICATIONS INFORMATION

The MPC100 operates from ±5V power supplies (±6V
maximum). Do not attempt to operate with larger power
supply voltages or permanent damage may occur. The buffer
outputs are not current-limited or protected. If the output is
shorted to ground, currents up to 18mA could flow. Momen­tary shorts to ground (a few seconds) should be avoided, but
are unlikely to cause permanent damage.

INPUT PROTECTION

All pins on the MPC100 are internally protected from ESD
by means of a pair of back-to-back reverse-biased diodes to
either power supply as shown in Figure 1. These diodes will
begin to conduct when the input voltage exceeds either
power supply by about 0.7V. This situation can occur with
loss of the amplifier’s power supplies while a signal source
is still present. The diodes can typically withstand a continu­ous current of 30mA without destruction. To insure long
term reliability, however, diode current should be externally
limited to 10mA or less whenever possible.

The internal protection diodes are designed to withstand

2.5kV (using Human Body Model) and will provide ad­equate ESD protection for most normal handling proce­dures. However, static damage can cause subtle changes in
amplifier input characteristics without necessarily destroy­ing the device. In precision buffer amplifiers, this may cause
a noticeable degradation of offset voltage and drift. There­fore, static protection is strongly recommended when han­dling the MPC100.

Static damage has been well recognized for MOSFET de­vices, but any semiconductor device deserves protection
from this potentially damaging source. The MPC100 incor­porates on-chip ESD protection diodes as shown in Figure 1.
This eliminates the need for the user to add external protec­tion diodes, performance.

DISCUSSION
OF PERFORMANCE

The MPC100 video multiplexer allows the user to connect
any one of four analog input channels (IN

1

-IN4) to the output

of the component and to switch between channels within
less than 0.5µs. It consists of four identical unity-gain buffer
amplifiers, which are connected together internally at the
output. The open loop buffers consisting of complementary

–V

CC

+V

CC

ESD Protection diodes
internally connected to all pins.

Internal CircuitryExternal Pin

FIGURE 1. Internal ESD Protection.

emitter followers applies no feedback, so their low fre­quency gain is slightly less than unity and somewhat depen­dent on loading. Unlike devices using MOS bilateral switch­ing elements, the bipolar complementary buffers form an
unidirectional transmission path and thus provide high out­put-to-input isolation. Switching stages compatible to TTL
level digital signals are provided for each buffer to select the
input channel. When no channel is selected, the output of the
device is high-impedance and allows the user to wire more
MPC100s together to form switch multi-channel matrices.

If one channel is selected with a digital “1” at the corre­sponding SEL-input, the MPC100 acts as a buffer amplifier
with high input impedance and low output impedance. The
truth table on the front page describes the relationship
between the digital inputs (SEL

1

to SEL4) and the analog

inputs (IN

1

to IN4), and which signal is selected at the

output.
The 2-4 address decoder and chip select logic is not

integrated. The selected design increases the flexibility of
address decoding in complex distribution fields, eases
BUS-controlled channel selection, simplifies channel se­lection monitoring for the user, and lowers transient peaks.
All of these characteristics make the multiplexer, in effect,
a quad switchable high-speed buffer. It requires DC cou­pling and termination resistors when directly driven from
a low impedance cable. High-current output amplifiers are
recommended when driving low-impedance transmission
lines or inputs.

An advanced complementary bipolar process, consisting of
pn-junction isolated high-frequency NPN and PNP transis­tors, provides wide bandwidth while maintaining low
crosstalk and harmonic distortion. The single chip band­width of over 250MHz at an output voltage of 1.4Vp-p
allows the design of large crosspoint or distribution fields
in HDTV-quality with an overall system bandwidth of
36MHz. The buffer amplifiers also offer low differential
gain (0.05%) and phase (0.01°) errors. These parameters
are essential for video applications and demonstrate how
well the signal path maintains a constant small-signal gain
and phase for the low-level color subcarrier at 4.43MHz
(PAL) or 3.58MHz (NSTC) as the brightness (luminance)
signal is ramped through its specified range. The bipolar
construction also ensures that the input impedance remains
high and constant between ON and OFF states. The ON/
OFF input capacitance ratio is near unity, and does not vary
with power supply voltage variations. The low output
capacitance of 1.5pF when no channel is selected is a very
important parameter for large distribution fields. Each par­allel output capacitance is an additional load and reduces
the overall system bandwidth.

Bipolar video crosspoint switches are virtually glitch-free
when compared to signal switches using CMOS or DMOS
devices. The MPC100 operates with a fast make-before­break switching action to keep the output switching tran­sients small and short. Switching from one channel to
another causes the signal to mix at the output for a short
time, but it interferes only minimally with the input signals.

10

®

MPC100

The transient peaks remain less than +2.5mV and –1.2mV.
Subsequent equipment might interpret large negative output
glitches as synchronization pulses. To remove this problem,
the output must be clamped during the switching dead time.
With the MPC100, the generated output transients are ex­tremely small and clamping is unnecessary. The switching
time between two channels is less than 0.5µs. This short
time period allows easy switching during the vertical blank­ing time. The signal envelope during the transition from one
channel to another rises and falls symmetrically and shows
less overshooting or DC settling transients.

Power consumption is a serious problem when designing
large crosspoint fields with high component density. Most of
the buffers are always in off-state. One important design
goal was to attain low off-state quiescent current when no
channel is selected. The low supply current of ±230µA in
off-state and ±4.6mA when one channel is selected, as well
as the reduced ±5V supply voltage, conserves power, simpli­fies the power supply design, and results in cooler, more
reliable operation.

CIRCUIT LAYOUT

The high-frequency performance of the MPC100 can be
greatly affected by the physical layout of the circuit. The
following tips are offered as suggestions, not as absolutes.
Oscillations, ringing, poor bandwidth and settling, higher
crosstalk, and peaking are all typical problems which plague
high-speed components when they are used incorrectly.

• Bypass power supplies very close to the device pins. Use

tantalum chip capacitors (approximately 2.2µF), a parallel
470pF ceramic chip capacitor may be added if desired.
Surface-mount types are recommended due to their low
lead inductance.

• PC board traces for signal and power lines should be wide
to reduce impedance or inductance.

• Make short and low inductance traces. The entire physical
circuit layout should be as small as possible.

• Use a low-impedance ground plane on the component side
to ensure that low-impedance ground is available through­out the layout. Grounded traces between the input traces
are essential to achieve high interchannel crosstalk rejec­tion. Refer to the suggested layout shown in Figure 6.

• Do not extend the ground plane under high-impedance
nodes sensitive to stray capacitances, such as the buffer’s
input terminals.

• Sockets are not recommended because they add signifi­cant inductance and parasitic capacitance. If sockets are
required, use zero-profile solderless sockets.

• Use low-inductance and surface-mounted components to
achieve the best AC-performance.

• A resistor (100Ω to 200Ω) in series with the input of the
buffers may help to reduce peaking. Place the resistor as
close as possible to the pin.

• Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential.

IN

2

+V

CC

= +5V

V

OUT

(3)

DB2

(11)

–V

CC

= –5V

(10)

(12)

(13)

SEL

2

DB1

(14)

(1)

(2)

IN

1

GND

SEL

1

DB3

(9)

(5)

(6)

IN

3

GND

SEL

3

(4)

GND

DB4

(8)

(7)

IN

4

SEL

1

NOTE: DB = Diamond Buffer

FIGURE 2. Simplified Circuit Diagram.

11

®

MPC100

50Ω

150Ω

50Ω

V

I

DB2

22pF

BUF601

50Ω

50Ω

V

O

GND

GND

DB1

150Ω

DB4

DB3

200Ω

GND

IN

4

IN

1

150Ω

MPC100

15Ω 180Ω

V

O

V

I

Crosstalk = 20log

IN

3

is connected with 150Ω + 50Ω to GND

SEL1
SEL2
SEL3
SEL4

0
0
1
0

VI = 1.4Vp-p

IN

2

IN

3

50Ω

150Ω

50Ω

V

I

DB2

22pF

BUF601

50Ω

50Ω

V

O

IN

2

IN

3

GND

GND

DB1

150Ω

DB4

DB3

GND

IN

4

IN

1

150Ω

MPC100

15Ω 180Ω

V

O

V

I

Crosstalk = 20log

IN

3

is connected to GND

SEL1
SEL2
SEL3
SEL4

0
0
1
0

VI = 1.4Vp-p

FIGURE 3. Channel Crosstalk—Grounded Input.

FIGURE 4. Channel Crosstalk—150Ω Input Resistor.

FIGURE 5. Off Isolation.

10

0
–10
–20
–30
–40
–50
–60
–70
–80

Crosstalk (dB)

–90

MPC100AP

MPC100AU

Frequency (Hz)

10M 100M 300M1M

10

0
–10
–20
–30
–40
–50
–60
–70
–80

Crosstalk (dB)

–90

MPC100AU

MPC100AP

Frequency (Hz)

10M 100M 300M1M

10

0
–10
–20
–30
–40
–50
–60
–70
–80

Frequency (Hz)

Crosstalk (dB)

10M 100M 300M

–90

MPC100AU

MPC100AP

1M

50Ω

150Ω

50Ω

V

I

DB2

BUF601

50Ω

50Ω

V

O

IN

2

IN

3

GND

GND

DB1

150Ω

DB4

DB3

150Ω

GND

IN

4

IN

1

150Ω

MPC100

180Ω

V

O

V

I

Crosstalk = 20log

SEL1
SEL2
SEL3
SEL4

0
0
0
0

VI = 1.4Vp-p

12

®

MPC100

FIGURE 6. Video Distribution Field.

13

220Ω

220Ω

–

+

6

3

2

2.2µ

–5V

Out

75Ω

4

2.2µ

10n

+5V

7

10n

OPA623

150Ω

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

12

22Ω

11

10

IN16

IN13

75Ω

75Ω

75Ω

75Ω

2.2µ

470p

+5V

14

9

8

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

12

22Ω

11

10

IN16

IN13

75Ω

75Ω

75Ω

75Ω

2.2µ

470p

2.2µ

470p

14

9

13

8

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

12

22Ω

11

10

IN16

IN13

75Ω

75Ω

75Ω

75Ω

2.2µ

470p

2.2µ

470p

14

9

13

8

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

12

22Ω

11

10

IN16

IN13

75Ω

75Ω

75Ω

75Ω

2.2µ

470p

2.2µ

470p

14

9

13

8

+5V

12

15

13

14

5

1

3

2

V

CC

Y

2

Y

0

Y

1

Y

3

A

2

A

0

A

1

CS2

16

GND

7

11

9

10

Y

6

Y

4

Y

5

Y

7

6

CS1

4

LE

0.1µF

+5V

12

15

13

14

6

1

3

2

V

CC

Y

2

Y

0

Y

1

Y

3

A

3

A

0

A

1

CS1

16

GND

7

11

9

10

Y

6

Y

4

Y

5

Y

7

5

CS2

4

LE

0.1µF

74HC

237

74HC

237

+5V

CS

A

0

A

3

A

1

2.2µ

470p

–5V

13

®

MPC100

FIGURE 7. Digital Gain Control.

FIGURE 8. High Speed Data Acquisition System.

OPA623

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

75Ω

150Ω

11

+5V

+5V

–5V

12

10

8

14

+1

4

7

84

75Ω

BUF600

75Ω

75Ω

75Ω

150Ω

150Ω

75Ω

9

13

12

15

13

14

5

1

3

2

A

0

A

1

CS1

A

2

GND

0.1µ

2.2µ

470p

2.2µ

470p

LE CS2

390Ω

390 Ω

–

+

180Ω

4

00

3

00
1
0
0

0
1
0

A

0

02

GAINA

1

11
0
1
X

0.5

0.25
0

0

CS

0
0
0
1

2

0

SEL

1

1
0
0
0

584

R-2R

Ladder

Network

Y

1

Y

2

Y

3

Y

0

1
0
0
0
0

0
0
1
1
X

In

+5V

–5V

5

1

+5V

–5V

6

2

3

Out

74HC

237

DB1

DB2

DB3

DB4

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

11

+5V

–5V

12

10

8

14

50Ω

50Ω

9

13

2.2µ

470p

2.2µ

470p

220Ω

+5V

12

15

13

14

5

1

3

2

A

0

A

1

CS1

A

2

GND

584

0.1µ

LE CS2

16

V

CC

Y

2

Y

0

Y

1

Y

3

12 Bit

10MHz

A/D Converter

Signal
Input

6

ADS804

7

2

50Ω

50Ω

OPA620

220Ω

–

+

+5V

–5V

In1

DB1

DB2

DB3

DB4

In2

In3

In4

4

3

150Ω

14

®

MPC100

FIGURE 9. Distribution Field for High Resolution Graphic Cards, Cameras.

390Ω

390Ω

6

2

2.2µ

10n

–5V

B

75Ω

2.2µ

10n

+5V

7

OPA623

3

4

–

+

390Ω

390Ω

6

2

2.2µ

10n

–5V

G

75Ω

2.2µ

10n

7

OPA623

3

4

–

+

390Ω

390Ω

6

2

2.2µ

10n

–5V

R

75Ω

2.2µ

10n

+5V

7

75

Ω

CH1 G

+5V

12

15

13

14

4

1

3

2

A

0

A

1

5

V

CC

Y

2

Y

0

Y

1

Y

3

OPA623

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

12

3

9101314

150Ω

4

11

10

2.2µ

470p

–5V

2.2µ

470p

+5V

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

12

75Ω

9 10 13 14

150Ω

11

10

2.2µ

470p

–5V

A

9

A

0

A

1

LE

7

MPC100

150Ω

150Ω

150Ω

150Ω

6

5

4

3

2

1

12

75Ω

11

10

2.2µ

470p

–5V

2.2µ

470p

+5V

16

CS

CS2 GND

CS1

9101314

75Ω

R

B

CH2 G

R

B

CH3 G

R

B

CH4 G

R

B

74HC

237

–

+

2.2µ

470p

+5V

150

Ω

58

+5V

DB1

DB2

DB3

DB4

DB1

DB2

DB3

DB4

DB1

DB2

DB3

DB4

15

®

MPC100

50Ω

R

O1

R

I

150Ω

50Ω

V

I

DUT

DB1

to DB4

R

OUT

R

O1

C

OUT

+1

50Ω

R

B

51Ω

Out

In

RIN =

50Ω

Spectrum

Analyzer

B

OUT

V

O

BUF601

RIN =

50Ω

Generator

FIGURE 10. Test Circuit Pulse Response.

STR

1435567

7

MPC100

1143135127

11

HC4094

2

31 15

OE

SER

Out

143556771143135127

11

2

31 15

SER

Out

143556771143135127

11

2

31 15

SER

Out

Clock

SER In

33

• • •

3

SEL Inputs

MPC100

SEL Inputs

MPC100

SEL Inputs

MPC100

SEL Inputs

MPC100

SEL Inputs

MPC100

SEL Inputs

Parallel Out

HC4094

Parallel Out

HC4094

Parallel Out

D

FIGURE 13. Serial Bus-Controlled Distribution Field.

FIGURE 12. Test Circuit Frequency Response.

FIGURE 11. Test Circuit Differential Gain and Phase.

MPC100

RIN =
75Ω

4.43MHz

VDC

Generator

OPA623

RIN =
75Ω

Video
Analyzer

75Ω 10kΩ

150Ω150Ω

75Ω

V

IN

4

8

DUT

DB1 to DB4

75Ω

75Ω

+

–

390Ω

390Ω

3

RIN =

50Ω

Pulse
Generator

RIN =

50Ω

400MHz
Scope

50Ω

R

O1

R

I

150Ω

50Ω

V

I

DUT

DB1

to DB4

R

OUT

R

O1

C

OUT

+1

50Ω

R

B

51Ω

B

OUT

V

O

Out

In

BUF601