Datasheet MMBT4401LT1, MMBT4401LT3 Datasheet (MOTOROLA)

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SEMICONDUCTOR TECHNICAL DATA
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NPN Silicon
MAXIMUM RATINGS
Rating Symbol Value Unit
Collector–Emitter Voltage V Collector–Base Voltage V Emitter–Base Voltage V Collector Current — Continuous I
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation FR–5 Board
TA = 25°C
Derate above 25°C Thermal Resistance, Junction to Ambient Total Device Dissipation
Alumina Substrate,
Derate above 25°C Thermal Resistance, Junction to Ambient Junction and Storage Temperature TJ, T
(2)
TA = 25°C
(1)
DEVICE MARKING
MMBT4401LT1 = 2X
P
R
P
R
C
D
q
JA D
q
JA
stg
COLLECTOR
3
1
BASE
2
EMITTER
40 Vdc 60 Vdc
6.0 Vdc
600 mAdc
225
1.8 556 °C/W 300
2.4 417 °C/W
–55 to +150 °C
mW
mW/°C
mW
mW/°C

Motorola Preferred Device
3
1
2
CASE 318–08, STYLE 6
SOT–23 (TO–236AB)
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
A
Characteristic
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage
(IC = 1.0 mAdc, IB = 0)
Collector–Base Breakdown Voltage
(IC = 0.1 mAdc, IE = 0)
Emitter–Base Breakdown Voltage
(IE = 0.1 mAdc, IC = 0)
Base Cutoff Current
(VCE = 35 Vdc, VEB = 0.4 Vdc)
Collector Cutoff Current
(VCE = 35 Vdc, VEB = 0.4 Vdc)
1. FR–5 = 1.0 0.75 0.062 in.
2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina.
3. Pulse Test: Pulse Width 300 µs, Duty Cycle 2.0%.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Motorola, Inc. 1996
(3)
Symbol Min Max Unit
V
(BR)CEO
V
(BR)CBO
V
(BR)EBO
I
BEV
I
CEX
40
60
6.0
0.1
0.1
Vdc
Vdc
Vdc
µAdc
µAdc
1
Page 2
MMBT4401LT1
(
CC
,
EB
,
ns
(
CC
,
C
,
ns
ELECTRICAL CHARACTERISTICS (continued) (T
Characteristic Symbol Min Max Unit
ON CHARACTERISTICS
DC Current Gain
(IC = 0.1 mAdc, VCE = 1.0 Vdc) (IC = 1.0 mAdc, VCE = 1.0 Vdc) (IC = 10 mAdc, VCE = 1.0 Vdc) (IC = 150 mAdc, VCE = 1.0 Vdc) (IC = 500 mAdc, VCE = 2.0 Vdc)
Collector–Emitter Saturation Voltage
(IC = 150 mAdc, IB = 15 mAdc) (IC = 500 mAdc, IB = 50 mAdc)
Base–Emitter Saturation Voltage
(IC = 150 mAdc, IB = 15 mAdc) (IC = 500 mAdc, IB = 50 mAdc)
(3)
SMALL–SIGNAL CHARACTERISTICS
Current–Gain — Bandwidth Product
(IC = 20 mAdc, VCE = 10 Vdc, f = 100 MHz)
Collector–Base Capacitance
(VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz)
Emitter–Base Capacitance
(VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz)
Input Impedance
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz)
Voltage Feedback Ratio
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz)
Small–Signal Current Gain
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz)
Output Admittance
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz)
SWITCHING CHARACTERISTICS
Delay Time Rise Time Storage Time Fall Time
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
(VCC = 30 Vdc, VEB = 2.0 Vdc,
IC = 150 mAdc, IB1 = 15 mAdc)
(VCC = 30 Vdc, IC = 150 mAdc,
IB1 = IB2 = 15 mAdc)
= 25°C unless otherwise noted)
A
h
FE
V
CE(sat)
V
BE(sat)
f
C
C
h
h
h
h
t t t
oe
t
T
cb
eb
ie
re
fe
d
s
Vdc
Vdc
MHz
X 10
m
mhos
pF
pF
k
–4
20 40 80
100
40
— —
0.75 —
250
6.5
30
1.0 15
0.1 8.0
40 500
1.0 30
15
r
f
20 — 225 — 30
— — —
300
0.4
0.75
0.95
1.2
SWITCHING TIME EQUIVALENT TEST CIRCUITS
+30 V
+16 V 0
–2.0 V
1.0 to 100 DUTY CYCLE
< 2.0 ns
µ
s,
1.0 k
2.0%
200
CS* < 10 pF
Scope rise time < 4.0 ns *Total shunt capacitance of test jig connectors, and oscilloscope
+16 V
0
–14 V
1.0 to 100 DUTY CYCLE
< 20 ns
µ
s,
1.0 k
2.0%
–4.0 V
Figure 1. T urn–On Time Figure 2. T urn–Off Time
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
+30 V
200
CS* < 10 pF
Page 3
TRANSIENT CHARACTERISTICS
25
°
C 100°C
MMBT4401LT1
30
20
C
10
7.0
5.0
CAPACITANCE (pF)
3.0
2.0
0.1 2.0 5.0 10 REVERSE VOL TAGE (VOLTS)
3.01.00.50.30.2
Figure 3. Capacitances
100
70 50
30
20
t, TIME (ns)
obo
IC/IB = 10
tr @ VCC = 30 V tr @ VCC = 10 V td @ VEB = 2.0 V td @ VEB = 0
20
C
cb
30 50
10
7.0 VCC = 30 V
5.0
IC/IB = 10
3.0
2.0
1.0
0.7
0.5
Q, CHARGE (nC)
0.3
0.2
0.1
10 20 50 70 100
30
IC, COLLECTOR CURRENT (mA)
Figure 4. Charge Data
100
70 50
30
20
t, TIME (ns)t
t
r
t
f
Q
T
Q
A
200
300 500
VCC = 30 V IC/IB = 10
10
7.0
5.0 10 20 50 70 100
30
IC, COLLECTOR CURRENT (mA)
Figure 5. Turn–On Time
300
200
100
70
, STORAGE TIME (ns)
s
t
50
30
10 20 50 70 100
30
IC, COLLECTOR CURRENT (mA)
Figure 7. Storage Time
200 300 500
ts′
= ts – 1/8 t IB1 = I IC/IB = 10 to 20
f
B2
200 300
500
10
7.0
5.0 10 20 50 70 100
30
IC, COLLECTOR CURRENT (mA)
Figure 6. Rise and Fall Times
100
70 50
30 20
, FALL TIME (ns)
f
10
7.0
5.0 10 20 50 70 100
IC/IB = 10
30
IC, COLLECTOR CURRENT (mA)
Figure 8. Fall Time
IC/IB = 20
200 300 500
VCC = 30 V IB1 = I
B2
200 300
500
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
Page 4
MMBT4401LT1
10
IC = 1.0 mA, RS = 150
8.0
6.0
IC = 500 µA, RS = 200 IC = 100 µA, RS = 2.0 k IC = 50 µA, RS = 4.0 k
SMALL–SIGNAL CHARACTERISTICS
NOISE FIGURE
VCE = 10 Vdc, TA = 25°C
Bandwidth = 1.0 Hz
10
RS = OPTIMUM
RS = SOURCE RS = RESISTANCE
8.0
6.0
f = 1.0 kHz
IC = 50 µA IC = 100 IC = 500 IC = 1.0 mA
µ
A
µ
A
4.0
NF, NOISE FIGURE (dB)
2.0
0
0.1 2.0 5.0 10
1.00.50.20.01 0.02 0.05
f, FREQUENCY (kHz)
20 50
100
Figure 9. Frequency Effects
h PARAMETERS
VCE = 10 Vdc, f = 1.0 kHz, TA = 25°C
This group of graphs illustrates the relationship between hfe and other “h” parameters for this series of transistors. To obtain these curves, a high–gain and a low–gain unit were
300
200
100
70
, CURRENT GAIN
50
fe
h
30
MMBT4401L T1 UNIT 1 MMBT4401L T1 UNIT 2
4.0
NF, NOISE FIGURE (dB)
2.0
0
RS, SOURCE RESISTANCE (OHMS)
100 k50 100 200 500 1.0 k 2.0 k 5.0 k 10 k 20 k 50 k
Figure 10. Source Resistance Effects
selected from the MMBT4401LT1 lines, and the same units were used to develop the correspondingly numbered curves on each graph.
50 k
MMBT4401L T1 UNIT 1
20 k
10 k
5.0 k
2.0 k
, INPUT IMPEDANCE (OHMS)
ie
h
1.0 k
MMBT4401L T1 UNIT 2
20
0.1 0.2 0.5 0.7 1.0
0.3 IC, COLLECTOR CURRENT (mA)
Figure 11. Current Gain
10
–4
7.0
5.0
3.0
2.0
1.0
0.7
0.5
0.3
re
h , VOLTAGE FEEDBACK RATIO (X 10 )
0.2
0.1 0.2 0.5 0.7 1.0
0.3 IC, COLLECTOR CURRENT (mA)
Figure 13. V oltage Feedback Ratio
4
2.0 3.0 10
MMBT4401L T1 UNIT 1 MMBT4401L T1 UNIT 2
2.0 3.0 10
5.0 7.0
5.0 7.0
500
0.1 0.2 0.5 0.7 1.0
0.3 IC, COLLECTOR CURRENT (mA)
2.0 3.0 10
5.0 7.0
Figure 12. Input Impedance
100
50
m
20
10
5.0
2.0
oe
h , OUTPUT ADMITTANCE ( mhos)
1.0
0.1 0.2 0.5 0.7 1.0
0.3 IC, COLLECTOR CURRENT (mA)
MMBT4401L T1 UNIT 1 MMBT4401L T1 UNIT 2
2.0 3.0 10
5.0 7.0
Figure 14. Output Admittance
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Page 5
3.0
2.0
MMBT4401LT1
ST ATIC CHARACTERISTICS
VCE = 1.0 V VCE = 10 V
TJ = 125°C
1.0
0.7
0.5
0.3
FE
h , NORMALIZED CURRENT GAIN
0.2
1.0
0.8
0.6
0.4
0.2
0.1
0.2 0.3
IC = 1.0 mA
25°C
–55°C
0.5 2.0 3.0 10 50
1.00.7 IC, COLLECTOR CURRENT (mA)
30205.0 7.0
Figure 15. DC Current Gain
10 mA 100 mA
70
100
200 300
TJ = 25°C
500 mA
500
CE
V , COLLECTOR–EMITTER VOLT AGE (VOLTS)
0
1.0
0.8
0.6
0.4
VOLTAGE (VOLTS)
0.2
0.1 0.2 0.5
TJ = 25°C
V
0.070.050.030.020.01
V
BE(sat)
VBE @ VCE = 10 V
@ IC/IB = 10
CE(sat)
1.0 2.0 5.0 10 20 IC, COLLECTOR CURRENT (mA)
Figure 17. “On” Voltages
0.1
0.5 2.0 3.0 500.2 0.3
IB, BASE CURRENT (mA)
1.00.7 5.0 7.0
Figure 16. Collector Saturation Region
+0.5
@ IC/IB = 10
500100
200
500
°
COEFFICIENT (mV/ C)
0
–0.5
–1.0
–1.5
–2.0
–2.5
0.1 0.2 0.5
Figure 18. T emperature Coefficients
10 20 30
q
for V
VC
CE(sat)
qVB for V
BE
1.0 2.0 5.0 10 20 IC, COLLECTOR CURRENT (mA)
50 100
200
500
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
Page 6
MMBT4401LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection
0.037
0.95
0.035
0.9
SOT–23 POWER DISSIP ATION
The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T die, R ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows:
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts.
The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
, the maximum rated junction temperature of the
J(max)
, the thermal resistance from the device junction to
θJA
PD =
T
PD =
150°C – 25°C
556°C/W
J(max)
R
θJA
– T
A
= 225 milliwatts
0.031
0.8
SOT–23
interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.037
0.95
0.079
2.0
inches
mm
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
6
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Page 7
P ACKAGE DIMENSIONS
MMBT4401LT1
A
L
3
S
1
B
2
GV
C
D
H
K
J
CASE 318–08
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
INCHES
DIMAMIN MAX MIN MAX
0.1102 0.1197 2.80 3.04
B 0.0472 0.0551 1.20 1.40 C 0.0350 0.0440 0.89 1.11 D 0.0150 0.0200 0.37 0.50
G 0.0701 0.0807 1.78 2.04
H 0.0005 0.0040 0.013 0.100 J 0.0034 0.0070 0.085 0.177 K 0.0180 0.0236 0.45 0.60 L 0.0350 0.0401 0.89 1.02 S 0.0830 0.0984 2.10 2.50 V 0.0177 0.0236 0.45 0.60
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
MILLIMETERS
SOT–23 (TO–236AB)
ISSUE AE
Motorola Small–Signal Transistors, FETs and Diodes Device Data
7
Page 8
MMBT4401LT1
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Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBT4401LT1/D
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