Datasheet MMBT2484LT1 Datasheet (MOTOROLA)

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SEMICONDUCTOR TECHNICAL DATA

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MAXIMUM RATINGS

Rating Symbol Value Unit

Collector–Emitter Voltage V
Collector–Base Voltage V
Emitter–Base Voltage V
Collector Current — Continuous I

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Total Device Dissipation FR–5 Board

TA = 25°C

Derate above 25°C
Thermal Resistance, Junction to Ambient
Total Device Dissipation

Alumina Substrate,

Derate above 25°C
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature TJ, T

(2)

TA = 25°C

(1)

DEVICE MARKING

MMBT2484LT1 = 1U

CEO
CBO
EBO

P

R

P

R

C

D

q

JA
D

q

JA

stg

COLLECTOR

3

1

BASE

2

EMITTER

60 Vdc
60 Vdc

6.0 Vdc
50 mAdc

225

1.8

556 °C/W
300

2.4

417 °C/W

–55 to +150 °C

mW

mW/°C

mW

mW/°C

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3

1

2

CASE 318–08, STYLE 6

SOT–23 (TO–236AB)

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

A

Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS

Collector–Emitter Breakdown Voltage

(IC = 10 mAdc, IB = 0)

Collector–Base Breakdown Voltage

(IC = 10 mAdc, IE = 0)

Emitter–Base Breakdown Voltage

(IE = 10 mAdc, IC = 0)

Collector Cutoff Current

(VCB = 45 Vdc, IE = 0)
(VCB = 45 Vdc, IE = 0, TA = 150°C)

Emitter Cutoff Current

(VEB = 5.0 Vdc, IC = 0)

1. FR–5 = 1.0  0.75  0.062 in.

2. Alumina = 0.4  0.3  0.024 in. 99.5% alumina.

Thermal Clad is a trademark of the Bergquist Company.

V

(BR)CEO

V

(BR)CBO

V

(BR)EBO

I

CBO

I

EBO

60 —

60 —

5.0 —

—
—

— 10

10
10

Vdc

Vdc

Vdc

nAdc
µAdc

nAdc

Motorola Small–Signal Transistors, FETs and Diodes Device Data

 Motorola, Inc. 1996

1

MMBT2484LT1

ELECTRICAL CHARACTERISTICS (continued) (T

Characteristic Symbol Min Max Unit

= 25°C unless otherwise noted)

A

ON CHARACTERISTICS

DC Current Gain

(IC = 1.0 mAdc, VCE = 5.0 Vdc)
(IC = 10 mAdc, VCE = 5.0 Vdc)

Collector–Emitter Saturation Voltage

(IC = 1.0 mAdc, IB = 0.1 mAdc)

Base–Emitter On Voltage

(IC = 1.0 mAdc, VCE = 5.0 mAdc)

SMALL–SIGNAL CHARACTERISTICS

Output Capacitance

(VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz)

Input Capacitance

(VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz)

Noise Figure

(IC = 10 mAdc, VCE = 5.0 Vdc, RS = 10 kΩ, f = 1.0 kHz, BW = 200 Hz)

h

FE

V

CE(sat)

V

BE(on)

C

obo

C

ibo

NF

250

—

— 0.35

— 0.95

— 6.0

— 6.0

— 3.0

800

—

—

Vdc

Vdc

pF

pF

dB

R

S

i

n

e

n

IDEAL

TRANSISTOR

Figure 1. Transistor Noise Model

2

Motorola Small–Signal Transistors, FETs and Diodes Device Data

30

20

IC = 10 mA

BANDWIDTH = 1.0 Hz

RS ≈ 0

MMBT2484LT1

NOISE CHARACTERISTICS

(VCE = 5.0 Vdc, TA = 25°C)

NOISE VOLTAGE

30

BANDWIDTH = 1.0 Hz

20

RS ≈ 0

3.0 mA

1.0 mA

300 µA

20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k

10

f, FREQUENCY (Hz)

, NOISE VOLTAGE (nV)

n

e

10

7.0

5.0

3.0

Figure 2. Effects of Frequency

10

7.0

5.0

3.0

2.0

1.0

0.7

0.5

, NOISE CURRENT (pA)

n

I

0.3

0.2
RS ≈ 0

0.1

10 20 50 100 200 500 1 k 2 k 5 k 10k 20 k 50 k 100 k

10 µA

f, FREQUENCY (Hz)

BANDWIDTH = 1.0 Hz

IC = 10 mA

3.0 mA

1.0 mA

300 µA

100 µA

30 µA

10

7.0

, NOISE VOLTAGE (nV)

n

e

5.0

3.0

0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10
IC, COLLECTOR CURRENT (mA)

f = 10 Hz

100 Hz

10 kHz

100 kHz

Figure 3. Effects of Collector Current

20

16

12

8.0

NF, NOISE FIGURE (dB)

4.0

0

10 20 50 100 200 500 1 k 2 k 5 k 10k 20 k 50k 100 k

BANDWIDTH = 10 Hz to 15.7 kHz

IC = 1.0 mA

500 µA

100 µA

10 µA

RS, SOURCE RESISTANCE (OHMS)

1.0 kHz

Figure 4. Noise Current

100 Hz NOISE DATA

300
200

BANDWIDTH = 1.0 Hz IC = 10 mA

100

70
50

30
20

10

, TOTAL NOISE VOLTAGE (nV)

T

7.0

V

5.0

3.0
10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k

RS, SOURCE RESISTANCE (OHMS)

100 µA

3.0 mA

1.0 mA

300 µA

30 µA

10 µA

Figure 6. T otal Noise Voltage

Motorola Small–Signal Transistors, FETs and Diodes Device Data

Figure 5. Wideband Noise Figure

20

16

12

8.0

NF, NOISE FIGURE (dB)

4.0
BANDWIDTH = 1.0 Hz

0

10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k

IC = 10 mA

RS, SOURCE RESISTANCE (OHMS)

3.0 mA

1.0 mA

300 µA

100 µA

30 µA

Figure 7. Noise Figure

10 µA

3

MMBT2484LT1

4.0

3.0

2.0

1.0

0.7

0.5

0.4

0.3

FE

h , DC CURRENT GAIN (NORMALIZED)

0.2

0.01

VCE = 5.0 V

TA = 125°C

25°C

–55°C

0.05 2.0 3.0 100.02 0.03
IC, COLLECTOR CURRENT (mA)

0.50.2 0.3

1.00.1 5.0

Figure 8. DC Current Gain

1.0
TJ = 25°C

0.8

0.6

VBE @ VCE = 5.0 V

0.4

V, VOLTAGE (VOLTS)

0.2

V

0

0.01

0.02 0.05 0.1 0.2

8.0

6.0

4.0

3.0

CE(sat)

@ IC/IB = 10

1.0 2.0 5.0

0.5

IC, COLLECTOR CURRENT (mA)

Figure 9. “On” Voltages

C

ob

C

C

cb

eb

C

ib

10 20 50 100

TJ = 25°C

–0.4

°

–0.8

–1.2

, BASE–EMITTER

–1.6

VBE

θ

R

–2.0

TEMPERATURE COEFFICIENT (mV/ C)

–2.4

0.01 0.02 0.05 0.1 0.2

500

300

200

TJ = 25°C to 125°C

–55°C to 25°C

1.0 2.0 5.0

0.5

IC, COLLECTOR CURRENT (mA)

10 20 50 100

Figure 10. T emperature Coefficients

2.0

C, CAPACITANCE (pF)

1.0

0.8

4

0.1 0.2

1.0 2.0 5.0

0.5
VR, REVERSE VOLTAGE (VOLTS)

Figure 11. Capacitance

10 20 50 100

Motorola Small–Signal Transistors, FETs and Diodes Device Data

100

VCE = 5.0 V

70

TJ = 25

°

C

50

, CURRENT–GAIN — BANDWIDTH PRODUCT (MHz)

T

f

1.0 2.0 5.03.0 7.0
IC, COLLECTOR CURRENT (mA)

10 20 30 50 70 100

Figure 12. Current–Gain — Bandwidth Product

MMBT2484LT1

INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection

0.037

0.95

0.035

0.9

SOT–23 POWER DISSIP ATION

The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by T
die, R
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:

The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.

The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.

, the maximum rated junction temperature of the

J(max)

, the thermal resistance from the device junction to

θJA

PD =

T

PD =

150°C – 25°C

556°C/W

J(max)

R

θJA

– T

A

= 225 milliwatts

0.031

0.8

SOT–23

interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.

0.037

0.95

0.079

2.0

inches

mm

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.

• Always preheat the device.

• The delta temperature between the preheat and

soldering should be 100°C or less.*

• When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.

• The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

• When shifting from preheating to soldering, the

maximum temperature gradient shall be 5°C or less.

• After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.

• Mechanical stress or shock should not be applied during

cooling.

* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.

Motorola Small–Signal Transistors, FETs and Diodes Device Data

5

MMBT2484LT1

P ACKAGE DIMENSIONS

A

L

3

S

1

B

2

GV

C

D

H

K

J

CASE 318–08

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.

INCHES

DIMAMIN MAX MIN MAX

0.1102 0.1197 2.80 3.04

B 0.0472 0.0551 1.20 1.40
C 0.0350 0.0440 0.89 1.11
D 0.0150 0.0200 0.37 0.50
G 0.0701 0.0807 1.78 2.04
H 0.0005 0.0040 0.013 0.100
J 0.0034 0.0070 0.085 0.177
K 0.0180 0.0236 0.45 0.60
L 0.0350 0.0401 0.89 1.02
S 0.0830 0.0984 2.10 2.50
V 0.0177 0.0236 0.45 0.60

STYLE 6:

PIN 1. BASE

2. EMITTER

3. COLLECTOR

MILLIMETERS

SOT–23 (TO–236AB)

ISSUE AE

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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters can and do vary in different
applications. All operating parameters, including “T ypicals” must be validated for each customer application by customer’s technical experts. Motorola does
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Motorola Small–Signal Transistors, FETs and Diodes Device Data

MMBT2484LT1/D

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