Datasheet MM74HCU04MX, MM74HCU04N, MM74HCU04SJ, MM74HCU04SJX, MM74HCU04CW Datasheet (Fairchild Semiconductor)
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September 1983
Revised February 1999
MM74HCU04 Hex Inverter
© 1999 Fairchild Semiconductor Corporation DS005296.prf www.fairchildsemi.com
MM74HCU04
Hex Inverter
General Description
The MM74HCU04 inverters utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates with the low p ower con sumpti on of standa rd
CMOS integrated circuits.
The MM74HCU04 is an unbuffered inverter. It has high
noise immunity and the ability to drive 15 LS-TTL loads.
The 74HCU logic family is functionally as well as pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by internal diode clamps to V
CC
and ground.
Features
■ Typical propagation delay: 7 ns
■ Fanout of 15 LS-TTL loads
■ Quiescent power consumption: 10 µA maximum at room
temperat ure
■ Low input current: 1 µA maximum
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.
Connection Diagram
Pin Assignments f or DIP, SOIC, SOP and TSSOP
Top View
Schematic Diagram
Order Number Package Number Package Description
MM74HCU04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74HCU04SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCU04MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HCU04N N14A 14-Lead Plastic Dual-In-Lead Package (PDIP), JEDEC MS-001, 0.300” Wide
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MM74HCU04
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temper ature dera ting — plas tic “N” packa ge: −
12 mW/°C from 65 °C to 85°C.
DC Electrical Characteristics (Note 4)
Note 4: For a power supply of 5V ±1 0% the worst c ase ou tput volta ges (VOH, and VOL) occur for HC at 4.5V. Thus the 4. 5V valu es shoul d be use d when
designing with this supply. Worst case V
IH
and VIL occur at V
CC
= 5.5V and 4.5V res pectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage c ur-
rent (I
IN
, ICC, and IOZ) occur for CMOS at the higher voltage and so th e 6. 0V values should be used.
Supply Voltage (VCC) −0.5 to +7.0V
DC Input Voltage (V
IN
) −1.5 to V
CC
+1.5V
DC Output Voltage (V
OUT
) −0.5 to V
CC
+0.5V
Clamp Diode Current (I
IK
, IOK) ±20 mA
DC Output Current, per pin (I
OUT
) ±25 mA
DC V
CC
or GND Current, per pin (ICC) ±50 mA
Storage Temperature Range (T
STG
) −65°C to +150°C
Power Dissipation (P
D
)
(Note 3) 600 mW
S.O. Package only 500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds) 260°C
Min Max Units
Supply Voltage (V
CC
)26V
DC Input or Output Voltage 0 V
CC
V
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
) −40 +85 °C
Symbol Parameter Conditions
V
CC
TA = 25°CTA = −40 to 85°CTA = −55 to 125°C
Units
Typ Guaranteed Limits
V
IH
Minimum HIGH Level 2.0V 1.7 1.7 1.7 V
Input Voltage 4.5V 3.6 3.6 3.6 V
6.0V 4.8 4.8 4.8 V
V
IL
Maximum LOW Level 2.0V 0.3 0.3 0.3 V
Input Voltage 4.5V 0.8 0.8 0.8 V
6.0V 1.1 1.1 1.1 V
V
OH
Minimum HIGH Level V
IN
= V
IL
Output Voltage |I
OUT
| ≤ 20 µA 2.0V 2.0 1.8 1.8 1.8 V
4.5V 4.5 4.0 4.0 4.0 V
6.0V 6.0 5.5 5.5 5.5 V
V
IN
= GND
|I
OUT
| ≤ 4.0 mA 4.5V 4.2 3.98 3.84 3.7 V
|I
OUT
| ≤ 5.2 mA 6.0V 5.7 5.48 5.34 5.2 V
V
OL
Maximum LOW Level V
IN
= V
IH
Output Voltage |I
OUT
| ≤ 20 µA 2.0V 0 0.2 0 .2 0.2 V
4.5V 0 0.5 0.5 0.5 V
6.0V 0 0.5 0.5 0.5 V
V
IN
= V
CC
|I
OUT
| ≤ 6.0 mA 4.5V 0.2 0.26 0.33 0.4 V
|I
OUT
| ≤ 7.8 mA 6.0V 0.2 0.26 0.33 0.4 V
I
IN
Maximum Input V
IN
= VCC or GND 6.0V ±0.1 ±1.0 ±1.0 µA
Current
I
CC
Maximum Quiescent V
IN
= VCC or GND 6.0V 2.0 20 40 µA
Supply Current I
OUT
= 0 µA
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MM74HCU04
AC Electrical Characteristics
V
CC
= 5V, T
A
= 25°C, C
L
= 15 pF, tr = t
f
= 6 ns
AC Electrical Characteristics
V
CC
= 2.0V to 6.0V, CL = 50 pF, tr = t
f
= 6 ns (unless otherwise specified)
Note 5: CPD determines the no load dynamic power con s um ption, PD = CPD V
CC
2
f + ICC VCC, and the no load dynam ic current consumpt ion,
I
S
= CPD VCC f + ICC.
Typical Applications
FIGURE 1. Crystal Oscillator
FIGURE 2. Stable RC Oscillator
FIGURE 3. Schmit t Trigger
Symbol Pa ra me t e r Conditions Typ
Guarant eed
Units
Limit
t
PHL
, t
PLH
Maximum Propagation 7 13 ns
Delay
Symbol Parameter Conditions
V
CC
TA=25°CTA=−40 to 85°CTA=−55 to 125°C
Units
Typ Guaranteed Limits
t
PHL
, t
PLH
Maximum Propagation 2.0V 49 82 103 120 ns
Delay 4.5V 9.9 16 21 24 ns
6.0V 8.4 14 18 20 ns
t
TLH
, t
THL
Maximum Output Rise 2.0V 30 75 95 110 ns
and Fall Time 4.5V 8 15 19 22 ns
6.0V 7 13 16 19 ns
C
PD
Power Dissipation (per gate) 90 pF
Capacitance (Note 5)
C
IN
Maximum Input 8 15 15 15 pF
Capacitance
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MM74HCU04
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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MM74HCU04
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
MM74HCU04 Hex Inverter
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant inju ry to the
user.
2. A critical component i n any compon ent of a lif e support
device or system whose failu re to perform can be reasonably expected to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
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