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C BUS Control 5-Input 2-Output AV Switch MM1313
I2C BUS Control 5-Input 2-Output AV Switch
Monolithic IC MM1313
Outline
This IC is a 5-input 2-output AV switch with I2C control, developed for use in televisions. Two outputs enable
it to support two screens or "picture-in-picture".
Features
1. Serial control by I2C bus.
2. 5-inputs, 2-outputs.
3. Video and audio system switches can be controlled independently.
4. 6dB amplifier built in to video system.
5. Built-in Y/C MIX circuit.
6. Slave address can be changed : 90H or 92H.
7. Audio muting possible by external pin.
8. Maintains high impedance even when I
2
C BUS line (SDA, SCL) power supply is off.
9. Built-in 3 value discrimination function.
10.On-chip power ON reset function.
11.Two types of audio input impedance : 60kΩ and 30kΩ.
MM1313AD : 60kΩ MM1313BD : 30kΩ
12.Supports 2-screen or P-IN-P TV.
Package
SDIP-42A (MM1313AD, MM1313BD)
Applications
1. Televisions
2. Other video equipment
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C BUS Control 5-Input 2-Output AV Switch MM1313
Equivalent Block Diagram
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C BUS Control 5-Input 2-Output AV Switch MM1313
Pin Function
Pin No.
Name
Internal equivalent circuit diagram
Pin No.
Name
Internal equivalent circuit diagram
41 MTV-V
1 V1
-
V
7 V2
-
V
13 V3
-
V
27 STV
-
V
3 V1
-
Y
9 V2
-
Y
31 Y
IN1
5 V1-C
11 V2
-
C
29 C
IN1
42 MTV-L
2 V1
-
L
8 V2
-
L
14 V3
-
L
25 STV
-
L
40 MTV
-
R
4 V1
-
R
10 V2
-
R
16 V3
-
R
26 STV
-
R
34 VOUT1
23 V
OUT2
37 YOUT1
39 C
OUT1
33 LOUT1
22 L
OUT2
32 R
OUT1
24 R
OUT2
36 BIAS
19 SCL
20 SDA
6 S1
12 S2
21 ADR
28 Mute
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C BUS Control 5-Input 2-Output AV Switch MM1313
Absolute Maximum Ratings
(Ta=25°C)
Item Symbol Ratings Units
Storage temperature T
STG
-
40~+125
°
C
Operating temperature T
OPR
-
20~+75
°
C
Power supply voltage V
CC 12 V
Allowable power dissipation Pd 850 mW
Electrical Characteristics
(Ta=25°C, VCC=9V)
Item Symbol
Measure
Conditions (unless otherwise indicated,
Min. Typ. Max. Units
ment pin
Measurement Circuit Figure 1)
Operating power supply voltage
VCC 8 9 10 V
Current consumption I
CC 38 VCC=9V, no signal, no load 40 52 mA
V
OUT1 output
Voltage gain G
V1 TP1 Sine wave 1.0VP-P, 100kHz 5.5 6.0 6.5 dB
Frequency characteristics F
V1 TP1
Sine wave 1.0V
P-P
, 10MHz/100kHz-1.0 0 1.0 dB
Vn-V : Staircase 1V
P-P
APL=10~90%
Differential gain DG
V1 TP1
Vn-Y : Staircase (luminance signal) 1V
P-P
-
30 3 %
Vn-C : Chroma signal 0.3V
P-P
APL=10~90%
Vn-V : Staircase 1V
P-P
APL=10~90%
Differential phase DP
V1 TP1
Vn-Y : Staircase (luminance signal) 1V
P-P
-
3 0 3 deg
Vn-C : Chroma signal 0.3V
P-P
APL=10~90%
Sine wave 100kHz
Input dynamic range D
V1 SG1~3 Maximum input for total higher 1.6 1.9 VP-P
harmonic distortion factor < 1.0%
V
OUT2 output
Voltage gain G
V2 TP6 Sine wave 1.0VP-P, 100kHz 5.5 6.0 6.5 dB
Frequency characteristics F
V2 TP6
Sine wave 1.0V
P-P
-
1.0 0 1.0 dB
10MHz/100kHz
Vn-V : Staircase 1V
P-P
APL=10~90%
Differential gain DG
V2 TP6
Vn-Y : Staircase (luminance signal) 1V
P-P
-
30 3 %
Vn-C : Chroma signal 0.3V
P-P
APL=10~90%
Vn-V : Staircase 1V
P-P
APL=10~90%
Differential phase DP
V2 TP6
Vn-Y : Staircase (luminance signal) 1V
P-P
-
3 0 3 deg
Vn-C : Chroma signal 0.3V
P-P
APL=10~90%
Sine wave 100kHz
Input dynamic range D
V2 SG1~3 Maximum input for total higher 1.6 1.9 VP-P
harmonic distortion factor < 1.0%
YOUT1 output
Voltage gain
G
Y1 TP2
Vn-Y : Sine wave 1.0V
P-P
, 100kHz
5.5 6.0 6.5
dB
G
Y2 TP2
YIN1 : Sine wave 2.0V
P-P
, 100kHz-0.5 0 0.5
F
Y1 TP2
Vn
-
Y : Sine wave 1.0VP
-
P
-
1.0 0 1.0
Frequency characteristics
10MHz/100kHz
dB
F
Y2 TP2
Y
IN1 : Staircase 2.0VP-P
-
1.0 0 1.0
10MHz/100kHz
Vn-Y : Staircase 1V
P-P
Differential gain DGY TP2
APL=10~90%
-
30 3 %
Y
IN1: Staircase 2VP-P
APL=10~90%
Vn-Y : Staircase 1V
P-P
Differential phase DPY TP2
APL=10~90%
-
3 0 3 deg
Y
IN1 : Staircase 2VP-P
APL=10~90%
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C BUS Control 5-Input 2-Output AV Switch MM1313
Item Symbol
Measure
Conditions (unless otherwise indicated,
Min. Typ. Max. Units
ment pin
Measurement Circuit Figure 1)
Vn-Y : Sine wave 100kHz
D
Y1 SG2 Maximum input for total higher 1.6 1.9
Input dynamic range
harmonic distortion factor < 1.0%
V
IN1 : Sine wave 100kHz
V
P-P
DY2 SG4 Maximum input for total higher 3.2 3.8
harmonic distortion factor < 1.0%
Output impedance Z
OYC150Ω
C
OUT1 output
Voltage gain
G
C1 TP3
Vn-C : Sine wave 1.0V
P-P
, 100kHz
5.5 6.0 6.5
dB
G
C2 TP3
CIN1 : Sine wave 2.0V
P-P
, 100kHz-0.5 0 0.5
F
C1 TP3
Vn
-
C : Sine wave 1.0VP
-
P
-
1.0 0 1.0
Frequency characteristics
10MHz/100kHz
dB
F
C2 TP3
C
IN1 : Sine wave 2.0VP-P
-
1.0 0 1.0
10MHz/100kHz
Differential gain DG
C TP3
C
IN1 : Staircase 2VP-P
-
30 3 %
APL=10~90%
Differential phase DP
C TP3
C
IN1 : Staircase 2VP-P
-
3 0 3 deg
APL=10~90%
Vn-C : Sine wave 100kHz
D
C1 SG3 Maximum input for total higher 2.75 3.25
Input dynamic range
harmonic distortion factor < 1.0%
V
P-P
CIN1: Sine wave 100kHz
D
C2 SG5 Maximum input for total higher 5.5 6.5
harmonic distortion factor < 1.0%
Input impedance Z
IC Vn
-
C, CIN1 101520kΩ
Output impedance Z
OC150Ω
L
OUT1 output
Voltage gain
G
L11 TP4 b7=0, Sine wave 2.5VP-P, 1kHz
-
6.5-6.0-5.5
dB
G
L12 TP4 b7=1, Sine wave 2.5VP-P, 1kHz
-
0.5 0.0 0.5
Frequency characteristics F
L1 TP4 Sine wave 2.5VP-P, 1MHz/1kHz
-
3.0 0 1.0 dB
Total higher harmonic distortion
THDL1 TP4 Sine wave 2.5VP
-
P, 1kHz 0.03 0.1 %
Sine wave 1kHz
Input dynamic range D
L1 SG6 Maximum input for total higher 2.6 2.8 Vrms
harmonic distortion factor < 0.5%
Output offset voltage V
OFFL133
L
OUT1 pin DC difference during
0 ±15 mV
SW switching
Input impedance Z
IL1 426078kΩ
Output impedance Z
OL1 120 Ω
L
OUT2 output
Voltage gain G
L2 TP7 Sine wave 2.5VP-P, 1kHz
-
0.5 0.0 0.5 dB
Frequency characteristics F
L2 TP7 Sine wave 2.5VP-P, 1MHz/1kHz
-
3.0 0 1.0 dB
Total higher harmonic distortion
THDL2 TP7 Sine wave 2.5VP
-
P, 1kHz 0.03 0.1 %
Sine wave 1kHz
Input dynamic range D
L2 SG6 Maximum input for total higher 2.6 2.8 Vrms
harmonic distortion factor < 0.5%
Output offset voltage V
OFFL222
L
OUT2 pin DC difference during
0 ±15 mV
SW switching
Output impedance Z
OL2 120 Ω
R
OUT1 output
Voltage gain
G
R11 TP5 b7=0, Sine wave 2.5VP-P, 1kHz
-
6.5-6.0-5.5
dB
G
R12 TP5 b7=1, Sine wave 2.5VP-P, 1kHz
-
0.5 0.0 0.5
Frequency characteristics F
R1 TP5 Sine wave 2.5VP-P, 1MHz/1kHz
-
3.0 0 1.0 dB
Total higher harmonic distortion
THDR1 TP5 Sine wave 2.5VP
-
P, 1kHz 0.03 0.1 %
Sine wave 1kHz
Input dynamic range D
R1 SG7 Maximum input for total higher 2.6 2.8 Vrms
harmonic distortion factor < 0.5%
Output offset voltage V
OFFR132
R
OUT1 pin DC difference during
0 ±15 mV
SW switching
Input impedance Z
IR1 426078kΩ
Output impedance Z
OR1 120 Ω
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C BUS Control 5-Input 2-Output AV Switch MM1313
Item Symbol
Measure
Conditions (unless otherwise indicated,
Min. Typ. Max. Units
ment pin
Measurement Circuit Figure 1)
ROUT2 output
Voltage gain G
R2 TP8 Sine wave 2.5VP-P, 1kHz
-
0.5 0.0 0.5 dB
Frequency characteristics F
R2 TP8 Sine wave 2.5VP-P, 1MHz/1kHz
-
3.0 0 1.0 dB
Total higher harmonic distortion
THDR2 TP8 Sine wave 2.5VP
-
P, 1kHz 0.03 0.1 %
Sine wave 1kHz
Input dynamic range D
R2 SG7 Maximum input for total higher 2.6 2.8 Vrms
harmonic distortion factor < 0.5%
Output offset voltage V
OFFR224
R
OUT2 pin DC difference during
0 ±15 mV
switching
Output impedance Z
OR2 120 Ω
Crosswalk
V
OUT 1 CTV1 TP1
Measurement Circuit Figure 2
-
60-53 dB
V
OUT 2 CTV2 TP2
for SG1 input : 4.43MHz, 1V
P-P
-
60-53 dB
Y
OUT 1 CTY1 TP3
for SG2 input : 4.43MHz, 0.5V
P-P
-
60-53 dB
C
OUT 1 CTC1 TP6
-
60-53 dB
L
OUT 1 CTL1 TP4
-
90-80 dB
L
OUT 2 CTL2 TP5 Measurement Circuit Figure 2
-
90-80 dB
R
OUT 1 CTR1 TP7 1kHz, 2.5VP-P
-
90-80 dB
R
OUT 2 CTR2 TP8
-
90-80 dB
Video I/O Pin Voltage
Input pin voltage V
VIP No signal, no load 4.6 4.9 5.2 V
V
VOP
VOUT1 pin, VOUT2 pin
4.1 4.4 4.7 V
Output pin voltage
No signal, no load
V
SOP
YOUT1 pin, COUT1 pin
3.3 3.6 3.9 V
No signal, no load
Audio I/O Pin Voltage
Input pin voltage V
AIP No signal, no load 4.0 4.3 4.6 V
Output pin voltage V
AOP No signal, no load 3.9 4.2 4.5 V
Logic section (Refer to figure below)
Input voltage L V
IL I
2
C logic low level discrimination value 0.0 1.5 V
Input voltage H V
IH I
2
Clogic high level discrimination value 3.0 5.0 V
Low level output voltage (SDA)
VOL SDA for 3mA inflow 0.0 0.4 V
High level input current I
IH when SDA, SCL=4.5V impressed
-
10 +10 µA
Low level input current I
IL when SDA, SCL=0.4V impressed
-
10 +10 µA
Clock frequency f
SCL 100 kHz
Data transmission waiting time
tBUF 4.7 µS
SCL start hold time t
HD;STA 4.0 µS
SCL low level hold time t
LOW 4.7 µS
SCL high level hold time t
HIGH 4.0 µS
SCL start set-up time t
SU;STA 4.7 µS
SDA data hold time t
HD;DAT 200 nS
SDA data set-up time t
SD;DAT 250 nS
SCL rise time t
R 1000 nS
SCL fall time t
F 300 nS
SCL stop set-up time t
SU;STO 4.0 µS
SDA
SCL
t
BUF
P PS
t
HD:STA tHD:DAT tHIGH tSU:DAT tSU:STA tSU:STD
tLOW
Sr
t
R tF
I2C BUS BUS Control Signal
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C BUS Control 5-Input 2-Output AV Switch MM1313
Measurement Circuit
Measurement Circuit 1
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C BUS Control 5-Input 2-Output AV Switch MM1313
Measurement Circuit 2 (Crosstalk measurement)
Page 9
The I2C BUS is a BUS system developed by Philips for internal use in equipment. Data transmission is carried
out by the two SDA and SCL lines, in byte units, with the MSB first from start condition.
[Control Register]
The control register contains data sent from the master in order to determine the status of each switch.
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the
slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 0 when
using as a control register.
The MM1313 slave address can be selected as 90H/92H depending on the status of the ADR pin. When ADR
pin is low it is 90H.
The relationship between the control register bits and switch control is as shown below.
The control register bits are reset to 0 when power is applied.
MM1313 control is carried out by the 3-byte structure of the 1 address byte and 2 control data bytes. The first
byte in the control data is control data for output 1, and the remaining 1 byte is control data for output 2.
All of the remaining data (fourth byte and after) are ignored.
Refer to the separate tables for details on switch control.
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C BUS Control 5-Input 2-Output AV Switch MM1313
I2C BUS
SDA
SCL
S
123456 78A123 8A P
S:Start Condition
P:Stop Condition
A:Acknowledge
Address byte Control data
S
Slave address
R/W
1001000/10
A
Control register 1
b7 b6 b5 b4 b3 b2 b1 b0
A
Control register 2
b7 b6 b5 b4 b3 b2 b1 b0
AP
b7 b6 b5 b4 b3 b2 b1 b0
Audio
S/Comp
Video-Select Audio-Select
Gain Select
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C BUS Control 5-Input 2-Output AV Switch MM1313
[Status Register]
The status register contains data for sending device status to the master.
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the
slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 1 when
using as a status register.
The MM1313 slave address can be selected as 91H/93H depending on the status of the ADR pin. When the
ADR pin is low it is 91H. However, the confirmation response after completion of the status register should be
non-acknowledge.
The status register output data as shown below.
P-ON RESET : Returns 1 for power on reset. However once data read begins, 0 is returned next.
S1/S2 OPEN : Returns 0 when the S1/S2 pin is not open, and returns 1 when the S1/S2 pin is open
S1/S2 SEL : Returns 0 when the S1/S2 pin is not grounded, and returns 1 when the S1/S2 pin is grounded.
S1/S2 OPEN, SEL have 3-value discrimination, and the combinations are as shown below.
[Power On Reset]
Power on reset is built in to reset each control register to 0 when power is turned on.
Power on reset threshold has hysteresis as shown in the figure below. The IC power on reset status can be
discriminated by reading the status register P-ON RESET.
S
Slave address R/W
A
Status register
NA P
1 0 0 1 0 00/11 b7b6b5b4b3b2b1b0
Address byte Status data
b7 b6 b5 b4 b3 b2 b1 b0
P-ON S1 S1 S2 S2
RESET
OPEN SEL OPEN SEL
S1/S2 pin DC voltage S1/S2 OPEN S1/S2 SEL
0.8V or less 01
1.3V or more, 3.5V or less
00
4.5V or more 10
Reset released
Reset status
Undefined
0.6V 4.3V 5.4V V
CC
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C BUS Control 5-Input 2-Output AV Switch MM1313
Switch Control Table
b6 b5 b4 b3 VOUT1YOUT1COUT1
0 0 0 0 Mute Mute Mute
0001MTV
-
VYIN1CIN1
0010 V1
-
VYIN1CIN1
0011 V2
-
VYIN1CIN1
0100 V3
-
VYIN1CIN1
0101 STV
-
VYIN1CIN1
01
10
Mute Mute Mute
11
1 0 0 0 Mute Mute Mute
1001MTV
-
VYIN1CIN1
1010V1
-
Y+C V1-YV1
-
C
1011V2
-
Y+C V2-YV2
-
C
1100 V3
-
VYIN1CIN1
1101 STV
-
VYIN1CIN1
11
10
Mute Mute Mute
11
Mute pin b2 b1 b0 LOUT1ROUT1
0 0 0 Mute Mute
0 0 1 MTV
-
L MTV-R
010 V1
-
LV1
-
R
1.5V or less 011 V2
-
LV2
-
R
(OPEN) 100 V3
-
LV3
-
R
101 STV
-
LSTV
-
R
1
10
Mute Mute
11
3.0V or more
---
Mute Mute
Mute pin b2 b1 b0 LOUT2ROUT2
0 0 0 Mute Mute
0 0 1 MTV
-
L MTV-R
010 V1
-
LV1
-
R
1.5V or less 011 V2
-
LV2
-
R
(OPEN) 100 V3
-
LV3
-
R
101 STV
-
LSTV
-
R
1
10
Mute Mute
11
3.0V or more
---
Mute Mute
b6 b5 b4 b3 VOUT2
0000 Mute
0001MTV
-
V
0010 V1
-
V
0011 V2
-
V
0100 V3
-
V
0101 STV
-
V
01
10
Mute
11
1000 Mute
1001MTV
-
V
1010V1
-
Y+C
1011V2
-
Y+C
1100 V3
-
V
1101 STV
-
V
11
10
Mute
11
b7 Output gain
0
-
6dB output
1 0dB output
1. Video Output 1
3. Audio Output 1
5. Audio Output 2
4. Audio Output 1 Gain
Switching
2. Video Output 2
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C BUS Control 5-Input 2-Output AV Switch MM1313
Application Circuit
Notes
1. V
OUT is set at 4.4V and CIN at 4.9V
Please note that capacitance polarity may vary depending on comb filter bias.
2. Each audio output can be muted by making pin 19 high. Mute is off when it is open or low.
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