The I2C BUS is a BUS system developed by Philips for internal use in equipment. Data transmission is carried
out by the two SDA and SCL lines, in byte units, with the MSB first from start condition.
Control Register
The control register contains data sent from the master in order to determine the status of each switch.
S
A
Slave addressR/W
Control register
AP
1 0 0 1 0 00/10b7b6b5b4b3b2b1b0
Address byteControl data
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the
slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 0 when
using as a control register.
The MM1311 slave address can be selected as 90H/92H depending on the status of the ADR pin. When the
ADR pin is low it is 90H. The relationship between the control register bits and switch control is as shown
below.
b7b6b5b4b3b2b1b0
Audio
S/Comp
Video-SelectAudio-Select
GainSelect
The control register bits are reset to 0 when power is applied.
MM1311 control is carried out by the 2-byte structure of the 1 address byte and 1 control data byte. All of the
remaining data (third byte and after) are ignored.
Refer to the separate tables for details on switch control.
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2
Reset released
Reset status
Undefined
0.6V4.3V5.4VV
CC
C BUS Control 4-Input 1-Output AV Switch MM1311
MITSUMI
I
Status Register
The status register contains data for sending device status to the master.
S
A
Slave addressR/W
Control register
NAP
1 0 0 1 0 00/11b7b6b5b4b3b2b1b0
Address byteControl data
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the
slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 1 when
using as a status register.
The MM1311 slave address can be selected as 91H/93H depending on the status of the ADR pin. When the
ADR pin is low it is 91H. However, the confirmation response after completion of the status register should be
non-acknowledge. The status register output data as shown below.
b7b6b5b4b3b2b1b0
P-ONS1S1S2S2
RESETOPENSELOPENSEL
P-ON RESET : Returns 1 for power on reset. However once data read begins, 0 is returned next.
S1/S2 OPEN : Returns 0 when the S1/S2 pin is not open, and returns 1 when the S1/S2 pin is open
S1/S2 SEL : Returns 0 when the S1/S2 pin is not grounded, and returns 1 when the S1/S2 pin is
grounded.
S1/S2 OPEN, SEL have 3-value discrimination, and the combinations are as shown below.
S1/S2 pin DC voltageS1/S2 OPENS1/S2 SEL
0.8V or less01
1.3V or more, 3.5V or less00
4.5V or more10
Power On Reset
Power on reset is built in to reset each control register to 0 when power is turned on.
Power on reset threshold has hysteresis as shown in the figure below. The IC power on reset status can be
discriminated by reading the status register P-ON RESET.
Page 10
MITSUMI
Switch Control Table
1. Video Output
b6b5b4b3VOUTYOUTCOUT
0000MuteMuteMute
2
C BUS Control 4-Input 1-Output AV Switch MM1311
I
2. Audio Output
0001MTV
0010V1-VYINCIN
0011V2-VYINCIN
0100V3-VYINCIN
01
01
1000MuteMuteMute
1001MTV
1010V1-Y+CV1-YV1
1011V2
1100V3
11
Mute pinb2b1b0LOUTROUT
~~
11
01
11
000MuteMute
-
VYINCIN
MuteMuteMute
-
VYINCIN
-
C
-
Y+CV2-YV2
-
VYINCIN
MuteMuteMute
-
C
1.5V or less
(OPEN)
3.0V or more
3. Audio Gain Switching
001MTV
010V1
011V2
100V3
01
1
---
~
11
b7Output gain
0
10dB output
-
6dB output
-
LMTV-R
-
LV1
-
LV2
-
LV3
MuteMute
MuteMute
-
R
-
R
-
R
Page 11
MITSUMI
Example of Application Circuit
2
C BUS Control 4-Input 1-Output AV Switch MM1311
I
Notes 1 : VOUT is set at 4.4V and CIN at 4.3V.
Please note that capacitance polarity may vary depending on
comb filter bias.
Notes 2 : Each audio output can be muted by making pin 19 high. Mute is
off when it is open or low.
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